spi_slave_dma.asm

ADI公司SHARC与BlackFin通过SPI协议相互通信的源代码

#include <def21369.h>
#include "SPI.h"
#include <sru.h>

#define SIZE 28

.extern InitSRU ;
.extern InitSRU1 ;
.extern InitPLL;
.extern core_speed;

.section/dm seg_dmda;
/**
.var source[SIZE] = {
						0x0123, 0x4567,	0xAAAA, 0xAAAA,
						0x6666,	0x6666, 0x9999, 0x9999,
						0x3333, 0x3333, 0xCCCC, 0xCCCC,
						0x0F0F, 0x0F0F, 0xF0F0, 0xF0F0,
						0x00FF, 0x00FF, 0xFF00, 0xFF00,
						0x0000, 0xFFFF, 0xFFFF, 0x0000,
						0xFFFF, 0xFFFF, 0x0000, 0xABCD
						};
**/
.var source[SIZE] = {
					0x0123,0x4567,0x89AB,0xCDEF,
                    0x4567,0x89AB,0xCDEF,0x0123,
                    0x89AB,0xCDEF,0x0123,0x4567,
                    0xCDEF,0x0123,0x4567,0x89AB,
                    0x0123,0x4567,0x89AB,0xCDEF,
                    0x4567,0x89AB,0xCDEF,0x0123,
                    0x89AB,0xCDEF,0x0123,0x4567
					};
.var dest[SIZE];
.var count = 0;
.var test_flag = 0;

.section/pm seg_rth;
//EMUI:
	nop;nop;nop;nop;
//RSTI:
	nop;jump start;nop;nop;
	
.section/pm seg_spi;
	nop; jump SPI_isr; nop; nop;
	
.section/pm seg_pmco;
start:

	call InitPLL;
	call InitSRU;
	call InitSRU1;
	
	r0 = TXFLSH|RXFLSH;
	dm(SPICTL) = r0;
	dm(SPICTLB) = r0;
		
	r0 = FIFOFLSH;
	dm(SPIDMAC) = r0;
	dm(SPIDMACB) = r0;
	
	r0 = 0xFF;
	dm(SPISTAT) = r0;
	dm(SPISTATB) = r0;
	
	r0 = 0;
	dm(SPIFLG) = r0;
	dm(SPIFLGB) = r0;
	dm(SPIBAUD) = r0;
	dm(SPIBAUDB) = r0;
	
	bit set mode1 IRPTEN;
	bit set imask P1I;
	
	ustat1 = dm(SYSCTL);
	bit clr ustat1 MSEN;
	dm(SYSCTL) = ustat1;
	
	bit set FLAGS FLG3O; 
	
	call Slave_Init;

loophere:
#ifndef SL_TRANSMITTER
	r2 = 1;
	r0 = dm(count);
	comp(r0,r2);
	if ne jump loophere;
	r0 = 0;
	dm(count) = r0;
	jump compare_data;
#endif
	jump loophere;
	
	
Slave_Init:	
// Initialize the Slave
	
	ustat1 = 0;
#ifdef SL_TRANSMITTER	
	bit set ustat1 TIMOD2|WL16|SENDZ|SPIEN|MSBF;
//	bit set ustat1 TIMOD2|WL16|SENDZ;
#else
	bit set ustat1 TIMOD2|WL16|GM|SPIEN|MSBF;	
//	bit set ustat1 TIMOD2|WL16|GM;	
#endif

#ifdef SET_CPHASE
	bit set ustat1 CPHASE;
#endif
	
#ifdef SET_CLKPL
	bit set ustat1 CLKPL;
#endif
	
#ifdef SET_CPHASE_CLKPL
	
	bit set ustat1 CPHASE | CLKPL;
#endif	
	dm(SPICTL) = ustat1;
	
#ifdef SL_TRANSMITTER	
	r0 = source;
#else
	r0 = dest;
#endif
	dm(IISPI) = r0;
	
	r0 = 1;
	dm(IMSPI) = r0;
	
	r0 = SIZE;
	dm(CSPI) = r0;

//	bit set ustat1 SPIEN;
//	dm(SPICTL) = ustat1;
		
#ifdef SL_TRANSMITTER	
	r0 = SPIDEN | INTEN;
#else
	r0 = SPIDEN | SPIRCV | INTEN;;
#endif
	dm(SPIDMAC) = r0;

Slave_Init.end: rts;		

SPI_isr:
	r1 = dm(count);
	r1 = r1 + 1;
	dm(count) = r1;
	
poll_dmastat:	
	ustat1=dm(SPIDMAC);
    bit tst ustat1 SPIDMAS; // Check SPI DMA Status bit
    if tf jump poll_dmastat;   // SPIDMAS = 1 when DMA in progress
poll_spife:    
	ustat1 = dm(SPISTAT);
	bit tst ustat1 SPIFE;
	if not tf jump poll_spife;
	
	r0 = 0;
	dm(SPICTL) = r0;
	dm(SPIDMAC) = r0;
	
exit_isr:	
	rti;	
		
compare_data:
	i0 = source;
	i1 = dest;
	m0 = 1;
	l0 = 0;
	l1 = 0;
	
	lcntr = SIZE, do compare until lce;
	r3 = dm(i0,m0);
	r4 = dm(i1,m0);
	comp( r3,r4);
	if ne jump error(la);	
	nop;
	nop;
	nop;
compare: nop;
	nop;
	
blink_loop1:

	LCNTR = 0x1FF, do delay2 until lce;
	nop;
	LCNTR = 0xFFFF, do delay3 until lce;
delay3: nop;	
delay2: nop;

	r0 = dm(test_flag);
	r1 = 1;
	comp(r0,r1);
	if eq jump set_DAI_High;
	
	bit clr FLAGS FLG3; 
	SRU (LOW, DAI_PB15_I);
	SRU (LOW, DAI_PB16_I);
	r1 = 1;
	dm(test_flag) = r1;
	
	jump blink_loop1;	

set_DAI_High:
	SRU (HIGH, DAI_PB15_I);
	SRU (HIGH, DAI_PB16_I);
	bit set FLAGS FLG3; 
		
	r1 = 0;
	dm(test_flag) = r1;
		
	jump blink_loop1;	

error:
blink_loop2:

	LCNTR = 0x1FF, do delay4 until lce;
	nop;
	LCNTR = 0xFFFF, do delay5 until lce;
delay5: nop;	
delay4: nop;

	bit tgl FLAGS FLG3; 
	
	r0 = dm(test_flag);
	r1 = 1;
	comp(r0,r1);
	if eq jump set_DAI_High1;
	
	SRU (HIGH, DAI_PB15_I);
	SRU (LOW, DAI_PB16_I);
	r1 = 1;
	dm(test_flag) = r1;
	
	jump blink_loop2;	

set_DAI_High1:
	SRU (LOW, DAI_PB15_I);
	SRU (HIGH, DAI_PB16_I);
		
	r1 = 0;
	dm(test_flag) = r1;
		
	jump blink_loop2;	
compare_data.end: nop;