📄 slave_test.lst
字号:
00D9 3A40 CPI R20,0xA0
00DA E0E0 LDI R30,0
00DB 075E CPC R21,R30
00DC F409 BNE 0x00DE
00DD C041 RJMP 0x011F
00DE EA80 LDI R24,0xA0
00DF E090 LDI R25,0
00E0 1784 CP R24,R20
00E1 0795 CPC R25,R21
00E2 F02C BLT 0x00E8
00E3 3948 CPI R20,0x98
00E4 E0E0 LDI R30,0
00E5 075E CPC R21,R30
00E6 F199 BEQ 0x011A
00E7 C053 RJMP 0x013B
00E8 3A48 CPI R20,0xA8
00E9 E0E0 LDI R30,0
00EA 075E CPC R21,R30
00EB F409 BNE 0x00ED
00EC C037 RJMP 0x0124
00ED C04D RJMP 0x013B
00EE 3C40 CPI R20,0xC0
00EF E0E0 LDI R30,0
00F0 075E CPC R21,R30
00F1 F409 BNE 0x00F3
00F2 C03D RJMP 0x0130
00F3 EC80 LDI R24,0xC0
00F4 E090 LDI R25,0
00F5 1784 CP R24,R20
00F6 0795 CPC R25,R21
00F7 F02C BLT 0x00FD
00F8 3B48 CPI R20,0xB8
00F9 E0E0 LDI R30,0
00FA 075E CPC R21,R30
00FB F181 BEQ 0x012C
00FC C03E RJMP 0x013B
00FD 3C48 CPI R20,0xC8
00FE E0E0 LDI R30,0
00FF 075E CPC R21,R30
0100 F179 BEQ 0x0130
0101 3C48 CPI R20,0xC8
0102 E0E0 LDI R30,0
0103 075E CPC R21,R30
0104 F1B4 BLT 0x013B
0105 3F48 CPI R20,0xF8
0106 E0E0 LDI R30,0
0107 075E CPC R21,R30
0108 F191 BEQ 0x013B
0109 C031 RJMP 0x013B
(0078) {
(0079) //从接收
(0080) case TW_SR_SLA_ACK:
(0081) case TW_SR_ARB_LOST_SLA_ACK:
(0082) case TW_SR_GCALL_ACK:
(0083) case TW_SR_ARB_LOST_GCALL_ACK:
(0084) Twi_Ack(); //返回ACK
010A B786 IN R24,0x36
010B 708F ANDI R24,0xF
010C 6C80 ORI R24,0xC0
010D BF86 OUT 0x36,R24
(0085) break;
010E C02C RJMP 0x013B
(0086) case TW_SR_DATA_ACK:
(0087) case TW_SR_DATA_NACK:
(0088) main_tmp = TWDR;
010F B023 IN R2,0x03
0110 92200060 STS main_tmp,R2
(0089) PORTA = ~ TWDR; //接收数据并显示
0112 B023 IN R2,0x03
0113 9420 COM R2
0114 BA2B OUT 0x1B,R2
(0090) Twi_Ack(); //返回ACK
0115 B786 IN R24,0x36
0116 708F ANDI R24,0xF
0117 6C80 ORI R24,0xC0
0118 BF86 OUT 0x36,R24
(0091) break;
0119 C021 RJMP 0x013B
(0092) case TW_SR_GCALL_DATA_ACK:
(0093) case TW_SR_GCALL_DATA_NACK:
(0094) Twi_Ack(); //返回ACK
011A B786 IN R24,0x36
011B 708F ANDI R24,0xF
011C 6C80 ORI R24,0xC0
011D BF86 OUT 0x36,R24
(0095) break;
011E C01C RJMP 0x013B
(0096) case TW_SR_STOP:
(0097) Twi_Ack();
011F B786 IN R24,0x36
0120 708F ANDI R24,0xF
0121 6C80 ORI R24,0xC0
0122 BF86 OUT 0x36,R24
(0098) break;
0123 C017 RJMP 0x013B
(0099) //从发送*****************************
(0100)
(0101) case TW_ST_SLA_ACK: // 0xA8: 自己的SLA+R 已经被接收，ACK 已返回
(0102) case TW_ST_ARB_LOST_SLA_ACK:// 0xB0: SLA+R/W 作为主机的仲裁失败；自己的SLA+R 已经被接收，ACK 已返回
(0103) // 被选中为从读出 (数据将从传回主机)
(0104) TWDR=main_tmp; //发送全局变量中值
0124 90200060 LDS R2,main_tmp
0126 B823 OUT 0x03,R2
(0105) Twi_Ack();
0127 B786 IN R24,0x36
0128 708F ANDI R24,0xF
0129 6C80 ORI R24,0xC0
012A BF86 OUT 0x36,R24
(0106) break;
012B C00F RJMP 0x013B
(0107) case TW_ST_DATA_ACK: // 0xB8: TWDR 里数据已经发送，接收到ACK
(0108) //发送数据位
(0109) TWDR=main_tmp;
012C 90200060 LDS R2,main_tmp
012E B823 OUT 0x03,R2
(0110) break;
012F C00B RJMP 0x013B
(0111) case TW_ST_DATA_NACK: // 0xC0: TWDR 里数据已经发送接收到NOT ACK
(0112) case TW_ST_LAST_DATA: // 0xC8: TWDR 的一字节数据已经发送(TWAE = “0”);接收到ACK
(0113) // 全部完成
(0114) // 从方式开放
(0115) Twi_NoAcK();
0130 B786 IN R24,0x36
0131 708F ANDI R24,0xF
0132 6880 ORI R24,0x80
0133 BF86 OUT 0x36,R24
(0116) twi_slave_init(0x50); //重新回到初始化状态，等待接收模式的到来
0134 E500 LDI R16,0x50
0135 DF1F RCALL _twi_slave_init
(0117) break;
0136 C004 RJMP 0x013B
(0118) case TW_NO_INFO: // 0xF8: 没有相关的状态信息；TWINT = “0”
(0119) // 无操作
(0120) break;
(0121) case TW_BUS_ERROR: // 0x00: 由于非法的START 或STOP 引起的总线错误
(0122) // 内部硬件复位，释放总线
(0123) TWCR=TWCR&TWCR_CMD_MASK|(1<<TWINT)|(1<<TWSTO)|(1<<TWEA);
0137 B786 IN R24,0x36
0138 708F ANDI R24,0xF
0139 6D80 ORI R24,0xD0
013A BF86 OUT 0x36,R24
(0124) break;
(0125) default:
(0126) break;
013B 940E015A CALL pop_gset1
013D 940E0185 CALL pop_lset
013F 9518 RETI
FILE: F:\2007电子设计\古欣\twitest\twi_slave_test\slave_test.c
(0001) #include "config.h"
(0002)
(0003) void main(void)
(0004) {
(0005) DDRC=0X00;
_main:
0140 2422 CLR R2
0141 BA24 OUT 0x14,R2
(0006) PORTC=0x03; //使能内部上拉电阻
0142 E083 LDI R24,3
0143 BB85 OUT 0x15,R24
(0007) DDRA=0xff;
0144 EF8F LDI R24,0xFF
0145 BB8A OUT 0x1A,R24
(0008) twi_slave_init(0x50); //初始化为从机，地址0x01。
0146 E500 LDI R16,0x50
0147 940E0055 CALL _twi_slave_init
(0009) SEI();
0149 9478 BSET 7
(0010) while(1)
FILE: <library>
014A CFFF RJMP 0x014A
014B 9508 RET
pop_gset2:
014C E0E2 LDI R30,2
014D 940C015B JMP pop
push_gset5:
014F 92FA ST R15,-Y
0150 92EA ST R14,-Y
push_gset4:
0151 92DA ST R13,-Y
0152 92CA ST R12,-Y
push_gset3:
0153 92BA ST R11,-Y
0154 92AA ST R10,-Y
push_gset2:
0155 937A ST R23,-Y
0156 936A ST R22,-Y
push_gset1:
0157 935A ST R21,-Y
0158 934A ST R20,-Y
0159 9508 RET
pop_gset1:
015A E0E1 LDI R30,1
pop:
015B 9149 LD R20,Y+
015C 9159 LD R21,Y+
015D FDE0 SBRC R30,0
015E 9508 RET
015F 9169 LD R22,Y+
0160 9179 LD R23,Y+
0161 FDE1 SBRC R30,1
0162 9508 RET
0163 90A9 LD R10,Y+
0164 90B9 LD R11,Y+
0165 FDE2 SBRC R30,2
0166 9508 RET
0167 90C9 LD R12,Y+
0168 90D9 LD R13,Y+
0169 FDE3 SBRC R30,3
016A 9508 RET
016B 90E9 LD R14,Y+
016C 90F9 LD R15,Y+
016D 9508 RET
push_lset:
016E 93FA ST R31,-Y
016F 93EA ST R30,-Y
0170 93BA ST R27,-Y
0171 93AA ST R26,-Y
0172 939A ST R25,-Y
0173 938A ST R24,-Y
0174 933A ST R19,-Y
0175 932A ST R18,-Y
0176 931A ST R17,-Y
0177 930A ST R16,-Y
0178 929A ST R9,-Y
0179 928A ST R8,-Y
017A 927A ST R7,-Y
017B 926A ST R6,-Y
017C 925A ST R5,-Y
017D 924A ST R4,-Y
017E 923A ST R3,-Y
017F 922A ST R2,-Y
0180 921A ST R1,-Y
0181 920A ST R0,-Y
0182 B60F IN R0,0x3F
0183 920A ST R0,-Y
0184 9508 RET
pop_lset:
0185 9009 LD R0,Y+
0186 BE0F OUT 0x3F,R0
0187 9009 LD R0,Y+
0188 9019 LD R1,Y+
0189 9029 LD R2,Y+
018A 9039 LD R3,Y+
018B 9049 LD R4,Y+
018C 9059 LD R5,Y+
018D 9069 LD R6,Y+
018E 9079 LD R7,Y+
018F 9089 LD R8,Y+
0190 9099 LD R9,Y+
0191 9109 LD R16,Y+
0192 9119 LD R17,Y+
0193 9129 LD R18,Y+
0194 9139 LD R19,Y+
0195 9189 LD R24,Y+
0196 9199 LD R25,Y+
0197 91A9 LD R26,Y+
0198 91B9 LD R27,Y+
0199 91E9 LD R30,Y+
019A 91F9 LD R31,Y+
019B 9508 RET
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