scif3.c

WinCE5.0BSP for Renesas SH7770

    PVOID   pHead // @parm PVOID returned by HWinit.
    )
{
    PSCIF_INFO   pHWHead   = (PSCIF_INFO)pHead;

    DEBUGMSG (ZONE_FUNCTION, (TEXT("+SetSetRTS, 0x%X\r\n"), pHead));

    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {
    	// Set RTS
        USHORT SPR = READ_REGISTER_USHORT(pHWHead -> pSPTR);
        SPR |= SCIF_SPTR_RTS;
        WRITE_REGISTER_USHORT(pHWHead -> pSPTR, SPR);
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        // Just exit
    }
    LeaveCriticalSection(&(pHWHead->RegCritSec));

    DEBUGMSG (ZONE_FUNCTION, (TEXT("-SetSetRTS, 0x%X\r\n"), pHead));
}


//
// @doc OEM
// @func ULONG | SCIF_GetGetInterruptType | This function is called
//   by the MDD whenever an interrupt occurs.  The return code
//   is then checked by the MDD to determine which of the four
//   interrupt handling routines are to be called.
// 
// @rdesc This routine returns a bitmask indicating which interrupts
//   are currently pending.
//
INTERRUPT_TYPE
SCIF3GetInterruptType(
    PVOID pHead      // Pointer to hardware head
    )
{
    PSCIF_INFO	pHWHead = (PSCIF_INFO)pHead;
    PDMA_INFO	pTxDma = pHWHead -> pTxDma;
    PDMA_INFO   pRxDma = pHWHead -> pRxDma;

    INTERRUPT_TYPE interrupts;
    USHORT	FSR;
    USHORT	LSR;

    DEBUGMSG (ZONE_THREAD,
              (TEXT("+SerGetInterruptType 0x%X\r\n"), pHead));
    try
    {
        FSR = READ_REGISTER_USHORT(pHWHead -> pFSR);
        LSR = READ_REGISTER_USHORT(pHWHead -> pLSR);
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        FSR = 0;
        LSR = 0;
    }

	// Clear InterruptType
    interrupts = INTR_NONE;

	// Check ErrorFlag
    if ( LSR & SCIF_LSR_ORER ||
		FSR & (SCIF_SSR_ER|SCIF_SSR_BRK|SCIF_SSR_FER|SCIF_SSR_PER) ){
	
		DEBUGMSG(ZONE_THREAD,(TEXT("ERROR - FSR : 0x%x  LSR : 0x%x\r\n"),FSR,LSR));
					
        interrupts = INTR_LINE;

    }else if ( LSR & SCIF_LSR_TO ){
		interrupts = INTR_RX;
//		WRITE_REGISTER_USHORT(pHWHead -> pLSR,
//			READ_REGISTER_USHORT(pHWHead -> pLSR) & ~(SCIF_LSR_TO));

	// DMA Transfer complate (Receive)
    }else if (*(pRxDma -> pvDINTSR) & (0x00000001 << (pRxDma -> Ch))){
        interrupts = INTR_RX;
		WRITE_REGISTER_ULONG(pRxDma -> pvDINTCR, 0x00000001 << (pRxDma -> Ch));

	// DMA Transfer complate (Transmit)
    }else if (*(pTxDma -> pvDINTSR) & (0x00000001 << (pTxDma -> Ch))){
        interrupts = INTR_TX;
		WRITE_REGISTER_ULONG(pTxDma -> pvDINTCR, 0x00000001 << (pTxDma -> Ch));
		while( !(READ_REGISTER_USHORT(pHWHead->pFSR) & SCIF_SSR_TEND) );
        WRITE_REGISTER_USHORT(pHWHead -> pSCR, READ_REGISTER_USHORT(pHWHead -> pSCR) | SCIF_SCR_RE);
		SetEvent(pHWHead->FlushDone);
    }

    if (pHWHead->AddTXIntr) {
        interrupts |= INTR_TX;
        pHWHead->AddTXIntr = FALSE;
    }

    DEBUGMSG (ZONE_THREAD,
          (TEXT("-SerGetInterruptType 0x%X, 0x%X\r\n"),
             pHead, interrupts));

    return interrupts;
}


#pragma optimize("", off)
//
// @doc OEM
// @func ULONG | SerTXIntr | This routine is called from the new MDD
//   whenever INTR_TX is returned by SerGetInterruptType.  It is responsible
//   for loading up the TX FIFO with next block of data.
// 
// @rdesc None
//
VOID
SCIF3TxIntr(
    PVOID pHead,                // Hardware Head
    PUCHAR pTxBuffer,          // @parm Pointer to receive buffer
    ULONG *pBuffLen            // @parm In = max bytes to transmit, out = bytes transmitted
    )
{
	PSCIF_INFO pHWHead = (PSCIF_INFO)pHead;
	DWORD	byteCount, transCount;
	DWORD	dcr_value;
	UCHAR dmy;

	if( *pBuffLen == 0 ){
		while( !(READ_REGISTER_USHORT(pHWHead->pFSR) & SCIF_SSR_TEND) );
        WRITE_REGISTER_USHORT(pHWHead -> pSCR, READ_REGISTER_USHORT(pHWHead -> pSCR) | SCIF_SCR_RE);
		return;
	}

    EnterCriticalSection(&(pHWHead->TransmitCritSec));

    if ( (ULONG)SCIF3_TXBUFFER_SIZE < *pBuffLen ){
        byteCount = SCIF3_TXBUFFER_SIZE;
    }else{
        byteCount = *pBuffLen;
    }

    DEBUGMSG (ZONE_WRITE | ZONE_THREAD,
              (TEXT("Put Bytes - Write max of %d bytes\r\n"),
               byteCount));

	*pBuffLen = 0;
    for( transCount = 0; byteCount; byteCount-- ){
 	*(pHWHead -> pTxBuff + (transCount++)) = *(pTxBuffer++);
        (*pBuffLen)++;
    }
    dmy = *(pHWHead -> pTxBuff + transCount - 1);

//	WRITE_REGISTER_USHORT(pHWHead -> pSCR, READ_REGISTER_USHORT(pHWHead -> pSCR) & ~SCIF_SCR_TE);
    WRITE_REGISTER_USHORT(pHWHead -> pSCR,
		(READ_REGISTER_USHORT(pHWHead -> pSCR)) & ~SCIF_SCR_RE);

    dcr_value = DCR_DPDS_8BIT		|
				DCR_DDRMD_MODULE	|
				DCR_DPDAM_FIX	 	|
				DCR_DMDL_PERIPHERAL	|
				DCR_SPDS_8BIT		|
				DCR_SDRMD_MODULE	|
				DCR_SPDAM_FIX		|
				DCR_SMDL_MEMORY		|
				DCR_DIP_1PAGE		|
				DCR_ACMD_DISABLE	|
				DCR_CT_DISABLE		|
				DCR_PKMD_DISABLE	|
				DCR_BTMD_ENABLE		|
				DCR_DTAU_BYTE		|
				DCR_DTAC_DISABLE	;	

	try {
		dma_SetPage(pHWHead -> pTxDma, 0, SCIF3_TX_BUFFER_BASE, SCIF3_REGBASE + SCIF_SCFTDR_OFFSET, (ULONG)transCount);
		dma_SetPort(pHWHead -> pTxDma, DPTR_DDPT_SCIF3);
		dma_SetControl(pHWHead -> pTxDma, dcr_value);
		dma_SetCommand(pHWHead -> pTxDma, DCMDR_DMEN);
		dma_InterruptEnable(pHWHead -> pTxDma);
	}
	except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
		EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
    }

    LeaveCriticalSection(&(pHWHead->TransmitCritSec));

    DEBUGMSG (ZONE_WRITE, (TEXT("-PutBytes - sent %d.\r\n"),
                           *pBuffLen));

    return;
}
#pragma optimize("", on)


//
// @doc OEM
// @func ULONG | SCIF3_OtherIntr | This routine is called from the MDD
//   whenever INTR_MODEM is returned by SCIF_GetInterruptType.
// 
// @rdesc None
//
VOID
SCIF3OtherIntr(
    PVOID pHead                // Hardware Head
    )
{
    PSCIF_INFO   pHWHead	= (PSCIF_INFO)pHead;
    USHORT MSR;

    DEBUGMSG (ZONE_FUNCTION,
              (TEXT("+SCIF3OtherIntr 0x%X\r\n"), pHead));

    MSR = (USHORT)ReadModemStatus( pHWHead );
    try
    {
        if ( pHWHead -> CTSFlowOff && (MSR & SCIF_SPTR_CTS) ){
            pHWHead -> CTSFlowOff = FALSE;
            WRITE_REGISTER_USHORT(pHWHead -> pSCR, READ_REGISTER_USHORT(pHWHead -> pSCR) | SCIF_SCR_TIE);
            pHWHead -> AddTXIntr = TRUE;
        }
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        // Just exit
    }
    

    DEBUGMSG (ZONE_FUNCTION,
              (TEXT("-SCIF3OtherIntr 0x%X\r\n"), pHead));
}


//
// @doc OEM
// @func ULONG | SL_OtherIntr | This routine is called from the MDD
//   whenever INTR_MODEM is returned by SL_GetInterruptType.
// 
// @rdesc None
//
VOID
SCIF3ModemIntr(
            PVOID pHead                // Hardware Head
            )
{
    SCIF3OtherIntr(pHead);
}


//  
// @doc OEM
// @func	ULONG | SerGetStatus | This structure is called by the MDD
//   to retrieve the contents of a COMSTAT structure.
//
// @rdesc	The return is a ULONG, representing success (0) or failure (-1).
//
ULONG
SCIF3GetStatus(
    PVOID	pHead,	// @parm PVOID returned by HWInit.
    LPCOMSTAT	lpStat	// Pointer to LPCOMMSTAT to hold status.
    )
{
    PSCIF_INFO pHWHead = (PSCIF_INFO)pHead;
    ULONG	  RetVal  = pHWHead->CommErrors;
    
    DEBUGMSG (ZONE_FUNCTION,
              (TEXT("+SCIF3GetStatus 0x%X\r\n"), pHead));

    pHWHead->CommErrors = 0; // Clear old errors each time

    if ( lpStat )
    {
        if ( pHWHead -> CTSFlowOff )
            pHWHead -> Status.fCtsHold = 1;
        else
            pHWHead -> Status.fCtsHold = 0;

        if ( pHWHead -> CommCharInQueue )
            pHWHead -> Status.fTxim = TRUE;
        else
            pHWHead -> Status.fTxim = FALSE;
        memcpy(lpStat, &(pHWHead->Status), sizeof(COMSTAT));
    }
    else
        RetVal = (ULONG)-1;

    DEBUGMSG (ZONE_FUNCTION,
              (TEXT("-SCIF3GetStatus 0x%X\r\n"), pHead));
    return RetVal;
}


/*
 @doc OEM
 @func BOOL | SCIF3_EnableIR | This routine enables ir.
 *  Not exported to users, only to driver.
 *
 @rdesc Returns TRUE if successful, FALSEotherwise.
 */
BOOL
SCIF3EnableIR(
    PVOID   pHead, // @parm PVOID returned by HWinit.
    ULONG   BaudRate  // @parm ULONG baudrate.
    )
{
    PSCIF_INFO pHWHead = (PSCIF_INFO)pHead;

    pHWHead->fIRMode = TRUE;
    WRITE_REGISTER_USHORT(pHWHead -> pSCSMR, SCIF_SCSMR_IRMOD_ON);

    SCIF_SetBaudRate(pHWHead, BaudRate);

    return TRUE;
}

/*
 @doc OEM
 @func BOOL | SCIF3_DisableIR | This routine disable the ir.
 *  Not exported to users, only to driver.
 *
 @rdesc Returns TRUE if successful, FALSEotherwise.
 */
BOOL
SCIF3DisableIR(
    PVOID   pHead /*@parm PVOID returned by HWinit. */
    )
{
    PSCIF_INFO pHWHead = (PSCIF_INFO)pHead;

    pHWHead->fIRMode = FALSE;
    WRITE_REGISTER_USHORT(pHWHead -> pSCSMR, (READ_REGISTER_USHORT(pHWHead -> pSCSMR) & ~SCIF_SCSMR_IRMOD_ON));

    return TRUE;
}


const
HW_VTBL SCIF3IoVTbl = {
    SCIF3Init,
    SCIF_PostInit,
    SCIF_Deinit,
    SCIF3Open,
    SCIF_Close,
    SCIF3GetInterruptType,
    SCIF_RxIntr,
    SCIF3TxIntr,
    SCIF3ModemIntr,
    SCIF_LineIntr,
    SCIF_GetRxBufferSize,
    SCIF_PowerOff,
    SCIF_PowerOn,
    SCIF_ClearDTR,
    SCIF_SetDTR,
    SCIF3ClearRTS,
    SCIF3SetRTS,
    SCIF3EnableIR,
    SCIF3DisableIR,
    SCIF_ClearBreak,
    SCIF_SetBreak,
    SCIF_XmitComChar,
    SCIF3GetStatus,
    SCIF_Reset,
    SCIF_GetModemStatus,
    SCIF_GetCommProperties,
    SCIF_PurgeComm,
    SCIF_SetDCB,
    SCIF_SetCommTimeouts,
    SCIF_Ioctl};