dma.c

WinCE5.0BSP for Renesas SH7770

//
//  Copyright(C) Renesas Technology Corp. 2002-2005. All rights reserved.
//
// Bus Bridge DMA Utilities for ITS-DS7
//
// FILE     : dma.c
// CREATED  : 2002.02.25
// MODIFIED : 2005.06.21
// AUTHOR   : Renesas Technology Corp.
// HARDWARE : RENESAS ITS-DS7
// HISTORY  : 
//            2003.07.02
//            - Created release code.
//                (based on WaveDev driver for ITS-DS4 Ver.2.2.0 for WCE4.1)
//            2005.06.21
//            - Revised BitOff macro.
//

#define WINCEMACRO 1
#include<windows.h>
#include"platform.h"
#include"sh7770.h"
#include"dma.h"

#define BitOn(val, num)		(val = (val | (0x00000001 << num)) )
#define BitOff(val, num)	(val = (val & ~(0x00000001 << num)) )
#define BitCheck(val, num)	(val & (0x00000001 << num) )


BOOL dma_Init(int Ch, PDMA_INFO *pRetDmaInfo){

	PDMA_INFO	pDmaInfo;

	pDmaInfo = (PDMA_INFO)LocalAlloc(LPTR, sizeof(DMA_INFO));

	if(!pDmaInfo) goto error_return;

	pDmaInfo->pvRegBase = (PVOID)VirtualAlloc(NULL, SH7770_DMAC_REGSIZE, MEM_RESERVE, PAGE_NOACCESS);
	if(!pDmaInfo->pvRegBase) goto error_return;
	
	if(! VirtualCopy((PVOID)pDmaInfo->pvRegBase, (PVOID)SH7770_DMAC_REGBASE,
			SH7770_DMAC_REGSIZE, PAGE_READWRITE|PAGE_NOCACHE)) goto error_return;

	pDmaInfo->pvDSAR0  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DSAR0_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDDAR0  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DDAR0_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDTCR0  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DTCR0_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDSAR1  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DSAR1_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDDAR1  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DDAR1_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDTCR1  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DTCR1_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDSASR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DSASR_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDDASR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DDASR_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDTCSR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DTCSR_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDPTR   = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DPTR_OFFSET +(0x40*Ch)));
	pDmaInfo->pvDCR    = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DCR_OFFSET  +(0x40*Ch)));
	pDmaInfo->pvDCMDR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DCMDR_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDSTPR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DSTPR_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDSTSR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DSTSR_OFFSET+(0x40*Ch)));
	pDmaInfo->pvDTIMR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DTIMR_OFFSET));
	pDmaInfo->pvDRMSKR = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DRMSKR_OFFSET));
	pDmaInfo->pvDMLVLR = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DMLVLR_OFFSET));
	pDmaInfo->pvDINTSR = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DINTSR_OFFSET));
	pDmaInfo->pvDINTCR = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DINTCR_OFFSET));
	pDmaInfo->pvDINTMR = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DINTMR_OFFSET));
	pDmaInfo->pvDACTSR = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_DACTSR_OFFSET));
	pDmaInfo->pvSRSTR  = (PVULONG)(((PBYTE)pDmaInfo->pvRegBase+DMAC_SRSTR0_OFFSET+(0x4*Ch)));

	pDmaInfo->Ch = Ch;

	*pRetDmaInfo = pDmaInfo;

	return TRUE;
	
error_return:

	if(pDmaInfo->pvRegBase != NULL)
		VirtualFree((PVOID)(pDmaInfo->pvRegBase), SH7770_DMAC_REGSIZE, MEM_RELEASE);
	if(pDmaInfo != NULL)
		VirtualFree((PVOID)pDmaInfo, sizeof(DMA_INFO), MEM_RELEASE);

	return FALSE;
}

BOOL dma_Deinit(PDMA_INFO pDmaInfo){

	if(pDmaInfo != NULL){

	if(pDmaInfo->pvRegBase != NULL)
		VirtualFree((PVOID)(pDmaInfo->pvRegBase), SH7770_DMAC_REGSIZE, MEM_RELEASE);

//	if(pDmaInfo != NULL)
		VirtualFree((PVOID)pDmaInfo, sizeof(DMA_INFO), MEM_RELEASE);
	}

	return TRUE;

}

BOOL dma_SetPort(PDMA_INFO pDmaInfo, DWORD DPTR){

	WRITE_REGISTER_ULONG(pDmaInfo->pvDPTR, DPTR);

	return TRUE;

}

BOOL dma_SetPage(PDMA_INFO pDmaInfo, DWORD PageNum,
			  DWORD SrcAddr, DWORD DstAddr, DWORD Size){

	if(PageNum == 0){
		WRITE_REGISTER_ULONG(pDmaInfo->pvDSAR0, SrcAddr);
		WRITE_REGISTER_ULONG(pDmaInfo->pvDDAR0, DstAddr);
		WRITE_REGISTER_ULONG(pDmaInfo->pvDTCR0, Size);
	}else{
		WRITE_REGISTER_ULONG(pDmaInfo->pvDSAR1, SrcAddr);
		WRITE_REGISTER_ULONG(pDmaInfo->pvDDAR1, DstAddr);
		WRITE_REGISTER_ULONG(pDmaInfo->pvDTCR1, Size);
	}

	return TRUE;

}

BOOL dma_SetControl(PDMA_INFO pDmaInfo, DWORD DCR){

	// Set up DMA Control Reg

	WRITE_REGISTER_ULONG(pDmaInfo->pvDCR, DCR);

	return TRUE;
}

BOOL dma_SetCommand(PDMA_INFO pDmaInfo, DWORD DCMDR){

	// Set up DMA Command Reg

	WRITE_REGISTER_ULONG(pDmaInfo->pvDCMDR, DCMDR);

	return TRUE;
}

BOOL dma_InterruptEnable(PDMA_INFO pDmaInfo){
	DWORD DINTMR;

	// Interrupt enable

	DINTMR = READ_REGISTER_ULONG(pDmaInfo->pvDINTMR);

	BitOn(DINTMR, pDmaInfo->Ch);

	WRITE_REGISTER_ULONG(pDmaInfo->pvDINTMR, DINTMR);

	return TRUE;
}

BOOL dma_InterruptDisable(PDMA_INFO pDmaInfo){
	DWORD	DINTMR;

	// Interrupt disable

	DINTMR = READ_REGISTER_ULONG(pDmaInfo->pvDINTMR);

	BitOff(DINTMR, pDmaInfo->Ch);

	WRITE_REGISTER_ULONG(pDmaInfo->pvDINTMR, DINTMR);

	return TRUE;

}

BOOL dma_Stop(PDMA_INFO pDmaInfo){

	WRITE_REGISTER_ULONG(pDmaInfo->pvDSTPR, 1);
	return TRUE;
}

//BOOL dma_IsFinished(PDMA_INFO pDmaInfo, DWORD DINTSR){
//
//	if(BitCheck(DINTSR, pDmaInfo->Ch)){
//
//		BitOff(DINTSR, pDmaInfo->Ch);
//
//		return TRUE; // This bit is interrupt finished.
//
//	}else{
//
//		return FALSE; // This bit is interrupt finished.
//
//	}
//
//	return FALSE; 
//
//}

BOOL dma_IsFinished(PDMA_INFO pDmaInfo){

	DWORD	DINTSR;
	DWORD	DINTCR = 0;

	DINTSR = READ_REGISTER_ULONG(pDmaInfo->pvDINTSR);
	
	if(BitCheck(DINTSR, pDmaInfo->Ch)){

		BitOn(DINTCR, pDmaInfo->Ch);
		WRITE_REGISTER_ULONG(pDmaInfo->pvDINTCR, DINTCR);

		return TRUE; // This bit is interrupt finished.

	}else{

		return FALSE; // This bit is interrupt finished.

	}

	return FALSE; 

}

BOOL dma_InterruptClear(PDMA_INFO pDmaInfo){
	
	DWORD	DINTCR;

	DINTCR = READ_REGISTER_ULONG(pDmaInfo->pvDINTCR);
	BitOn(DINTCR, pDmaInfo->Ch);
	WRITE_REGISTER_ULONG(pDmaInfo->pvDINTCR, DINTCR);

	return TRUE;
}