fpga_isr.c

WinCE5.0BSP for Renesas SH7770

//
//  Copyright(C) Renesas Technology Corp. 2003-2005. All rights reserved.
//
//  NK Kernel for ITS-DS7 Ver.1.0.0
//
//  FILE      : fpga_isr.c
//  CREATED   : 2003.06.20
//  MODIFIED  : 2005.02.03
//  AUTHOR    : Renesas Technology Corp.
//  HARDWARE  : RENESAS ITS-DS7
//  HISTORY   : 
//              2003.06.20
//              - Created release code.
//              2004.02.06
//              - Added PCMCIA.
//              2004.09.01
//              - Created release code for WCE5.0.
//              2005.02.03
//              - Supported PCCARD driver.

#include <windows.h>
#include <platform.h>
#include <sh7770.h>
#include <oalintr.h>
#include <drv_glob.h>

#define pDriverGlobals ((PDRIVER_GLOBALS) DRIVER_GLOBALS_PHYSICAL_MEMORY_START) 
#define MR_SHPC_INTR_0 (PCMCIA0_REG_BASE + MR_SHPC_INTR_OFFSET)
#define MR_SHPC_INTR_1 (PCMCIA1_REG_BASE + MR_SHPC_INTR_OFFSET)

#pragma optimize("", off)
//
// FPGA ISR
//
int	fpga_isr(
	void
	)
{
	ULONG	reg = 0;
	ULONG	mask = 0;
	USHORT pcmcia_intr;
#ifdef	DEBUG
/*
	char string[8];
	static int i = 0;
*/
/*
		string[0] = 'F';
		string[1] = 'P';
		string[2] = 'G';
		string[3] = 'A';
		string[4] = '0' + (i %  1000) /  100;
		string[5] = '0' + (i %   100) /   10;
		string[6] = '0' + (i %    10);
		string[7] = '\0';
		PrintLED(string);

		if( ++i > 1000 )	i = 0;
*/
#endif

	// IRQ0 Interrupts Request Clear
	WRITE_REGISTER_ULONG(INTC_INTREQ, READ_REGISTER_ULONG(INTC_INTREQ) & ~INTC_INTREQ_IRQ0);
	reg = READ_REGISTER_ULONG(INTC_INTREQ);		// Coherency measures

	// Get IRQ0 Status Register
	reg = READ_REGISTER_USHORT(SF_IRQ0SR);
	mask = READ_REGISTER_USHORT(SF_IRQ0MR);

#ifdef DEBUG
/*
		string[0] = '0'+(UCHAR)((reg>>6) & 1);	//PCC1
		string[1] = '0'+(UCHAR)((reg>>5) & 1);	//PCC0
		string[2] = '0'+(UCHAR)((reg>>4) & 1);	//LAN
		string[3] = '0'+(UCHAR)((reg>>3) & 1);	//200EX
		string[4] = '0'+(UCHAR)((reg>>2) & 1);	//SLOT2
		string[5] = '0'+(UCHAR)((reg>>1) & 1);	//SLOT1
		string[6] = '0'+(UCHAR)((reg)    & 1);	//SLOT0
		string[7] = '\0';

		PrintLED(string);
*/
#endif

    // Ethernet Interrupts
    if( reg & (~mask) & SF_IRQ0SR_LAN ){
#ifdef	DEBUG
		// Output to LED (IRQ0SR:b6-b0)
		/*
		string[0] = '0'+(UCHAR)((reg>>6) & 1);
		string[1] = '0'+(UCHAR)((reg>>5) & 1);
		string[2] = '0'+(UCHAR)((reg>>4) & 1);
		string[3] = '0'+(UCHAR)((reg>>3) & 1);
		string[4] = '0'+(UCHAR)((reg>>2) & 1);
		string[5] = '0'+(UCHAR)((reg>>1) & 1);
		string[6] = '0'+(UCHAR)((reg)    & 1);
		string[7] = '\0';

		PrintLED(string);
		*/
#endif

//		WRITE_REGISTER_ULONG(INTC_INTMSK0, INTC_INTMSK0_IM00);											// IRQ0 Interrupts mask
//		WRITE_REGISTER_ULONG(SF_IRQ0MR, READ_REGISTER_ULONG(SF_IRQ0MR) | SF_IRQ0MR_LAN);				// IRQ0 Interrupts mask (FPGA:LAN)
		WRITE_REGISTER_USHORT(SF_IRQ0MR, READ_REGISTER_USHORT(SF_IRQ0MR) | SF_IRQ0MR_LAN);				// IRQ0 Interrupts mask (FPGA:LAN)

//        RETAILMSG(1, (TEXT("fpga_isr:SYSINTR_ETHER.\r\n")));

        return SYSINTR_ETHER;
    }

    // PCMCIA Interrupts
	else if(reg & (~mask) & SF_IRQ0SR_PCC0){
		//Mask PCMCIA0 interrupts (FPGA register)
		WRITE_REGISTER_USHORT(SF_IRQ0MR, READ_REGISTER_USHORT(SF_IRQ0MR) | SF_IRQ0MR_PCC0);				// IRQ0 Interrupts mask (FPGA:PCC0)
        
		pcmcia_intr = READ_REGISTER_USHORT(MR_SHPC_INTR_0);
        pDriverGlobals->pcm.slot0Enable = pcmcia_intr;

        if (pcmcia_intr & MR_SHPC_INTR_CARD_DETECT){
#ifdef DEBUG 
            PrintLED("-DETECT-");
#endif
//            pDriverGlobals->pcm.slot0Enable &=~ MR_SHPC_INTR_CARD_DETECT;
            return SYSINTR_PCMCIA_STATE;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_STSCHG){
#ifdef DEBUG 
            PrintLED("-STSCHG-");
#endif
//            pDriverGlobals->pcm.slot0Enable &=~ MR_SHPC_INTR_STSCHG;
            return SYSINTR_PCMCIA_STATE;
        } 

        else if(pcmcia_intr & MR_SHPC_INTR_IREQ_CHG){
#ifdef DEBUG 
            PrintLED("IREQ_CHG");
#endif
//            pDriverGlobals->pcm.slot0Enable &=~ MR_SHPC_INTR_IREQ_CHG;
            return SYSINTR_PCMCIA_LEVEL;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_CARD_PWR){
#ifdef DEBUG 
            PrintLED("CARD_PWR");
#endif
//            pDriverGlobals->pcm.slot0Enable &=~ MR_SHPC_INTR_CARD_PWR;
            return SYSINTR_PCMCIA_STATE;
        } 

        else if(pcmcia_intr & MR_SHPC_INTR_RDY_CHG){
#ifdef DEBUG 
            PrintLED("RDY_CHG");
#endif
//            pDriverGlobals->pcm.slot0Enable &=~ MR_SHPC_INTR_RDY_CHG;
            return SYSINTR_PCMCIA_STATE;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_BAT_WARN){

#ifdef DEBUG 
            PrintLED("BAT_WARN");
#endif
//            pDriverGlobals->pcm.slot0Enable &=~ MR_SHPC_INTR_BAT_WARN;
            return SYSINTR_PCMCIA_STATE;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_BAT_DEAD){
#ifdef DEBUG 
            PrintLED("BAT_DEAD");
#endif
//            pDriverGlobals->pcm.slot0Enable &=~ MR_SHPC_INTR_BAT_DEAD;
            return SYSINTR_PCMCIA_STATE;
        }
        else{
#ifndef DEBUG 
            PrintLED("-pcmcia-");
#endif
			WRITE_REGISTER_USHORT(SF_IRQ0MR, READ_REGISTER_USHORT(SF_IRQ0MR) & ~SF_IRQ0MR_PCC0);				// IRQ0 Interrupts mask (FPGA:PCC0)
            return SYSINTR_NOP;
        }
	}
	else if(reg & (~mask) & SF_IRQ0SR_PCC1){
		//Mask PCMCIA1 interrupts (FPGA register)
		WRITE_REGISTER_USHORT(SF_IRQ0MR, READ_REGISTER_USHORT(SF_IRQ0MR) | SF_IRQ0MR_PCC1);				// IRQ0 Interrupts mask (FPGA:PCC1)
        
		pcmcia_intr = READ_REGISTER_USHORT(MR_SHPC_INTR_1);
        pDriverGlobals->pcm.slot1Enable = pcmcia_intr;

        if (pcmcia_intr & MR_SHPC_INTR_CARD_DETECT){
#ifdef DEBUG 
            PrintLED("-DETECT-");
#endif
//            pDriverGlobals->pcm.slot1Enable &=~ MR_SHPC_INTR_CARD_DETECT;
            return SYSINTR_PCMCIA_STATE;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_STSCHG){
#ifdef DEBUG 
            PrintLED("-STSCHG-");
#endif
//            pDriverGlobals->pcm.slot1Enable &=~ MR_SHPC_INTR_STSCHG;
            return SYSINTR_PCMCIA_STATE;
        } 

        else if(pcmcia_intr & MR_SHPC_INTR_IREQ_CHG){
#ifdef DEBUG 
            PrintLED("IREQ_CHG");
#endif
//            pDriverGlobals->pcm.slot1Enable &=~ MR_SHPC_INTR_IREQ_CHG;
            return SYSINTR_PCMCIA_LEVEL_1;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_CARD_PWR){
#ifdef DEBUG 
            PrintLED("CARD_PWR");
#endif
//            pDriverGlobals->pcm.slot1Enable &=~ MR_SHPC_INTR_CARD_PWR;
            return SYSINTR_PCMCIA_STATE;
        } 

        else if(pcmcia_intr & MR_SHPC_INTR_RDY_CHG){
#ifdef DEBUG 
            PrintLED("RDY_CHG");
#endif
//            pDriverGlobals->pcm.slot1Enable &=~ MR_SHPC_INTR_RDY_CHG;
            return SYSINTR_PCMCIA_STATE;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_BAT_WARN){

#ifdef DEBUG 
            PrintLED("BAT_WARN");
#endif
//            pDriverGlobals->pcm.slot1Enable &=~ MR_SHPC_INTR_BAT_WARN;
            return SYSINTR_PCMCIA_STATE;
        }

        else if(pcmcia_intr & MR_SHPC_INTR_BAT_DEAD){
#ifdef DEBUG 
            PrintLED("BAT_DEAD");
#endif
//            pDriverGlobals->pcm.slot1Enable &=~ MR_SHPC_INTR_BAT_DEAD;
            return SYSINTR_PCMCIA_STATE;
        }
        else{
#ifndef DEBUG 
            PrintLED("-pcmcia-");
#endif
			WRITE_REGISTER_USHORT(SF_IRQ0MR, READ_REGISTER_USHORT(SF_IRQ0MR) & ~SF_IRQ0MR_PCC1);				// IRQ0 Interrupts mask (FPGA:PCC1)
            return SYSINTR_NOP;
        }	
	}

    else{
#ifdef	DEBUG
		/*
		string[0] = '0';
		string[1] = '0';
		string[2] = '0' + (i / 10000);
		string[3] = '0' + (i % 10000) / 1000;
		string[4] = '0' + (i %  1000) /  100;
		string[5] = '0' + (i %   100) /   10;
		string[6] = '0' + (i %    10);
		string[7] = '\0';
		PrintLED(string);

		if( ++i > 100000 )	i = 0;
		*/
#endif

        return SYSINTR_NOP;
    }
}
#pragma optimize("", on)