data_unite.twr

FPGA高速完成AD采集回来的数据进行高速读写FLASH存储

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Release 7.1i Trace H.38
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

D:/Xilinx/bin/nt/trce.exe -ise d:\2222\2222.ise -intstyle ise -e 3 -l 3 -s 6
-xml data_unite data_unite.ncd -o data_unite.twr data_unite.pcf


Design file:              data_unite.ncd
Physical constraint file: data_unite.pcf
Device,speed:             xc2s100e,-6 (PRODUCTION 1.18 2005-01-22)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
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INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Pad to Pad
---------------+---------------+---------+
Source Pad     |Destination Pad|  Delay  |
---------------+---------------+---------+
datain1<0>     |dataout<0>     |    5.848|
datain1<1>     |dataout<1>     |    6.049|
datain2<0>     |dataout<2>     |    5.916|
datain2<1>     |dataout<3>     |    5.876|
datain3<0>     |dataout<4>     |    6.023|
datain3<1>     |dataout<5>     |    5.989|
datain4<0>     |dataout<6>     |    6.049|
datain4<1>     |dataout<7>     |    5.989|
datain5<0>     |dataout<8>     |    5.848|
datain5<1>     |dataout<9>     |    6.310|
datain6<0>     |dataout<10>    |    5.916|
datain6<1>     |dataout<11>    |    6.733|
---------------+---------------+---------+

Analysis completed Mon Oct 13 11:03:13 2008
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Peak Memory Usage: 69 MB