fifo_unite.sch

FPGA高速完成AD采集回来的数据进行高速读写FLASH存储

VERSION 6
BEGIN SCHEMATIC
    BEGIN ATTR DeviceFamilyName "spartan2e"
        DELETE all:0
        EDITNAME all:0
        EDITTRAIT all:0
    END ATTR
    BEGIN NETLIST
        SIGNAL XLXN_94(3:0)
        SIGNAL XLXN_74(3:0)
        SIGNAL XLXN_82(3:0)
        SIGNAL XLXN_136(3:0)
        SIGNAL datain(7:0)
        SIGNAL dataout(7:0)
        SIGNAL XLXN_138
        SIGNAL XLXN_143
        SIGNAL XLXN_144
        SIGNAL addwr(9:0)
        SIGNAL XLXN_147
        SIGNAL fifowr
        SIGNAL XLXN_152
        SIGNAL fiford
        SIGNAL addrd(9:0)
        PORT Input datain(7:0)
        PORT Output dataout(7:0)
        PORT Input addwr(9:0)
        PORT Input fifowr
        PORT Input fiford
        PORT Input addrd(9:0)
        BEGIN BLOCKDEF ramb4_s4_s4
            TIMESTAMP 2001 2 2 12 54 28
            LINE N 0 -960 64 -960 
            LINE N 0 -896 64 -896 
            LINE N 0 -832 64 -832 
            LINE N 0 -512 64 -512 
            LINE N 0 -448 64 -448 
            LINE N 0 -384 64 -384 
            LINE N 0 -320 64 -320 
            LINE N 0 -256 64 -256 
            LINE N 0 -192 64 -192 
            LINE N 0 -768 64 -768 
            LINE N 0 -1024 64 -1024 
            LINE N 0 -704 64 -704 
            LINE N 608 -864 544 -864 
            LINE N 608 -352 544 -352 
            LINE N 544 -640 480 -640 
            LINE N 480 -640 480 -576 
            LINE N 480 -576 544 -576 
            LINE N 544 -576 544 -128 
            LINE N 544 -128 64 -128 
            LINE N 64 -128 64 -576 
            LINE N 64 -576 128 -576 
            LINE N 128 -576 128 -640 
            LINE N 128 -640 64 -640 
            LINE N 64 -304 80 -320 
            LINE N 80 -320 64 -336 
            RECTANGLE N 0 -272 64 -240 
            RECTANGLE N 0 -208 64 -176 
            RECTANGLE N 0 -784 64 -752 
            RECTANGLE N 0 -720 64 -688 
            LINE N 64 -816 80 -832 
            LINE N 80 -832 64 -848 
            LINE N 64 -1088 64 -640 
            LINE N 544 -640 544 -1088 
            LINE N 544 -1088 64 -1088 
            RECTANGLE N 544 -880 608 -848 
            RECTANGLE N 544 -368 608 -336 
        END BLOCKDEF
        BEGIN BLOCKDEF vcc
            TIMESTAMP 2001 2 2 12 52 44
            LINE N 64 -32 64 -64 
            LINE N 64 0 64 -32 
            LINE N 96 -64 32 -64 
        END BLOCKDEF
        BEGIN BLOCKDEF gnd
            TIMESTAMP 2001 2 2 12 52 44
            LINE N 64 -64 64 -96 
            LINE N 76 -48 52 -48 
            LINE N 68 -32 60 -32 
            LINE N 88 -64 40 -64 
            LINE N 64 -64 64 -80 
            LINE N 64 -128 64 -96 
        END BLOCKDEF
        BEGIN BLOCKDEF data_depart
            TIMESTAMP 2008 5 19 9 26 5
            LINE N 64 -224 0 -224 
            RECTANGLE N 0 -236 64 -212 
            RECTANGLE N 64 -256 320 0 
            LINE N 320 -224 384 -224 
            RECTANGLE N 320 -236 384 -212 
            LINE N 320 -160 384 -160 
            RECTANGLE N 320 -172 384 -148 
        END BLOCKDEF
        BEGIN BLOCKDEF data_unite
            TIMESTAMP 2008 5 19 4 24 54
            LINE N 320 -224 384 -224 
            RECTANGLE N 320 -236 384 -212 
            RECTANGLE N 64 -256 320 -8 
            LINE N 64 -224 0 -224 
            RECTANGLE N 0 -236 64 -212 
            LINE N 64 -160 0 -160 
            RECTANGLE N 0 -172 64 -148 
        END BLOCKDEF
        BEGIN BLOCK XLXI_10 vcc
            PIN P XLXN_143
        END BLOCK
        BEGIN BLOCK XLXI_12 gnd
            PIN G XLXN_147
        END BLOCK
        BEGIN BLOCK XLXI_13 gnd
            PIN G XLXN_138
        END BLOCK
        BEGIN BLOCK XLXI_11 vcc
            PIN P XLXN_144
        END BLOCK
        BEGIN BLOCK XLXI_14 gnd
            PIN G XLXN_152
        END BLOCK
        BEGIN BLOCK XLXI_6 ramb4_s4_s4
            PIN ADDRA(9:0) addwr(9:0)
            PIN ADDRB(9:0) addrd(9:0)
            PIN CLKA fifowr
            PIN CLKB fiford
            PIN DIA(3:0) XLXN_136(3:0)
            PIN DIB(3:0) XLXN_136(3:0)
            PIN ENA XLXN_143
            PIN ENB XLXN_144
            PIN RSTA XLXN_147
            PIN RSTB XLXN_152
            PIN WEA XLXN_143
            PIN WEB XLXN_138
            PIN DOA(3:0)
            PIN DOB(3:0) XLXN_74(3:0)
        END BLOCK
        BEGIN BLOCK XLXI_7 ramb4_s4_s4
            PIN ADDRA(9:0) addwr(9:0)
            PIN ADDRB(9:0) addrd(9:0)
            PIN CLKA fifowr
            PIN CLKB fiford
            PIN DIA(3:0) XLXN_94(3:0)
            PIN DIB(3:0) XLXN_94(3:0)
            PIN ENA XLXN_143
            PIN ENB XLXN_144
            PIN RSTA XLXN_147
            PIN RSTB XLXN_152
            PIN WEA XLXN_143
            PIN WEB XLXN_138
            PIN DOA(3:0)
            PIN DOB(3:0) XLXN_82(3:0)
        END BLOCK
        BEGIN BLOCK XLXI_23 data_depart
            PIN datain(7:0) datain(7:0)
            PIN data0out(3:0) XLXN_136(3:0)
            PIN data1out(3:0) XLXN_94(3:0)
        END BLOCK
        BEGIN BLOCK XLXI_25 data_unite
            PIN data0in(3:0) XLXN_74(3:0)
            PIN data1in(3:0) XLXN_82(3:0)
            PIN dataout(7:0) dataout(7:0)
        END BLOCK
    END NETLIST
    BEGIN SHEET 1 7609 5382
        ATTR LengthUnitName "CM"
        ATTR GridsPerUnit "4"
        INSTANCE XLXI_10 1808 704 R270
        INSTANCE XLXI_12 1680 704 R90
        INSTANCE XLXI_13 1696 1088 R90
        INSTANCE XLXI_11 1808 1280 R270
        INSTANCE XLXI_14 1616 1216 R90
        BEGIN BRANCH XLXN_94(3:0)
            WIRE 832 2448 1792 2448
            WIRE 1792 2128 2944 2128
            WIRE 2944 2128 2944 2640
            WIRE 2944 2640 3760 2640
            WIRE 2944 2128 3760 2128
            WIRE 1792 2128 1792 2448
        END BRANCH
        INSTANCE XLXI_6 3760 1664 R0
        INSTANCE XLXI_7 3760 2832 R0
        BEGIN BRANCH XLXN_136(3:0)
            WIRE 832 2384 1552 2384
            WIRE 1552 960 3344 960
            WIRE 3344 960 3760 960
            WIRE 3344 960 3344 1472
            WIRE 3344 1472 3760 1472
            WIRE 1552 960 1552 2384
        END BRANCH
        IOMARKER 1840 832 fifowr R180 28
        IOMARKER 1728 1344 fiford R180 28
        BEGIN BRANCH XLXN_82(3:0)
            WIRE 4368 2480 4656 2480
            WIRE 4656 2448 4656 2480
            WIRE 4656 2448 5216 2448
        END BRANCH
        BEGIN BRANCH XLXN_74(3:0)
            WIRE 4368 1312 4672 1312
            WIRE 4672 1312 4672 2384
            WIRE 4672 2384 5216 2384
        END BRANCH
        BEGIN INSTANCE XLXI_23 448 2608 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_25 5216 2608 R0
        END INSTANCE
        BEGIN BRANCH datain(7:0)
            WIRE 240 2384 448 2384
        END BRANCH
        BEGIN BRANCH dataout(7:0)
            WIRE 5600 2384 5776 2384
        END BRANCH
        BEGIN BRANCH XLXN_138
            WIRE 1824 1152 3680 1152
            WIRE 3680 1152 3760 1152
            WIRE 3680 1152 3680 2320
            WIRE 3680 2320 3760 2320
        END BRANCH
        BEGIN BRANCH XLXN_143
            WIRE 1808 640 1872 640
            WIRE 1872 640 1872 704
            WIRE 1872 704 3552 704
            WIRE 3552 704 3760 704
            WIRE 3552 704 3552 1872
            WIRE 3552 1872 3760 1872
            WIRE 1872 640 3616 640
            WIRE 3616 640 3760 640
            WIRE 3616 640 3616 1808
            WIRE 3616 1808 3760 1808
        END BRANCH
        BEGIN BRANCH XLXN_144
            WIRE 1808 1216 3488 1216
            WIRE 3488 1216 3760 1216
            WIRE 3488 1216 3488 2384
            WIRE 3488 2384 3760 2384
        END BRANCH
        BEGIN BRANCH addwr(9:0)
            WIRE 1984 896 3472 896
            WIRE 3472 896 3760 896
            WIRE 3472 896 3472 2064
            WIRE 3472 2064 3760 2064
        END BRANCH
        IOMARKER 1984 896 addwr(9:0) R180 28
        BEGIN BRANCH XLXN_147
            WIRE 1808 768 3312 768
            WIRE 3312 768 3760 768
            WIRE 3312 768 3312 1936
            WIRE 3312 1936 3760 1936
        END BRANCH
        BEGIN BRANCH fifowr
            WIRE 1840 832 3120 832
            WIRE 3120 832 3760 832
            WIRE 3120 832 3120 2000
            WIRE 3120 2000 3760 2000
        END BRANCH
        BEGIN BRANCH XLXN_152
            WIRE 1744 1280 2736 1280
            WIRE 2736 1280 3760 1280
            WIRE 2736 1280 2736 2448
            WIRE 2736 2448 3760 2448
        END BRANCH
        BEGIN BRANCH fiford
            WIRE 1728 1344 2528 1344
            WIRE 2528 1344 3760 1344
            WIRE 2528 1344 2528 2512
            WIRE 2528 2512 3760 2512
        END BRANCH
        BEGIN BRANCH addrd(9:0)
            WIRE 1888 1408 2992 1408
            WIRE 2992 1408 3760 1408
            WIRE 2992 1408 2992 2576
            WIRE 2992 2576 3760 2576
        END BRANCH
        IOMARKER 1888 1408 addrd(9:0) R180 28
        IOMARKER 240 2384 datain(7:0) R180 28
        IOMARKER 5776 2384 dataout(7:0) R0 28
    END SHEET
END SCHEMATIC