altera_up_avalon_rs232_hw.tcl

Builder uses to integrate a larger system module. Each component consists of a structured set of fi

# TCL File Generated by Altera University Program
# DO NOT MODIFY

# +-----------------------------------
# | module altera_up_avalon_rs232
# | 
set_module_property DESCRIPTION "RS232 UART Controller"
set_module_property NAME altera_up_avalon_rs232
set_module_property VERSION 8.0.0.1
set_module_property GROUP "University Program/Communications"
set_module_property AUTHOR "Altera University Program"
set_module_property DISPLAY_NAME "RS232 UART"
set_module_property DATASHEET_URL doc/Altera_UP_Avalon_RS232.pdf
#set_module_property TOP_LEVEL_HDL_FILE Altera_UP_Avalon_RS232.v
set_module_property TOP_LEVEL_HDL_MODULE Altera_UP_Avalon_RS232
set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
set_module_property EDITABLE false
set_module_property SIMULATION_MODEL_IN_VERILOG false
set_module_property SIMULATION_MODEL_IN_VHDL false
set_module_property SIMULATION_MODEL_HAS_TULIPS false
set_module_property SIMULATION_MODEL_IS_OBFUSCATED false
set_module_property GENERATION_CALLBACK generate
# | 
# +-----------------------------------

# +-----------------------------------
# | files
# | 
#add_file Altera_UP_Avalon_RS232.v {SYNTHESIS SIMULATION}
# | 
# +-----------------------------------

# +-----------------------------------
# | parameters
# | 
add_parameter baud int 115200
set_parameter_property baud DISPLAY_NAME "Baud Rate (bps)"
set_parameter_property baud GROUP "Baud Rate"
set_parameter_property baud UNITS None
set_parameter_property baud AFFECTS_PORT_WIDTHS false
set_parameter_property baud ALLOWED_RANGES {115200 57600 38400 31250 28800 19200 14400 9600 4800 2400 1200 300}
set_parameter_property baud VISIBLE true
set_parameter_property baud ENABLED true

add_parameter parity string None
set_parameter_property parity DISPLAY_NAME "Parity"
set_parameter_property parity GROUP "Data Format"
set_parameter_property parity UNITS None
set_parameter_property parity AFFECTS_PORT_WIDTHS false
set_parameter_property parity ALLOWED_RANGES {None Odd Even}
set_parameter_property parity VISIBLE true
set_parameter_property parity ENABLED true

add_parameter data_bits int 8
set_parameter_property data_bits DISPLAY_NAME "Data Bits"
set_parameter_property data_bits GROUP "Data Format"
set_parameter_property data_bits UNITS None
set_parameter_property data_bits AFFECTS_PORT_WIDTHS false
set_parameter_property data_bits ALLOWED_RANGES {7 8 9}
set_parameter_property data_bits VISIBLE true
set_parameter_property data_bits ENABLED true

add_parameter stop_bits int 1
set_parameter_property stop_bits DISPLAY_NAME "Stop Bits"
set_parameter_property stop_bits GROUP "Data Format"
set_parameter_property stop_bits UNITS None
set_parameter_property stop_bits AFFECTS_PORT_WIDTHS false
set_parameter_property stop_bits ALLOWED_RANGES {1 2}
set_parameter_property stop_bits VISIBLE true
set_parameter_property stop_bits ENABLED true
# | 
# +-----------------------------------

# +-----------------------------------
# | connection point clock_reset
# | 
add_interface clock_reset clock end
set_interface_property clock_reset ptfSchematicName ""

add_interface_port clock_reset clk clk Input 1
add_interface_port clock_reset reset reset Input 1
# | 
# +-----------------------------------

# +-----------------------------------
# | connection point avalon_rs232_slave
# | 
add_interface avalon_rs232_slave avalon end
set_interface_property avalon_rs232_slave holdTime 0
set_interface_property avalon_rs232_slave linewrapBursts false
set_interface_property avalon_rs232_slave minimumUninterruptedRunLength 1
set_interface_property avalon_rs232_slave bridgesToMaster ""
set_interface_property avalon_rs232_slave isMemoryDevice false
set_interface_property avalon_rs232_slave burstOnBurstBoundariesOnly false
set_interface_property avalon_rs232_slave addressSpan 8
set_interface_property avalon_rs232_slave timingUnits Cycles
set_interface_property avalon_rs232_slave setupTime 0
set_interface_property avalon_rs232_slave writeWaitTime 0
set_interface_property avalon_rs232_slave isNonVolatileStorage false
set_interface_property avalon_rs232_slave addressAlignment DYNAMIC
set_interface_property avalon_rs232_slave readWaitStates 0
set_interface_property avalon_rs232_slave maximumPendingReadTransactions 0
set_interface_property avalon_rs232_slave readWaitTime 0
set_interface_property avalon_rs232_slave readLatency 1
set_interface_property avalon_rs232_slave printableDevice false

set_interface_property avalon_rs232_slave ASSOCIATED_CLOCK clock_reset

add_interface_port avalon_rs232_slave address address Input 1
add_interface_port avalon_rs232_slave chipselect chipselect Input 1
add_interface_port avalon_rs232_slave byteenable byteenable Input 4
add_interface_port avalon_rs232_slave read read Input 1
add_interface_port avalon_rs232_slave write write Input 1
add_interface_port avalon_rs232_slave writedata writedata Input 32
add_interface_port avalon_rs232_slave readdata readdata Output 32
# | 
# +-----------------------------------

# +-----------------------------------
# | connection point external_interface
# | 
add_interface external_interface conduit end

set_interface_property external_interface ASSOCIATED_CLOCK clock_reset

add_interface_port external_interface UART_RXD export Input 1
add_interface_port external_interface UART_TXD export Output 1
# | 
# +-----------------------------------

# +-----------------------------------
# | connection point interrupt
# | 
add_interface interrupt interrupt end
set_interface_property interrupt associatedAddressablePoint avalon_rs232_slave

set_interface_property interrupt ASSOCIATED_CLOCK clock_reset

add_interface_port interrupt irq irq Output 1
# | 
# +-----------------------------------

# +-----------------------------------
# | Generation function
# | 
proc generate {} {
	send_message info "Starting Generation of RS232 UART"

	# get generation settings
	set language [ get_generation_setting HDL_LANGUAGE ] 
	set outdir [ get_generation_setting OUTPUT_DIRECTORY ] 
	set outname [ get_generation_setting OUTPUT_NAME ] 

	# get perl's path
	set qdr [ get_project_property QUARTUS_ROOTDIR ]
	set perl bin/perl/bin/perl.exe
	set perl "$qdr$perl"
	set perl_include sopc_builder/bin/perl_lib/
	if { [ file executable $perl ] } {
		set perl_include "-I$qdr$perl_include"
	} else {
		# But if it doesn't, maybe it can be found in the path:
		set perl "perl"
		set perl_include ""
	}

	# get parameter values
	set baud [ get_parameter_value "baud" ]
	set parity [ get_parameter_value "parity" ]
	set data_bits [ get_parameter_value "data_bits" ]
	set stop_bits [ get_parameter_value "stop_bits" ]

	set counter_width  [ format "%.0f" [ expr ceil (log(50000000 / $baud) / (log (2))) ] ]

	set baud_counter_width			"BAUD_COUNTER_WIDTH:$counter_width"
	set baud_tick_increment			"BAUD_TICK_INCREMENT:$counter_width'd1"
	set baud_tick_count				[ format "BAUD_TICK_COUNT:$counter_width'd%.0f" [ expr 50000000 / $baud ] ]
	set half_baud_tick_increment	[ format "HALF_BAUD_TICK_COUNT:$counter_width'd%.0f" [ expr 50000000 / ($baud * 2) ] ]

	if { $parity == "None" } {
		set total_data_width		[ format "TOTAL_DATA_WIDTH:%d" [ expr 2 + ($data_bits + $stop_bits) ] ]
	} else {
		set total_data_width		[ format "TOTAL_DATA_WIDTH:%d" [ expr 3 + ($data_bits + $stop_bits) ] ]
	}
	set data_width					"DATA_WIDTH:$data_bits"
	if { $parity == "Odd" } {
		set odd_parity				"ODD_PARITY:1'b1"
	} else {
		set odd_parity				"ODD_PARITY:1'b0"
	}

	# set section value
	if { $parity == "None" } {
		set use_parity	"USE_PARITY:0"
	} else {
		set use_parity	"USE_PARITY:1"
	}
	if { $data_width == 7 } {
		set use_dw_7	"USE_DATA_WIDTH_7:1"
		set use_dw_8	"USE_DATA_WIDTH_8:0"
	} elseif { $data_width == 8 } {
		set use_dw_7	"USE_DATA_WIDTH_7:0"
		set use_dw_8	"USE_DATA_WIDTH_8:1"
	} else {
		set use_dw_7	"USE_DATA_WIDTH_7:0"
		set use_dw_8	"USE_DATA_WIDTH_8:0"
	}

	# set arguments
	set files "Altera_UP_Avalon_RS232.v;Altera_UP_RS232_Counters.v;Altera_UP_RS232_In_Deserializer.v;Altera_UP_RS232_Out_Serializer.v;Altera_UP_SYNC_FIFO.v"
	set params "$baud_counter_width;$baud_tick_increment;$baud_tick_count;$half_baud_tick_increment;$total_data_width;$data_width;$odd_parity"
	set sections "$use_parity;$use_dw_7;$use_dw_8"

	# Generate HDL with perl
	exec $perl $perl_include UP_IP_Core_Generator.pl lang=$language dir=$outdir name=$outname files=$files params=$params sections=$sections
}
# | 
# +-----------------------------------