📄 ad9958.lst
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*** PUBLICS:
PUBLIC set_ad9958_pll?T
PUBLIC initialize_ad9958?T
PUBLIC set_frequency?T
PUBLIC set_phase?T
PUBLIC set_ad9958_synchronization?T
*** CODE SEGMENT '?PR?set_ad9958_synchronization?T?AD9958':
35: void set_ad9958_synchronization(void)
00000000 B500 PUSH {LR}
38: AD9958_CS_OFF
00000002 4800 LDR R1,=0x800000
00000004 4800 LDR R0,=0xE002801C
00000006 6001 STR R1,[R0,#0x0]
39: AD9958_UPDATE_OFF
00000008 4800 LDR R0,=0xE002800C
0000000A 6001 STR R1,[R0,#0x0]
40: send_data_to_spi(0x02);
0000000C 2002 MOV R0,#0x2
0000000E F7FF BL send_data_to_spi?T ; T=0x0001 (1)
00000010 FFF7 BL send_data_to_spi?T ; T=0x0001 (2)
41: send_data_to_spi(0x10);
00000012 2010 MOV R0,#0x10
00000014 F7FF BL send_data_to_spi?T ; T=0x0001 (1)
00000016 FFF4 BL send_data_to_spi?T ; T=0x0001 (2)
42: send_data_to_spi(0x00);
00000018 2000 MOV R0,#0x0
0000001A F7FF BL send_data_to_spi?T ; T=0x0001 (1)
0000001C FFF1 BL send_data_to_spi?T ; T=0x0001 (2)
43: AD9958_UPDATE_ON
0000001E 4800 LDR R1,=0x800000
00000020 4800 LDR R0,=0xE0028004
00000022 6001 STR R1,[R0,#0x0]
44: AD9958_CS_ON
00000024 4800 LDR R0,=0xE0028014
00000026 6001 STR R1,[R0,#0x0]
47: AD9958_CS_OFF
00000028 4800 LDR R0,=0xE002801C
0000002A 6001 STR R1,[R0,#0x0]
48: AD9958_UPDATE_OFF
0000002C 4800 LDR R0,=0xE002800C
0000002E 6001 STR R1,[R0,#0x0]
49: send_data_to_spi(0x02);
00000030 2002 MOV R0,#0x2
00000032 F7FF BL send_data_to_spi?T ; T=0x0001 (1)
00000034 FFE5 BL send_data_to_spi?T ; T=0x0001 (2)
50: send_data_to_spi(0x00);
00000036 2000 MOV R0,#0x0
00000038 F7FF BL send_data_to_spi?T ; T=0x0001 (1)
0000003A FFE2 BL send_data_to_spi?T ; T=0x0001 (2)
51: send_data_to_spi(0x00);
0000003C 2000 MOV R0,#0x0
0000003E F7FF BL send_data_to_spi?T ; T=0x0001 (1)
00000040 FFDF BL send_data_to_spi?T ; T=0x0001 (2)
52: AD9958_UPDATE_ON
00000042 4800 LDR R1,=0x800000
00000044 4800 LDR R0,=0xE0028004
ARM COMPILER V2.53, AD9958 23/07/06 16:59:03 PAGE 6
00000046 6001 STR R1,[R0,#0x0]
53: AD9958_CS_ON
00000048 4800 LDR R0,=0xE0028014
0000004A 6001 STR R1,[R0,#0x0]
54: }
0000004C BC08 POP {R3}
0000004E 4718 BX R3
00000050 ENDP ; 'set_ad9958_synchronization?T'
*** CODE SEGMENT '?PR?set_ad9958_pll?T?AD9958':
66: int set_ad9958_pll(unsigned int mult)
00000000 B510 PUSH {R4,LR}
00000002 1C04 MOV R4,R0 ; mult
00000004 ---- Variable 'mult' assigned to Register 'R4' ----
69: if(mult<3 || mult>21)return 0;
00000004 1C20 MOV R0,R4 ; mult
00000006 2803 CMP R0,#0x3 ; mult
00000008 D302 BCC L_2 ; T=0x00000010
0000000A 1C20 MOV R0,R4 ; mult
0000000C 2815 CMP R0,#0x15 ; mult
0000000E D901 BLS L_1 ; T=0x00000014
00000010 L_2:
00000010 2000 MOV R0,#0x0
00000012 E022 B L_3 ; T=0x0000005A
00000014 L_1:
71: if(mult>(160/AD9958_CLOCK)){ //Set PLL VCO gain;
00000014 1C20 MOV R0,R4 ; mult
00000016 2806 CMP R0,#0x6 ; mult
00000018 D903 BLS L_4 ; T=0x00000022
72: mult<<=2;
0000001A 00A4 LSL R4,R4,#0x2 ; mult
73: mult|=0x80;
0000001C 2080 MOV R0,#0x80
0000001E 4304 ORR R4,R0
74: }else {
00000020 E000 B L_5 ; T=0x00000024
00000022 L_4:
75: mult<<=2;
00000022 00A4 LSL R4,R4,#0x2 ; mult
76: }
00000024 L_5:
79: AD9958_CS_OFF
00000024 4800 LDR R1,=0x800000
00000026 4800 LDR R0,=0xE002801C
00000028 6001 STR R1,[R0,#0x0]
80: AD9958_UPDATE_OFF
0000002A 4800 LDR R0,=0xE002800C
0000002C 6001 STR R1,[R0,#0x0]
82: send_data_to_spi(0x01);
0000002E 2001 MOV R0,#0x1
00000030 F7FF BL send_data_to_spi?T ; T=0x0001 (1)
00000032 FFE6 BL send_data_to_spi?T ; T=0x0001 (2)
83: send_data_to_spi((unsigned char)mult);
00000034 1C20 MOV R0,R4 ; mult
00000036 0600 LSL R0,R0,#0x18 ; mult
00000038 0E00 LSR R0,R0,#0x18
0000003A 0600 LSL R0,R0,#0x18
0000003C 0E00 LSR R0,R0,#0x18
0000003E F7FF BL send_data_to_spi?T ; T=0x0001 (1)
00000040 FFDF BL send_data_to_spi?T ; T=0x0001 (2)
84: send_data_to_spi(0x00);
00000042 2000 MOV R0,#0x0
00000044 F7FF BL send_data_to_spi?T ; T=0x0001 (1)
00000046 FFDC BL send_data_to_spi?T ; T=0x0001 (2)
85: send_data_to_spi(0x00);
00000048 2000 MOV R0,#0x0
0000004A F7FF BL send_data_to_spi?T ; T=0x0001 (1)
ARM COMPILER V2.53, AD9958 23/07/06 16:59:03 PAGE 7
0000004C FFD9 BL send_data_to_spi?T ; T=0x0001 (2)
87: AD9958_UPDATE_ON
0000004E 4800 LDR R1,=0x800000
00000050 4800 LDR R0,=0xE0028004
00000052 6001 STR R1,[R0,#0x0]
88: AD9958_CS_ON
00000054 4800 LDR R0,=0xE0028014
00000056 6001 STR R1,[R0,#0x0]
90: return 1;
00000058 2001 MOV R0,#0x1
91: }
0000005A L_3:
0000005A BC10 POP {R4}
0000005C BC08 POP {R3}
0000005E 4718 BX R3
00000060 ENDP ; 'set_ad9958_pll?T'
*** CODE SEGMENT '?PR?initialize_ad9958?T?AD9958':
103: void initialize_ad9958(void)
00000000 B500 PUSH {LR}
105: INITIALIZE_AD9958_PORT
00000002 4800 LDR R2,=0x800000
00000004 4800 LDR R0,=0xE0028018
00000006 6801 LDR R1,[R0,#0x0]
00000008 4311 ORR R1,R2
0000000A 6001 STR R1,[R0,#0x0]
0000000C 4800 LDR R0,=0xE0028008
0000000E 6801 LDR R1,[R0,#0x0]
00000010 4311 ORR R1,R2
00000012 6001 STR R1,[R0,#0x0]
00000014 4800 LDR R1,=0x1000000
00000016 4800 LDR R0,=0xE0028018
00000018 6802 LDR R2,[R0,#0x0]
0000001A 430A ORR R2,R1
0000001C 6002 STR R2,[R0,#0x0]
107: AD9958_DDSCR_ON
0000001E 4800 LDR R0,=0xE0028014
00000020 6001 STR R1,[R0,#0x0]
108: AD9958_DDSCR_OFF
00000022 4800 LDR R0,=0xE002801C
00000024 6001 STR R1,[R0,#0x0]
109: set_ad9958_pll(AD9958_PLL_MULTIPLE);
00000026 200A MOV R0,#0xA
00000028 F7FF BL set_ad9958_pll?T ; T=0x0001 (1)
0000002A FFEA BL set_ad9958_pll?T ; T=0x0001 (2)
110: }
0000002C BC08 POP {R3}
0000002E 4718 BX R3
00000030 ENDP ; 'initialize_ad9958?T'
*** CODE SEGMENT '?PR?set_frequency?T?AD9958':
123: int set_frequency(int chan,double freq)
00000000 B530 PUSH {R4-R5,LR}
00000002 1C0A MOV R2,R1 ; freq
00000004 ---- Variable 'freq' assigned to Register 'R2' ----
00000004 1C03 MOV R3,R0 ; chan
00000006 ---- Variable 'chan' assigned to Register 'R3' ----
00000006 B081 SUB R13,#0x4
124: {
00000008 ; SCOPE-START
125: unsigned char chan_temp=0;
00000008 2500 MOV R5,#0x0
0000000A ---- Variable 'chan_temp' assigned to Register 'R5' ----
130: if(chan<0 || chan>2)return 0;
0000000A 1C18 MOV R0,R3 ; chan
0000000C 2800 CMP R0,#0x0 ; chan
0000000E DB02 BLT L_7 ; T=0x00000016
00000010 1C18 MOV R0,R3 ; chan
ARM COMPILER V2.53, AD9958 23/07/06 16:59:03 PAGE 8
00000012 2802 CMP R0,#0x2 ; chan
00000014 DD01 BLE L_6 ; T=0x0000001A
00000016 L_7:
00000016 2000 MOV R0,#0x0
00000018 E04E B L_8 ; T=0x000000B8
0000001A L_6:
131: if(freq>MAX_OUTPUT_FREQUENCY || freq<0)return 0;
0000001A 4800 LDR R4,=0x4C189680
0000001C 1C10 MOV R0,R2 ; freq
0000001E 1C21 MOV R1,R4
00000020 F7FF BL ?C?FPCMP?T ; T=0x0001 (1) ; ?C?FPCMP?T
00000022 FFEE BL ?C?FPCMP?T ; T=0x0001 (2) ; ?C?FPCMP?T
00000024 D805 BHI L_10 ; T=0x00000032
00000026 2400 MOV R4,#0x0
00000028 1C10 MOV R0,R2 ; freq
0000002A 1C21 MOV R1,R4
0000002C F7FF BL ?C?FPCMP?T ; T=0x0001 (1) ; ?C?FPCMP?T
0000002E FFE8 BL ?C?FPCMP?T ; T=0x0001 (2) ; ?C?FPCMP?T
00000030 D201 BCS L_9 ; T=0x00000036
00000032 L_10:
00000032 2000 MOV R0,#0x0
00000034 E040 B L_8 ; T=0x000000B8
00000036 L_9:
134: if(chan==0)chan_temp=0x40;
00000036 1C18 MOV R0,R3 ; chan
00000038 2800 CMP R0,#0x0 ; chan
0000003A D101 BNE L_11 ; T=0x00000040
0000003C 2540 MOV R5,#0x40
0000003E E008 B L_12 ; T=0x00000052
00000040 L_11:
135: else if(chan==1)chan_temp=0x80;
00000040 1C18 MOV R0,R3 ; chan
00000042 2801 CMP R0,#0x1 ; chan
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