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📄 fpusb.lst

📁 CY68013 芯片USB开发固件程序。
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C51 COMPILER V6.10  FPUSB                                                                  12/04/2003 12:14:10 PAGE 1   


C51 COMPILER V6.10, COMPILATION OF MODULE FPUSB
OBJECT MODULE PLACED IN .\FPUSB.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE .\FPUSB.c BROWSE INCDIR(C:\Cypress\USB\Target\Inc\) DEBUG OBJECTEXTEND

stmt level    source

   1          #pragma NOIV               // Do not generate interrupt vectors
   2          
   3          #include "fx2.h"
   4          #include "fx2regs.h"
   5          #include "fx2sdly.h"            // SYNCDELAY macro
   6          
   7          extern BOOL GotSUD;             // Received setup data flag
   8          extern BOOL Sleep;
   9          extern BOOL Rwuen;
  10          extern BOOL Selfpwr;
  11          
  12          BYTE Configuration;             // Current configuration
  13          BYTE AlternateSetting;          // Alternate settings
  14          
  15          //-----------------------------------------------------------------------------
  16          // Constants
  17          //-----------------------------------------------------------------------------
  18          #define	VR_UPLOAD           0xc0
  19          #define VR_DOWNLOAD         0x40
  20          
  21          #define VR_ANCHOR_DLD       0xa0 // handled by core
  22          #define VR_SEND_COMMAND     0xa2 // Send Command
  23          #define VR_RESET_FIFO       0xa3 // Get Image
  24          
  25          //-----------------------------------------------------------------------------
  26          // Task Dispatcher hooks
  27          //   The following hooks are called by the task dispatcher.
  28          //-----------------------------------------------------------------------------
  29          
  30          sbit PA0 = IOA ^ 0;
  31          sbit PA1 = IOA ^ 1;
  32          sbit PA2 = IOA ^ 2;
  33          sbit PA3 = IOA ^ 3;
  34          sbit PA4 = IOA ^ 4;
  35          sbit PA5 = IOA ^ 5;
  36          sbit PA6 = IOA ^ 6;
  37          sbit PA7 = IOA ^ 7;
  38          
  39          bit x;
  40          
  41          void TD_Init(void)              // Called once at startup
  42          {
  43   1        // set the CPU clock to 48MHz
  44   1        CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
  45   1      	
  46   1        // set the CPU clock to 24MHz
  47   1        // CPUCS = 0x0A ;
  48   1        // Registers which require a synchronization delay, see section 15.14
  49   1        // FIFORESET        FIFOPINPOLAR
  50   1        // INPKTEND         OUTPKTEND
  51   1        // EPxBCH:L         REVCTL
  52   1        // GPIFTCB3         GPIFTCB2
  53   1        // GPIFTCB1         GPIFTCB0
  54   1        // EPxFIFOPFH:L     EPxAUTOINLENH:L
  55   1        // EPxFIFOCFG       EPxGPIFFLGSEL
C51 COMPILER V6.10  FPUSB                                                                  12/04/2003 12:14:10 PAGE 2   

  56   1        // PINFLAGSxx       EPxFIFOIRQ
  57   1        // EPxFIFOIE        GPIFIRQ
  58   1        // GPIFIE           GPIFADRH:L
  59   1        // UDMACRCH:L       EPxGPIFTRIG
  60   1        // GPIFTRIG
  61   1        
  62   1        // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
  63   1        //      ...these have been replaced by GPIFTC[B3:B0] registers
  64   1      
  65   1        // default: all endpoints have their VALID bit set
  66   1        // default: TYPE1 = 1 and TYPE0 = 0 --> BULK  
  67   1        // default: EP2 and EP4 DIR bits are 0 (OUT direction)
  68   1        // default: EP6 and EP8 DIR bits are 1 (IN direction)
  69   1        // default: EP2, EP4, EP6, and EP8 are double buffered
  70   1      
  71   1        REVCTL = 0x03; // MUST set REVCTL.0 and REVCTL.1 to 1
  72   1        SYNCDELAY;
  73   1        
  74   1        
  75   1        // we are just using the default values, yes this is not necessary...
  76   1        EP1OUTCFG = 0xA0;
  77   1        EP1INCFG = 0xA0;
  78   1        SYNCDELAY;                    // see TRM section 15.14
  79   1        EP2CFG = 0xA2;
  80   1        SYNCDELAY;                    // 
  81   1        EP4CFG = 0xA0;				//0xA0;
  82   1        SYNCDELAY;                    // 
  83   1        EP6CFG = 0xE2;
  84   1        SYNCDELAY;                    // 
  85   1        EP8CFG = 0xE0;
  86   1        SYNCDELAY;                    // 
  87   1      
  88   1        // out endpoints do not come up armed
  89   1        
  90   1        // since the defaults are double buffered we must write dummy byte counts twice
  91   1        EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.
  92   1        SYNCDELAY;                    // 
  93   1        EP4BCL = 0x80;    
  94   1        SYNCDELAY;                    // 
  95   1        EP2BCL = 0x80;                // arm EP4OUT by writing byte count w/skip.
  96   1        SYNCDELAY;                    // 
  97   1        EP4BCL = 0x80;    
  98   1        SYNCDELAY;                    // 
  99   1           
 100   1      
 101   1        FIFORESET = 0x80; // reset all FIFOs
 102   1        SYNCDELAY;
 103   1        FIFORESET = 0x02;
 104   1        SYNCDELAY;
 105   1        FIFORESET = 0x04;
 106   1        SYNCDELAY;
 107   1        FIFORESET = 0x06;
 108   1        SYNCDELAY;
 109   1        FIFORESET = 0x08;
 110   1        SYNCDELAY;
 111   1        FIFORESET = 0x00;
 112   1        SYNCDELAY;
 113   1      
 114   1        IFCONFIG = 0xcb;   // this defines the external interface to be the following:
 115   1                           // use IFCLK pin driven by internal logic, clk frequency is 48MHz
 116   1                           // use slave FIFO interface pins driven async by external master
 117   1        SYNCDELAY;
C51 COMPILER V6.10  FPUSB                                                                  12/04/2003 12:14:10 PAGE 3   

 118   1      
 119   1      //-------------------------设置端点6\8为自动输入模式--------------------
 120   1      
 121   1        EP6AUTOINLENH = 02;  // EP6 auto in length: 512  //512:02  64:00
 122   1        SYNCDELAY;
 123   1        EP6AUTOINLENL = 00;							 //512:00   64:64
 124   1        SYNCDELAY;
 125   1      
 126   1        EP8AUTOINLENH = 02;  // EP8 auto in length: 512  //512:02  64:00
 127   1        SYNCDELAY;
 128   1        EP8AUTOINLENL = 00;							 //512:00   64:64
 129   1        SYNCDELAY;
 130   1      
 131   1        //-----------------------设置端点4为CPU commit模式----------------------
 132   1        EP2FIFOCFG = 0x00; // this lets the EP4 auto=0 commit OUT packets,
 133   1                           // and sets the slave FIFO data interface to 8-bits
 134   1        SYNCDELAY;
 135   1        
 136   1        EP4FIFOCFG = 0x00; // this lets the EP4 auto=0 commit OUT packets,
 137   1                           // and sets the slave FIFO data interface to 8-bits
 138   1        SYNCDELAY;
 139   1      
 140   1        OUTPKTEND = 0x84; // Arm both EP4 buffers to “prime the pump”
 141   1        SYNCDELAY;
 142   1        OUTPKTEND = 0x84;
 143   1        SYNCDELAY;
 144   1      
 145   1        
 146   1      
 147   1        EP6FIFOCFG = 0x08; // this lets the EP6 auto commit IN packets,
 148   1                           // and sets the slave FIFO data interface to 8-bits
 149   1        SYNCDELAY;
 150   1      
 151   1        EP8FIFOCFG = 0x08; // this lets the EP8 auto commit IN packets,
 152   1                           // and sets the slave FIFO data interface to 8-bits
 153   1        SYNCDELAY;
 154   1      
 155   1      
 156   1      //-----------------------------------------------------------------------------
 157   1      
 158   1        PINFLAGSAB = 0x00; // defines FLAGA as prog-level flag, pointed to by FIFOADR[1:0]
 159   1                           // FLAGB as full flag, as pointed to by FIFOADR[1:0]
 160   1        SYNCDELAY;
 161   1      
 162   1        PINFLAGSCD = 0x00; // FLAGC as empty flag, as pointed to by FIFOADR[1:0]
 163   1        SYNCDELAY;
 164   1      
 165   1        PORTACFG = 0x00;   // used PA7/FLAGD  a PORTA pin  ,no as a FIFO flag SLCS
 166   1        SYNCDELAY;
 167   1      
 168   1        FIFOPINPOLAR = 0x00; // set all slave FIFO interface pins as active low
 169   1        SYNCDELAY;
 170   1        
 171   1         if (EZUSB_HIGHSPEED())
 172   1         {
 173   2            EP6AUTOINLENH = 02;  // EP6 auto in length: 512  //512:02  64:00
 174   2       	  SYNCDELAY;
 175   2            EP6AUTOINLENL = 00;							 //512:00   64:64
 176   2            SYNCDELAY;
 177   2      
 178   2            EP8AUTOINLENH = 02;  // EP8 auto in length: 512  //512:02  64:00
 179   2            SYNCDELAY;
C51 COMPILER V6.10  FPUSB                                                                  12/04/2003 12:14:10 PAGE 4   

 180   2            EP8AUTOINLENL = 00;							 //512:00   64:64
 181   2            SYNCDELAY;
 182   2      	  PA7=0;
 183   2         }
 184   1         else
 185   1         {
 186   2            EP6AUTOINLENH = 00;  // EP6 auto in length:  64:00
 187   2            SYNCDELAY;
 188   2            EP6AUTOINLENL = 64;							 //64:64
 189   2            SYNCDELAY;
 190   2      
 191   2            EP8AUTOINLENH = 00;  // EP8 auto in length:  //00
 192   2            SYNCDELAY;
 193   2            EP8AUTOINLENL = 64;							 //64
 194   2            SYNCDELAY;
 195   2      	  PA7=1;
 196   2         }
 197   1      
 198   1      
 199   1      
 200   1        OEA = 0x8b;
 201   1        IOA &= 0x88;
 202   1        x=0;    
 203   1      }
 204          
 205          void TD_Poll(void)              // Called repeatedly while the device is idle
 206          {
 207   1      	
 208   1      	if( (!x)&& (EZUSB_HIGHSPEED()) )
 209   1      	 {EP6AUTOINLENH = 02;  // EP6 auto in length: 512  //512:02  64:00
 210   2       	  SYNCDELAY;
 211   2            EP6AUTOINLENL = 00;							 //512:00   64:64
 212   2            SYNCDELAY;
 213   2      
 214   2            EP8AUTOINLENH = 02;  // EP8 auto in length: 512  //512:02  64:00
 215   2            SYNCDELAY;
 216   2            EP8AUTOINLENL = 00;							 //512:00   64:64
 217   2            SYNCDELAY;
 218   2      	  PA7=0;
 219   2      	  x=1;
 220   2      	 }
 221   1      	if( (x)&& (!EZUSB_HIGHSPEED()) )
 222   1      	 {EP6AUTOINLENH = 00;  // EP6 auto in length: 512  //512:02  64:00
 223   2       	  SYNCDELAY;
 224   2            EP6AUTOINLENL = 64;							 //512:00   64:64
 225   2            SYNCDELAY;
 226   2      
 227   2            EP8AUTOINLENH = 00;  // EP8 auto in length: 512  //512:02  64:00
 228   2            SYNCDELAY;
 229   2            EP8AUTOINLENL = 64;							 //512:00   64:64
 230   2            SYNCDELAY;
 231   2      	  PA7=1;
 232   2      	  x=0;
 233   2      	 }
 234   1      
 235   1      
 236   1       	if( !( EP2468STAT & 0x04 ) )
 237   1      	     { // EP4EF=0 when FIFO NOT empty, host sent packet
 238   2                
 239   2      		  OUTPKTEND = 0x04; // SKIP=0, pass buffer on to master
 240   2                SYNCDELAY;
 241   2      		  
C51 COMPILER V6.10  FPUSB                                                                  12/04/2003 12:14:10 PAGE 5   

 242   2      		  PA7=!PA7;
 243   2        	     }
 244   1      
 245   1      }
 246          
 247          BOOL TD_Suspend(void)          // Called before the device goes into suspend mode
 248          {  
 249   1         return(TRUE);
 250   1      }
 251          
 252          BOOL TD_Resume(void)          // Called after the device resumes
 253          {
 254   1         
 255   1      	return(TRUE);
 256   1      }
 257          
 258          //-----------------------------------------------------------------------------
 259          // Device Request hooks
 260          //   The following hooks are called by the end point 0 device request parser.
 261          //-----------------------------------------------------------------------------
 262          
 263          BOOL DR_GetDescriptor(void)
 264          {

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