sfr_r823.h

针对日本瑞莎单片机r8c/23 开发的LIN网络通讯程序包括主节点和从节点

/*------------------------------------------------------
  Port P6 register
------------------------------------------------------*/
union	byte_def	p6_addr;
#define		p6			p6_addr.byte

#define		p6_0		p6_addr.bit.b0			/* Port P60 bit */
#define		p6_1		p6_addr.bit.b1			/* Port P61 bit */
#define		p6_2		p6_addr.bit.b2			/* Port P62 bit */
#define		p6_3		p6_addr.bit.b3			/* Port P63 bit */
#define		p6_4		p6_addr.bit.b4			/* Port P64 bit */
#define		p6_5		p6_addr.bit.b5			/* Port P65 bit */
#define		p6_6		p6_addr.bit.b6			/* Port P66 bit */
#define		p6_7		p6_addr.bit.b7			/* Port P67 bit */

/*------------------------------------------------------
  Port P6 direction register
------------------------------------------------------*/
union	byte_def	pd6_addr;
#define		pd6			pd6_addr.byte

#define		pd6_0		pd6_addr.bit.b0			/* Port P60 direction bit */
#define		pd6_1		pd6_addr.bit.b1			/* Port P61 direction bit */
#define		pd6_2		pd6_addr.bit.b2			/* Port P62 direction bit */
#define		pd6_3		pd6_addr.bit.b3			/* Port P63 direction bit */
#define		pd6_4		pd6_addr.bit.b4			/* Port P64 direction bit */
#define		pd6_5		pd6_addr.bit.b5			/* Port P65 direction bit */
#define		pd6_6		pd6_addr.bit.b6			/* Port P66 direction bit */
#define		pd6_7		pd6_addr.bit.b7			/* Port P67 direction bit */

/*------------------------------------------------------
  UART1 function select register
------------------------------------------------------*/
union	byte_def	u1sr_addr;
#define		u1sr		u1sr_addr.byte

/*------------------------------------------------------
  Port mode register
------------------------------------------------------*/
union	byte_def	pmr_addr;
#define		pmr			pmr_addr.byte

#define		u1pinsel	pmr_addr.bit.b4			/* Port/TXD1,RXD1 switch bit */
#define		iicsel		pmr_addr.bit.b7			/* SSU/IIC bus switch bit */

/*------------------------------------------------------
  External input enable register
------------------------------------------------------*/
union	byte_def	inten_addr;
#define		inten		inten_addr.byte

#define		int0en		inten_addr.bit.b0		/* INT0 input enable bit */
#define		int0pl		inten_addr.bit.b1		/* INT0 input polarity select bit */
#define		int1en		inten_addr.bit.b2		/* INT1 input enable bit */
#define		int1pl		inten_addr.bit.b3		/* INT1 input polarity select bit */
#define		int2en		inten_addr.bit.b4		/* INT2 input enable bit */
#define		int2pl		inten_addr.bit.b5		/* INT2 input polarity select bit */
#define		int3en		inten_addr.bit.b6		/* INT3 input enable bit */
#define		int3pl		inten_addr.bit.b7		/* INT3 input polarity select bit */

/*------------------------------------------------------
  INT0 input filter select register
------------------------------------------------------*/
union	byte_def	intf_addr;
#define		intf		intf_addr.byte

#define		int0f0		intf_addr.bit.b0		/* INT0 input filter select bit */
#define		int0f1		intf_addr.bit.b1		/* INT0 input filter select bit */
#define		int1f0		intf_addr.bit.b2		/* INT1 input filter select bit */
#define		int1f1		intf_addr.bit.b3		/* INT1 input filter select bit */
#define		int2f0		intf_addr.bit.b4		/* INT2 input filter select bit */
#define		int2f1		intf_addr.bit.b5		/* INT2 input filter select bit */
#define		int3f0		intf_addr.bit.b6		/* INT3 input filter select bit */
#define		int3f1		intf_addr.bit.b7		/* INT3 input filter select bit */

/*------------------------------------------------------
  Key input enable register
------------------------------------------------------*/
union	byte_def	kien_addr;
#define		kien		kien_addr.byte

#define		ki0en		kien_addr.bit.b0		/* KI0 input enable bit */
#define		ki0pl		kien_addr.bit.b1		/* KI0 input polarity select bit */
#define		ki1en		kien_addr.bit.b2		/* KI1 input enable bit */
#define		ki1pl		kien_addr.bit.b3		/* KI1 input polarity select bit */
#define		ki2en		kien_addr.bit.b4		/* KI2 input enable bit */
#define		ki2pl		kien_addr.bit.b5		/* KI2 input polarity select bit */
#define		ki3en		kien_addr.bit.b6		/* KI3 input enable bit */
#define		ki3pl		kien_addr.bit.b7		/* KI3 input polarity select bit */

/*------------------------------------------------------
  Pull-up control register0
------------------------------------------------------*/
union	byte_def	pur0_addr;
#define		pur0		pur0_addr.byte

#define		pu00		pur0_addr.bit.b0		/* P00 to P03 pull-up */
#define		pu01		pur0_addr.bit.b1		/* P04 to P07 pull-up */
#define		pu02		pur0_addr.bit.b2		/* P10 to P13 pull-up */
#define		pu03		pur0_addr.bit.b3		/* P14 to P17 pull-up */
#define		pu04		pur0_addr.bit.b4		/* P20 to P23 pull-up */
#define		pu05		pur0_addr.bit.b5		/* P24 to P27 pull-up */
#define		pu06		pur0_addr.bit.b6		/* P30, P31, P33 pull-up */
#define		pu07		pur0_addr.bit.b7		/* P34, P35, P37 pull-up */

/*------------------------------------------------------
  Pull-up control register1
------------------------------------------------------*/
union	byte_def	pur1_addr;
#define		pur1		pur1_addr.byte

#define		pu10		pur1_addr.bit.b0		/* P43 pull-up */
#define		pu11		pur1_addr.bit.b1		/* P44, P45 pull-up */
#define		pu14		pur1_addr.bit.b4		/* P60 to P63 pull-up */
#define		pu15		pur1_addr.bit.b5		/* P64 to P67 pull-up */

/*------------------------------------------------------
  Timer RA control register
------------------------------------------------------*/
union	byte_def	tracr_addr;
#define		tracr		tracr_addr.byte

#define		tstart_tracr	tracr_addr.bit.b0	/* Timer RA count start bit */
#define		tcstf_tracr		tracr_addr.bit.b1	/* Timer RA count status flag */
#define		tstop_tracr		tracr_addr.bit.b2	/* Timer RA count forcible stop bit */
#define		tedgf_tracr		tracr_addr.bit.b4	/* Active edge judgment flag */
#define		tundf_tracr		tracr_addr.bit.b5	/* Timer RA underflow flag */

/*------------------------------------------------------
  Timer RA I/O control register
------------------------------------------------------*/
union	byte_def	traioc_addr;
#define		traioc		traioc_addr.byte

#define		tedgsel_traioc		traioc_addr.bit.b0		/* TRAIO polarity switch bit */
#define		topcr_traioc		traioc_addr.bit.b1		/* TRAIO output control bit */
#define		toena_traioc		traioc_addr.bit.b2		/* TRAO output enable bit */
#define		tiosel_traioc		traioc_addr.bit.b3		/* INT1/TRAIO select bit */
#define		tipf0_traioc		traioc_addr.bit.b4		/* TRAIO input filter select bit */
#define		tipf1_traioc		traioc_addr.bit.b5		/* TRAIO input filter select bit */

/*------------------------------------------------------
  Timer RA mode register
------------------------------------------------------*/
union	byte_def	tramr_addr;
#define		tramr		tramr_addr.byte

#define		tmod0_tramr		tramr_addr.bit.b0	/* Timer RA operation mode select bit */
#define		tmod1_tramr		tramr_addr.bit.b1	/* Timer RA operation mode select bit */
#define		tmod2_tramr		tramr_addr.bit.b2	/* Timer RA operation mode select bit */
#define		tck0_tramr		tramr_addr.bit.b4	/* Timer RA count source select bit */
#define		tck1_tramr		tramr_addr.bit.b5	/* Timer RA count source select bit */
#define		tck2_tramr		tramr_addr.bit.b6	/* Timer RA count source select bit */
#define		tckcut_tramr	tramr_addr.bit.b7	/* Timer RA count source cutoff bit */

/*------------------------------------------------------
  Timer RA prescaler register
------------------------------------------------------*/
union	byte_def	trapre_addr;
#define		trapre		trapre_addr.byte

/*------------------------------------------------------
  Timer RA register
------------------------------------------------------*/
union	byte_def	tra_addr;
#define		tra			tra_addr.byte

/*------------------------------------------------------
  Timer RB control register
------------------------------------------------------*/
union	byte_def	trbcr_addr;
#define		trbcr		trbcr_addr.byte

#define		tstart_trbcr	trbcr_addr.bit.b0	/* Timer RB count start bit */
#define		tcstf_trbcr		trbcr_addr.bit.b1	/* Timer RB count status flag */
#define		tstop_trbcr		trbcr_addr.bit.b2	/* Timer RB count forcible stop bit */

/*------------------------------------------------------
  Timer RB one shot control register
------------------------------------------------------*/
union	byte_def	trbocr_addr;
#define		trbocr		trbocr_addr.byte

#define		tosst_trbocr	trbocr_addr.bit.b0	/* Timer RB one-shot start bit */
#define		tossp_trbocr	trbocr_addr.bit.b1	/* Timer RB one-shot stop bit */
#define		tosstf_trbocr	trbocr_addr.bit.b2	/* Timer RB one-shot status flag */

/*------------------------------------------------------
  Timer RB I/O control register
------------------------------------------------------*/
union	byte_def	trbioc_addr;
#define		trbioc		trbioc_addr.byte

#define		topl_trbioc		trbioc_addr.bit.b0	/* Timer RB output level select bit */
#define		tocnt_trbioc	trbioc_addr.bit.b1	/* Timer RB output switch bit */
#define		inostg_trbioc	trbioc_addr.bit.b2	/* One-shot trigger control bit */
#define		inoseg_trbioc	trbioc_addr.bit.b3	/* One-shot trigger polarity select bit */

/*------------------------------------------------------
  Timer RB mode register
------------------------------------------------------*/
union	byte_def	trbmr_addr;
#define		trbmr		trbmr_addr.byte

#define		tmod0_trbmr		trbmr_addr.bit.b0	/* Timer RB operating mode select bit */
#define		tmod1_trbmr		trbmr_addr.bit.b1	/* Timer RB operating mode select bit */
#define		twrc_trbmr		trbmr_addr.bit.b3	/* Timer RB write control bit */
#define		tck0_trbmr		trbmr_addr.bit.b4	/* Timer RB count source select bit */
#define		tck1_trbmr		trbmr_addr.bit.b5	/* Timer RB count source select bit */
#define		tckcut_trbmr	trbmr_addr.bit.b7	/* Timer RB count source cutoff bit */

/*------------------------------------------------------
  Timer RB prescaler register
------------------------------------------------------*/
union	byte_def	trbpre_addr;
#define		trbpre		trbpre_addr.byte

/*------------------------------------------------------
  Timer RB secondary register
------------------------------------------------------*/
union	byte_def	trbsc_addr;
#define		trbsc		trbsc_addr.byte

/*------------------------------------------------------
  Timer RB Primary Register
------------------------------------------------------*/
union	byte_def	trbpr_addr;
#define		trbpr		trbpr_addr.byte

/*------------------------------------------------------
  Timer RE counter data register
------------------------------------------------------*/
union	byte_def	tresec_addr;
#define		tresec		tresec_addr.byte

/*------------------------------------------------------
  Timer RE compare data register
------------------------------------------------------*/
union	byte_def	tremin_addr;
#define		tremin		tremin_addr.byte

/*------------------------------------------------------
  Timer RE control register1
------------------------------------------------------*/
union	byte_def	trecr1_addr;
#define		trecr1		trecr1_addr.byte

#define		tcstf_trecr1	trecr1_addr.bit.b1		/* Timer RE count status flag */
#define		toena_trecr1	trecr1_addr.bit.b2		/* TREO pin output enable bit */
#define		int_trecr1		trecr1_addr.bit.b3		/* Interrupt request timing bit */
#define		trerst_trecr1	trecr1_addr.bit.b4		/* Timer RE reset bit */
#define		tstart_trecr1	trecr1_addr.bit.b7		/* Timer RE count start bit */

/*------------------------------------------------------
  Timer RE control register2
------------------------------------------------------*/
union	byte_def	trecr2_addr;
#define		trecr2		trecr2_addr.byte

#define		comie_trecr2	trecr2_addr.bit.b5		/* Compare match interrupt enable bit */

/*------------------------------------------------------
  Timer RE count source select register
------------------------------------------------------*/