ncrt0.a30

针对日本瑞莎单片机r8c/23 开发的LIN网络通讯程序包括主节点和从节点

;*************************************************************************** ;
; C COMPILER for R8C/Tiny, M16C/60,30,20,10
; Copyright(C) 1999(2000-2004). Renesas Technology Corp.
; and Renesas Solutions Corp., All rights reserved.
;
;
; ncrt0.a30 : NC30 startup program
;
; This program is applicable when using the basic I/O library
;
; $Id: ncrt0.a30,v 1.27.4.4 2004/10/29 14:06:38 simomura Exp $
;
;***************************************************************************
;
;---------------------------------------------------------------------
; Section allocation
;---------------------------------------------------------------------
    .list OFF
    .include sect30.inc
    .list ON
;
;====================================================================
; Boot_code section start
;---------------------------------------------------------------------
   .insf start,S,0
   .glb  start
   .section boot_code
start:
;---------------------------------------------------------------------
; After reset, program execution will begin here
;---------------------------------------------------------------------
   ldc   #istack_top,isp   ; Set interrupt stack pointer
   ldc   #0080h,flg        ; Select user stack
   ldc   #stack_top,sp     ; Set user stack pointer
   ldc   #data_SE_top,sb   ; Set sb register
   ldintb   #VECTOR_ADR
;
;---------------------------------------------------------------------
; Set the CPU clock source to Xin (20MHz), undivided
;---------------------------------------------------------------------
   bset  0,000ah  ; Enable writes to clock control registers
   bset  3,0007h  ; Enable Xin pins
   bclr  5,0006h  ; Turn on Xin oscillator
   bclr  0,000ah  ; Disable writes to clock control registers
   nop            ; Delay to let Xin start up
   nop
   nop
   nop
   bset  0,000ah  ; Enable writes to clock control registers
   bclr  2,000ch  ; Select Xin as CPU clock source
   bclr  6,0007h  ; Clear CM16 - divide by 1
   bclr  7,0007h  ; Clear CM17 - divide by 1
   bclr  6,0006h  ; Clear CM06 to configure the CPU clock prescaler
                  ; to divide by 1
   bclr  0,000ah  ; Disable writes to clock control registers
;
;====================================================================
; NEAR area initialize.
;--------------------------------------------------------------------
; bss zero clear
;--------------------------------------------------------------------
   N_BZERO  bss_SE_top,bss_SE
   N_BZERO  bss_SO_top,bss_SO
   N_BZERO  bss_NE_top,bss_NE
   N_BZERO  bss_NO_top,bss_NO

;---------------------------------------------------------------------
; initialize data section
;---------------------------------------------------------------------
   N_BCOPY  data_SEI_top,data_SE_top,data_SE
   N_BCOPY  data_SOI_top,data_SO_top,data_SO
   N_BCOPY  data_NEI_top,data_NE_top,data_NE
   N_BCOPY  data_NOI_top,data_NO_top,data_NO
;
   ldc   #stack_top,sp
;
;====================================================================
; Call main() function
;---------------------------------------------------------------------
   ldc   #0h,fb   ; Needed for debugger

   .glb  _main
   jsr.a _main

;====================================================================
; exit() function
;---------------------------------------------------------------------
   .glb  _exit
   .glb  $exit
_exit:            ; Endless loop in case "main()" returns (exits)
$exit:
   jmp   _exit
   .einsf
;
;====================================================================
; dummy interrupt function
;---------------------------------------------------------------------
   .glb  dummy_int
dummy_int:
   reit

   .end
;***************************************************************************
;
; C COMPILER for R8C/Tiny, M16C/60,30,20,10
; Copyright(C) 1999(2000-2004). Renesas Technology Corp.
; and Renesas Solutions Corp., All rights reserved.
;
;***************************************************************************