📄 standard_arm_startup.s
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/*****************************************************************************
Exception handlers and startup code for a generic ARM target.
Copyright (c) 2005 Rowley Associates Limited.
This file may be distributed under the terms of the License Agreement
provided with this software.
THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE
WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions
* ------------------------
*
* STARTUP_FROM_RESET
*
* If defined, the program will startup from power-on/reset. If not defined
* the program will just loop endlessly from power-on/reset.
*
* This definition is not defined by default on this target because the
* debugger is unable to reset this target and maintain control of it over the
* JTAG interface. The advantage of doing this is that it allows the debugger
* to reset the CPU and run programs from a known reset CPU state on each run.
* It also acts as a safety net if you accidently download a program in FLASH
* that crashes and prevents the debugger from taking control over JTAG
* rendering the target unusable over JTAG. The obvious disadvantage of doing
* this is that your application will not startup without the debugger.
*
* We advise that on this target you keep STARTUP_FROM_RESET undefined whilst
* you are developing and only define STARTUP_FROM_RESET when development is
* complete.
*
*****************************************************************************/
#define STARTUP_FROM_RESET
.section .vectors, "ax"
.code 32
.align 0
.global _vectors
.global reset_handler
/*****************************************************************************
* *
* Exception Vectors *
* *
*****************************************************************************/
_vectors:
#ifdef STARTUP_FROM_RESET
ldr pc, [pc, #reset_handler_address - . - 8] /*; reset */
#else
b . /*; reset - infinite loop */
#endif
ldr pc, [pc, #undef_handler_address - . - 8] /*; 0x04 undefined instruction */
ldr pc,=0x0c000008 // [pc, #swi_handler_address - . - 8] /*; 0x08 swi handler */
ldr pc, [pc, #pabort_handler_address - . - 8] /*; 0x0C abort prefetch */
ldr pc, [pc, #dabort_handler_address - . - 8] /*; 0x10 abort data */
nop /*; 0x14 */
ldr pc,=0x0C000018 //;[pc, #irq_handler_address - . - 8] /* 0x18 irq */
ldr pc,=0x0C00001c //;[pc, #fiq_handler_address - . - 8] /* 0x1C fiq */
ldr pc,=0x0C000020//;=HandlerEINT0 //; 0x20
ldr pc,=0x0C000024//;=HandlerEINT1
ldr pc,=0x0C000028//;=HandlerEINT2
ldr pc,=0x0C00002C//;=HandlerEINT3
ldr pc,=0x0C000030//;=HandlerEINT4567
ldr pc,=0x0C000034//;=HandlerTICK //; 0x34
b .
b .
ldr pc,=0x0C000040//;=HandlerZDMA0 //; 0x40
ldr pc,=0x0C000044//;=HandlerZDMA1
ldr pc,=0x0C000048//;=HandlerBDMA0
ldr pc,=0x0C00004C//;=HandlerBDMA1
ldr pc,=0x0C000050//;=HandlerWDT
ldr pc,=0x0C000054//;=HandlerUERR01 //; 0x54
b .
b .
ldr pc,=0x0C000060//;=HandlerTIMER0 //; 0x60
ldr pc,=0x0C000064//;=HandlerTIMER1
ldr pc,=0x0C000068//;=HandlerTIMER2
ldr pc,=0x0C00006C//;=HandlerTIMER3
ldr pc,=0x0C000070//;=HandlerTIMER4
ldr pc,=0x0C000074//;=HandlerTIMER5 //; 0x74
b .
b .
ldr pc,=0x0C000080//;=HandlerURXD0 //; 0x80
ldr pc,=0x0C000084//;=HandlerURXD1
ldr pc,=0x0C000088//;=HandlerIIC
ldr pc,=0x0C00008C//;=HandlerSIO
ldr pc,=0x0C000090//;=HandlerUTXD0
ldr pc,=0x0C000094//;=HandlerUTXD1 //; 0x94
b .
b .
ldr pc,=0x0C0000a0//;=HandlerRTC //; 0xa0
b .
b .
b .
b .
b .
b .
ldr pc,=0x0C0000b4//;=HandlerADC //; 0xb4
reset_handler_address:
.word reset_handler
undef_handler_address:
.word reset_handler
swi_handler_address:
.word reset_handler
pabort_handler_address:
.word reset_handler
dabort_handler_address:
.word reset_handler
irq_handler_address:
.word reset_handler
fiq_handler_address:
.word reset_handler
.section .init, "ax"
.code 32
.align 0
/******************************************************************************
* *
* Default exception handlers *
* *
******************************************************************************/
reset_handler:
/****************************************************************************
* TODO: Configure target system. *
****************************************************************************/
#ifdef __FLASH_BUILD
/****************************************************************************
* TODO: Put any FLASH build configuation specific code here *
****************************************************************************/
#endif
/****************************************************************************
* Jump to the default C runtime startup code. *
****************************************************************************/
b _start
/******************************************************************************
* *
* Default exception handlers *
* These are declared weak symbols so they can be redefined in user code. *
* *
******************************************************************************/
undef_handler:
b . /* Endless loop */
swi_handler:
b . /* Endless loop */
pabort_handler:
b . /* Endless loop */
dabort_handler:
b . /* Endless loop */
irq_handler:
b . /* Endless loop */
fiq_handler:
b . /* Endless loop */
.weak undef_handler, swi_handler, pabort_handler, dabort_handler, irq_handler, fiq_handler
//-------------------------------------------------
HandlerSWI: //; 0x20
b .
HandlerIRQ:
b .
HandlerFIQ:
b .
HandlerEINT0: //; 0x20
b .
HandlerEINT1:
b .
HandlerEINT2:
b .
HandlerEINT3:
b .
HandlerEINT4567:
b .
HandlerTICK: //; 0x34
b .
HandlerZDMA0: //; 0x40
b .
HandlerZDMA1:
b .
HandlerBDMA0:
b .
HandlerBDMA1:
b .
HandlerWDT:
b .
HandlerUERR01: //; 0x54
b .
HandlerTIMER0: //; 0x60
b .
HandlerTIMER1:
b .
HandlerTIMER2:
b .
HandlerTIMER3:
b .
HandlerTIMER4:
b .
HandlerTIMER5: //; 0x74
b .
HandlerURXD0: //; 0x80
b .
HandlerURXD1:
b .
HandlerIIC:
b .
HandlerSIO:
b .
HandlerUTXD0:
b .
HandlerUTXD1: //; 0x94
b .
HandlerRTC: //; 0xa0
b .
HandlerADC: //; 0xb4*/
b .
.weak HandlerEINT0 //; 0x20
.weak HandlerEINT1
.weak HandlerEINT2
.weak HandlerEINT3
.weak HandlerEINT4567
.weak HandlerTICK //; 0x34
.weak HandlerZDMA0 //; 0x40
.weak HandlerZDMA1
.weak HandlerBDMA0
.weak HandlerBDMA1
.weak HandlerWDT
.weak HandlerUERR01 //; 0x54
.weak HandlerTIMER0 //; 0x60
.weak HandlerTIMER1
.weak HandlerTIMER2
.weak HandlerTIMER3
.weak HandlerTIMER4
.weak HandlerTIMER5 //; 0x74
.weak HandlerURXD0 //; 0x80
.weak HandlerURXD1
.weak HandlerIIC
.weak HandlerSIO
.weak HandlerUTXD0
.weak HandlerUTXD1 //; 0x94
.weak HandlerRTC //; 0xa0
.weak HandlerADC //; 0xb4
.weak swi_handler_address
.weak irq_handler_address
.weak fiq_handler_address
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