mgaregs.h

Mesa is an open-source implementation of the OpenGL specification - a system for rendering interacti

#    define TMC_tformat_tw15 		0x2 		/* val 2, shift 0 */
#    define TMC_tformat_tw16 		0x3 		/* val 3, shift 0 */
#    define TMC_tformat_tw12 		0x4 		/* val 4, shift 0 */
#    define TMC_tformat_tw32 		0x6 		/* val 6, shift 0 */
#    define TMC_tformat_tw8a 		0x7 		/* val 7, shift 0 */
#    define TMC_tformat_tw8al 		0x8 		/* val 8, shift 0 */
#    define TMC_tformat_tw422 		0xa 		/* val 10, shift 0 */
#    define TMC_tformat_tw422uyvy	0xb 		/* val 11, shift 0 */
#    define TMC_tpitchlin_MASK 		0xfffffeff 	/* bit 8 */
#    define TMC_tpitchlin_disable 	0x0 		
#    define TMC_tpitchlin_enable 	0x100 		
#    define TMC_tpitchext_MASK 		0xfff001ff 	/* bits 9-19 */
#    define TMC_tpitchext_SHIFT 	9 		
#    define TMC_tpitch_MASK 		0xfff8ffff 	/* bits 16-18 */
#    define TMC_tpitch_SHIFT 		16 		
#    define TMC_owalpha_MASK 		0xffbfffff 	/* bit 22 */
#    define TMC_owalpha_disable 	0x0 		
#    define TMC_owalpha_enable 		0x400000 	
#    define TMC_azeroextend_MASK 	0xff7fffff 	/* bit 23 */
#    define TMC_azeroextend_disable 	0x0 		
#    define TMC_azeroextend_enable 	0x800000 	
#    define TMC_decalckey_MASK 		0xfeffffff 	/* bit 24 */
#    define TMC_decalckey_disable 	0x0 		
#    define TMC_decalckey_enable 	0x1000000 	
#    define TMC_takey_MASK 		0xfdffffff 	/* bit 25 */
#    define TMC_takey_0 		0x0 		
#    define TMC_takey_1 		0x2000000 	
#    define TMC_tamask_MASK 		0xfbffffff 	/* bit 26 */
#    define TMC_tamask_0 		0x0 		
#    define TMC_tamask_1 		0x4000000 	
#    define TMC_clampv_MASK 		0xf7ffffff 	/* bit 27 */
#    define TMC_clampv_disable 		0x0 		
#    define TMC_clampv_enable 		0x8000000 	
#    define TMC_clampu_MASK 		0xefffffff 	/* bit 28 */
#    define TMC_clampu_disable 		0x0 		
#    define TMC_clampu_enable 		0x10000000 	
#    define TMC_tmodulate_MASK 		0xdfffffff 	/* bit 29 */
#    define TMC_tmodulate_disable 	0x0 		
#    define TMC_tmodulate_enable 	0x20000000 	
#    define TMC_strans_MASK 		0xbfffffff 	/* bit 30 */
#    define TMC_strans_disable 		0x0 		
#    define TMC_strans_enable 		0x40000000 	
#    define TMC_itrans_MASK 		0x7fffffff 	/* bit 31 */
#    define TMC_itrans_disable 		0x0 		
#    define TMC_itrans_enable 		0x80000000 	

#define MGAREG_TEXCTL2 			0x2c3c

#    define TMC_decalblend_MASK 	0xfffffffe 	/* bit 0 */
#    define TMC_decalblend_disable 	0x0 		
#    define TMC_decalblend_enable 	0x1 		
#    define TMC_idecal_MASK 		0xfffffffd 	/* bit 1 */
#    define TMC_idecal_disable 		0x0 		
#    define TMC_idecal_enable 		0x2 		
#    define TMC_decaldis_MASK 		0xfffffffb 	/* bit 2 */
#    define TMC_decaldis_disable 	0x0 		
#    define TMC_decaldis_enable 	0x4 		
#    define TMC_ckstransdis_MASK 	0xffffffef 	/* bit 4 */
#    define TMC_ckstransdis_disable 	0x0 		
#    define TMC_ckstransdis_enable 	0x10 		
#    define TMC_borderen_MASK 		0xffffffdf 	/* bit 5 */
#    define TMC_borderen_disable 	0x0 		
#    define TMC_borderen_enable 	0x20 		
#    define TMC_specen_MASK 		0xffffffbf 	/* bit 6 */
#    define TMC_specen_disable 		0x0 		
#    define TMC_specen_enable 		0x40 		
#    define TMC_dualtex_MASK 		0xffffff7f 	/* bit 7 */
#    define TMC_dualtex_disable 	0x0 		
#    define TMC_dualtex_enable 		0x80 		
#    define TMC_tablefog_MASK 		0xfffffeff 	/* bit 8 */
#    define TMC_tablefog_disable 	0x0 		
#    define TMC_tablefog_enable 	0x100 		
#    define TMC_bumpmap_MASK 		0xfffffdff 	/* bit 9 */
#    define TMC_bumpmap_disable 	0x0 		
#    define TMC_bumpmap_enable 		0x200 		
#    define TMC_map1_MASK 		0x7fffffff 	/* bit 31 */
#    define TMC_map1_disable 		0x0 		
#    define TMC_map1_enable 		0x80000000 	

#define MGAREG_TEXFILTER 			0x2c58

#    define TF_minfilter_MASK 		0xfffffff0 	/* bits 0-3 */
#    define TF_minfilter_nrst 		0x0 		/* val 0, shift 0 */
#    define TF_minfilter_bilin 		0x2 		/* val 2, shift 0 */
#    define TF_minfilter_cnst 		0x3 		/* val 3, shift 0 */
#    define TF_minfilter_mm1s 		0x8 		/* val 8, shift 0 */
#    define TF_minfilter_mm2s 		0x9 		/* val 9, shift 0 */
#    define TF_minfilter_mm4s 		0xa 		/* val 10, shift 0 */
#    define TF_minfilter_mm8s 		0xc 		/* val 12, shift 0 */
#    define TF_magfilter_MASK 		0xffffff0f 	/* bits 4-7 */
#    define TF_magfilter_nrst 		0x0 		/* val 0, shift 4 */
#    define TF_magfilter_bilin 		0x20 		/* val 2, shift 4 */
#    define TF_magfilter_cnst 		0x30 		/* val 3, shift 4 */
#    define TF_uvoffset_SHIFT		17
#    define TF_uvoffset_OGL		(0U << TF_uvoffset_SHIFT)
#    define TF_uvoffset_D3D		(1U << TF_uvoffset_SHIFT)
#    define TF_uvoffset_MASK		(~(1U << TF_uvoffset_SHIFT))
#    define TF_reserved_MASK		(~0x1ff00)	/* bits 8-16 */
#    define TF_mapnbhigh_SHIFT 		18
#    define TF_mapnbhigh_MASK 		(~(1U << TF_mapnbhigh_SHIFT))
#    define TF_avgstride_MASK 		0xfff7ffff 	/* bit 19 */
#    define TF_avgstride_disable 	0x0 		
#    define TF_avgstride_enable 	0x80000 	
#    define TF_filteralpha_MASK 	0xffefffff 	/* bit 20 */
#    define TF_filteralpha_disable 	0x0 		
#    define TF_filteralpha_enable 	0x100000 	
#    define TF_fthres_MASK 		0xe01fffff 	/* bits 21-28 */
#    define TF_fthres_SHIFT 		21 		
#    define TF_mapnb_MASK 		0x1fffffff 	/* bits 29-31 */
#    define TF_mapnb_SHIFT 		29 		

#define MGAREG_TEXHEIGHT 			0x2c2c

#    define TH_th_MASK 			0xffffffc0 	/* bits 0-5 */
#    define TH_th_SHIFT 		0 		
#    define TH_rfh_MASK 		0xffff81ff 	/* bits 9-14 */
#    define TH_rfh_SHIFT 		9 		
#    define TH_thmask_MASK 		0xe003ffff 	/* bits 18-28 */
#    define TH_thmask_SHIFT 		18 		

#define MGAREG_TEXORG 				0x2c24

#    define TO_texorgmap_MASK 		0xfffffffe 	/* bit 0 */
#    define TO_texorgmap_fb 		0x0 		
#    define TO_texorgmap_sys 		0x1 		
#    define TO_texorgacc_MASK 		0xfffffffd 	/* bit 1 */
#    define TO_texorgacc_pci 		0x0 		
#    define TO_texorgacc_agp 		0x2 		
#    define TO_texorgoffsetsel 		0x4 		
#    define TO_texorg_MASK 		0x1f 		/* bits 5-31 */
#    define TO_texorg_SHIFT 		5 		

#define MGAREG_TEXORG1 			0x2ca4
#define MGAREG_TEXORG2 			0x2ca8
#define MGAREG_TEXORG3 			0x2cac
#define MGAREG_TEXORG4 			0x2cb0
#define MGAREG_TEXTRANS 			0x2c34

#    define TT_tckey_MASK 		0xffff0000 	/* bits 0-15 */
#    define TT_tckey_SHIFT 		0 		
#    define TT_tkmask_MASK 		0xffff 		/* bits 16-31 */
#    define TT_tkmask_SHIFT 		16 		

#define MGAREG_TEXTRANSHIGH 			0x2c38

#    define TT_tckeyh_MASK 		0xffff0000 	/* bits 0-15 */
#    define TT_tckeyh_SHIFT 		0 		
#    define TT_tkmaskh_MASK 		0xffff 		/* bits 16-31 */
#    define TT_tkmaskh_SHIFT 		16 		

#define MGAREG_TEXWIDTH 			0x2c28

#    define TW_tw_MASK 			0xffffffc0 	/* bits 0-5 */
#    define TW_tw_SHIFT 		0 		
#    define TW_rfw_MASK 		0xffff81ff 	/* bits 9-14 */
#    define TW_rfw_SHIFT 		9 		
#    define TW_twmask_MASK 		0xe003ffff 	/* bits 18-28 */
#    define TW_twmask_SHIFT 		18 		

#define MGAREG_TMR0 				0x2c00
#define MGAREG_TMR1 				0x2c04
#define MGAREG_TMR2 				0x2c08
#define MGAREG_TMR3 				0x2c0c
#define MGAREG_TMR4 				0x2c10
#define MGAREG_TMR5 				0x2c14
#define MGAREG_TMR6 				0x2c18
#define MGAREG_TMR7 				0x2c1c
#define MGAREG_TMR8 				0x2c20
#define MGAREG_VBIADDR0 			0x3e08
#define MGAREG_VBIADDR1 			0x3e0c
#define MGAREG_VCOUNT 				0x1e20
#define MGAREG_WACCEPTSEQ 			0x1dd4

#    define WAS_seqdst0_MASK 		0xffffffc0 	/* bits 0-5 */
#    define WAS_seqdst0_SHIFT 		0 		
#    define WAS_seqdst1_MASK 		0xfffff03f 	/* bits 6-11 */
#    define WAS_seqdst1_SHIFT 		6 		
#    define WAS_seqdst2_MASK 		0xfffc0fff 	/* bits 12-17 */
#    define WAS_seqdst2_SHIFT 		12 		
#    define WAS_seqdst3_MASK 		0xff03ffff 	/* bits 18-23 */
#    define WAS_seqdst3_SHIFT 		18 		
#    define WAS_seqlen_MASK 		0xfcffffff 	/* bits 24-25 */
#    define WAS_wfirsttag_MASK 		0xfbffffff 	/* bit 26 */
#    define WAS_wfirsttag_disable 	0x0 		
#    define WAS_wfirsttag_enable 	0x4000000 	
#    define WAS_wsametag_MASK 		0xf7ffffff 	/* bit 27 */
#    define WAS_wsametag_disable 	0x0 		
#    define WAS_wsametag_enable 	0x8000000 	
#    define WAS_seqoff_MASK 		0xefffffff 	/* bit 28 */
#    define WAS_seqoff_disable 		0x0 		
#    define WAS_seqoff_enable 		0x10000000 	

#define MGAREG_WCODEADDR 			0x1e6c

#    define WMA_wcodeaddr_MASK 		0xff 		/* bits 8-31 */
#    define WMA_wcodeaddr_SHIFT 	8 		

#define MGAREG_WFLAG 				0x1dc4

#    define WF_walustsflag_MASK 	0xffffff00 	/* bits 0-7 */
#    define WF_walustsflag_SHIFT 	0 		
#    define WF_walucfgflag_MASK 	0xffff00ff 	/* bits 8-15 */
#    define WF_walucfgflag_SHIFT 	8 		
#    define WF_wprgflag_MASK 		0xffff 		/* bits 16-31 */
#    define WF_wprgflag_SHIFT 		16 		

#define MGAREG_WFLAG1 				0x1de0

#    define WF1_walustsflag1_MASK 	0xffffff00 	/* bits 0-7 */
#    define WF1_walustsflag1_SHIFT 	0 		
#    define WF1_walucfgflag1_MASK 	0xffff00ff 	/* bits 8-15 */
#    define WF1_walucfgflag1_SHIFT 	8 		
#    define WF1_wprgflag1_MASK 		0xffff 		/* bits 16-31 */
#    define WF1_wprgflag1_SHIFT 	16 		

#define MGAREG_WFLAGNB 			0x1e64
#define MGAREG_WFLAGNB1 			0x1e08
#define MGAREG_WGETMSB 			0x1dc8

#    define WGV_wgetmsbmin_MASK 	0xffffffe0 	/* bits 0-4 */
#    define WGV_wgetmsbmin_SHIFT 	0 		
#    define WGV_wgetmsbmax_MASK 	0xffffe0ff 	/* bits 8-12 */
#    define WGV_wgetmsbmax_SHIFT 	8 		
#    define WGV_wbrklefttop_MASK 	0xfffeffff 	/* bit 16 */
#    define WGV_wbrklefttop_disable 	0x0 		
#    define WGV_wbrklefttop_enable 	0x10000 	
#    define WGV_wfastcrop_MASK 		0xfffdffff 	/* bit 17 */
#    define WGV_wfastcrop_disable 	0x0 		
#    define WGV_wfastcrop_enable 	0x20000 	
#    define WGV_wcentersnap_MASK 	0xfffbffff 	/* bit 18 */
#    define WGV_wcentersnap_disable 	0x0 		
#    define WGV_wcentersnap_enable 	0x40000 	
#    define WGV_wbrkrighttop_MASK 	0xfff7ffff 	/* bit 19 */
#    define WGV_wbrkrighttop_disable 	0x0 		
#    define WGV_wbrkrighttop_enable 	0x80000 	

#define MGAREG_WIADDR 				0x1dc0

#    define WIA_wmode_MASK 		0xfffffffc 	/* bits 0-1 */
#    define WIA_wmode_suspend 		0x0 		/* val 0, shift 0 */
#    define WIA_wmode_resume 		0x1 		/* val 1, shift 0 */
#    define WIA_wmode_jump 		0x2 		/* val 2, shift 0 */
#    define WIA_wmode_start 		0x3 		/* val 3, shift 0 */
#    define WIA_wagp_MASK 		0xfffffffb 	/* bit 2 */
#    define WIA_wagp_pci 		0x0 		
#    define WIA_wagp_agp 		0x4 		
#    define WIA_wiaddr_MASK 		0x7 		/* bits 3-31 */
#    define WIA_wiaddr_SHIFT 		3 		

#define MGAREG_WIADDR2 			0x1dd8

#    define WIA2_wmode_MASK 		0xfffffffc 	/* bits 0-1 */
#    define WIA2_wmode_suspend 		0x0 		/* val 0, shift 0 */
#    define WIA2_wmode_resume 		0x1 		/* val 1, shift 0 */
#    define WIA2_wmode_jump 		0x2 		/* val 2, shift 0 */
#    define WIA2_wmode_start 		0x3 		/* val 3, shift 0 */
#    define WIA2_wagp_MASK 		0xfffffffb 	/* bit 2 */
#    define WIA2_wagp_pci 		0x0 		
#    define WIA2_wagp_agp 		0x4 		
#    define WIA2_wiaddr_MASK 		0x7 		/* bits 3-31 */
#    define WIA2_wiaddr_SHIFT 		3 		

#define MGAREG_WIADDRNB 			0x1e60
#define MGAREG_WIADDRNB1 			0x1e04
#define MGAREG_WIADDRNB2 			0x1e00
#define MGAREG_WIMEMADDR 			0x1e68

#    define WIMA_wimemaddr_MASK 	0xffffff00 	/* bits 0-7 */
#    define WIMA_wimemaddr_SHIFT 	0 		

#define MGAREG_WIMEMDATA 			0x2000
#define MGAREG_WIMEMDATA1 			0x2100
#define MGAREG_WMISC 				0x1e70

#    define WM_wucodecache_MASK 	0xfffffffe 	/* bit 0 */
#    define WM_wucodecache_disable 	0x0 		
#    define WM_wucodecache_enable 	0x1 		
#    define WM_wmaster_MASK 		0xfffffffd 	/* bit 1 */
#    define WM_wmaster_disable 		0x0 		
#    define WM_wmaster_enable 		0x2 		
#    define WM_wcacheflush_MASK 	0xfffffff7 	/* bit 3 */
#    define WM_wcacheflush_disable 	0x0 		
#    define WM_wcacheflush_enable 	0x8 		

#define MGAREG_WR 				0x2d00
#define MGAREG_WVRTXSZ 			0x1dcc

#    define WVS_wvrtxsz_MASK 		0xffffffc0 	/* bits 0-5 */
#    define WVS_wvrtxsz_SHIFT 		0 		
#    define WVS_primsz_MASK 		0xffffc0ff 	/* bits 8-13 */
#    define WVS_primsz_SHIFT 		8 		

#define MGAREG_XDST 				0x1cb0
#define MGAREG_XYEND 				0x1c44

#    define XYEA_x_end_MASK 		0xffff0000 	/* bits 0-15 */
#    define XYEA_x_end_SHIFT 		0 		
#    define XYEA_y_end_MASK 		0xffff 		/* bits 16-31 */
#    define XYEA_y_end_SHIFT 		16 		

#define MGAREG_XYSTRT 				0x1c40

#    define XYSA_x_start_MASK 		0xffff0000 	/* bits 0-15 */
#    define XYSA_x_start_SHIFT 		0 		
#    define XYSA_y_start_MASK 		0xffff 		/* bits 16-31 */
#    define XYSA_y_start_SHIFT 		16 		

#define MGAREG_YBOT 				0x1c9c
#define MGAREG_YDST 				0x1c90

#    define YA_ydst_MASK 		0xff800000 	/* bits 0-22 */
#    define YA_ydst_SHIFT 		0 		
#    define YA_sellin_MASK 		0x1fffffff 	/* bits 29-31 */
#    define YA_sellin_SHIFT 		29 		

#define MGAREG_YDSTLEN 			0x1c88

#    define YDL_length_MASK 		0xffff0000 	/* bits 0-15 */
#    define YDL_length_SHIFT 		0 		
#    define YDL_yval_MASK 		0xffff 		/* bits 16-31 */
#    define YDL_yval_SHIFT 		16 		

#define MGAREG_YDSTORG 			0x1c94
#define MGAREG_YTOP 				0x1c98
#define MGAREG_ZORG 				0x1c0c

#    define ZO_zorgmap_MASK 		0xfffffffe 	/* bit 0 */
#    define ZO_zorgmap_fb 		0x0 		
#    define ZO_zorgmap_sys 		0x1 		
#    define ZO_zorgacc_MASK 		0xfffffffd 	/* bit 1 */
#    define ZO_zorgacc_pci 		0x0 		
#    define ZO_zorgacc_agp 		0x2 		
#    define ZO_zorg_MASK 		0x3 		/* bits 2-31 */
#    define ZO_zorg_SHIFT 		2 		




/**************** (END) AUTOMATICLY GENERATED REGISTER FILE ******************/

/* Copied from mga_drv.h kernel file.
 */

#define MGA_ILOAD_ALIGN		64
#define MGA_ILOAD_MASK		(MGA_ILOAD_ALIGN - 1)

#endif 	/* _MGAREGS_H_ */