mgaregs.h

Mesa is an open-source implementation of the OpenGL specification - a system for rendering interacti

#define MGAREG_DR14 				0x1cf8
#define MGAREG_DR15 				0x1cfc
#define MGAREG_DSTORG 				0x2cb8

#    define DO_dstmap_MASK 		0xfffffffe 	/* bit 0 */
#    define DO_dstmap_fb 		0x0 		
#    define DO_dstmap_sys 		0x1 		
#    define DO_dstacc_MASK 		0xfffffffd 	/* bit 1 */
#    define DO_dstacc_pci 		0x0 		
#    define DO_dstacc_agp 		0x2 		
#    define DO_dstorg_MASK 		0x7 		/* bits 3-31 */
#    define DO_dstorg_SHIFT 		3 		

#define MGAREG_DWG_INDIR_WT 			0x1e80
#define MGAREG_DWGCTL 				0x1c00

#    define DC_opcod_MASK 		0xfffffff0 	/* bits 0-3 */
#    define DC_opcod_line_open 		0x0 		/* val 0, shift 0 */
#    define DC_opcod_autoline_open 	0x1 		/* val 1, shift 0 */
#    define DC_opcod_line_close 	0x2 		/* val 2, shift 0 */
#    define DC_opcod_autoline_close 	0x3 		/* val 3, shift 0 */
#    define DC_opcod_trap 		0x4 		/* val 4, shift 0 */
#    define DC_opcod_texture_trap 	0x6 		/* val 6, shift 0 */
#    define DC_opcod_bitblt 		0x8 		/* val 8, shift 0 */
#    define DC_opcod_iload 		0x9 		/* val 9, shift 0 */
#    define DC_atype_MASK 		0xffffff8f 	/* bits 4-6 */
#    define DC_atype_rpl 		0x0 		/* val 0, shift 4 */
#    define DC_atype_rstr 		0x10 		/* val 1, shift 4 */
#    define DC_atype_zi 		0x30 		/* val 3, shift 4 */
#    define DC_atype_blk 		0x40 		/* val 4, shift 4 */
#    define DC_atype_i 			0x70 		/* val 7, shift 4 */
#    define DC_linear_MASK 		0xffffff7f 	/* bit 7 */
#    define DC_linear_xy 		0x0 		
#    define DC_linear_linear 		0x80 		
#    define DC_zmode_MASK 		0xfffff8ff 	/* bits 8-10 */
#    define DC_zmode_nozcmp 		0x0 		/* val 0, shift 8 */
#    define DC_zmode_ze 		0x200 		/* val 2, shift 8 */
#    define DC_zmode_zne 		0x300 		/* val 3, shift 8 */
#    define DC_zmode_zlt 		0x400 		/* val 4, shift 8 */
#    define DC_zmode_zlte 		0x500 		/* val 5, shift 8 */
#    define DC_zmode_zgt 		0x600 		/* val 6, shift 8 */
#    define DC_zmode_zgte 		0x700 		/* val 7, shift 8 */
#    define DC_solid_MASK 		0xfffff7ff 	/* bit 11 */
#    define DC_solid_disable 		0x0 		
#    define DC_solid_enable 		0x800 		
#    define DC_arzero_MASK 		0xffffefff 	/* bit 12 */
#    define DC_arzero_disable 		0x0 		
#    define DC_arzero_enable 		0x1000 		
#    define DC_sgnzero_MASK 		0xffffdfff 	/* bit 13 */
#    define DC_sgnzero_disable 		0x0 		
#    define DC_sgnzero_enable 		0x2000 		
#    define DC_shftzero_MASK 		0xffffbfff 	/* bit 14 */
#    define DC_shftzero_disable 	0x0 		
#    define DC_shftzero_enable 		0x4000 		
#    define DC_bop_MASK 		0xfff0ffff 	/* bits 16-19 */
#    define DC_bop_SHIFT 		16 		
#    define DC_trans_MASK 		0xff0fffff 	/* bits 20-23 */
#    define DC_trans_SHIFT 		20 		
#    define DC_bltmod_MASK 		0xe1ffffff 	/* bits 25-28 */
#    define DC_bltmod_bmonolef 		0x0 		/* val 0, shift 25 */
#    define DC_bltmod_bmonowf 		0x8000000 	/* val 4, shift 25 */
#    define DC_bltmod_bplan 		0x2000000 	/* val 1, shift 25 */
#    define DC_bltmod_bfcol 		0x4000000 	/* val 2, shift 25 */
#    define DC_bltmod_bu32bgr 		0x6000000 	/* val 3, shift 25 */
#    define DC_bltmod_bu32rgb 		0xe000000 	/* val 7, shift 25 */
#    define DC_bltmod_bu24bgr 		0x16000000 	/* val 11, shift 25 */
#    define DC_bltmod_bu24rgb 		0x1e000000 	/* val 15, shift 25 */
#    define DC_pattern_MASK 		0xdfffffff 	/* bit 29 */
#    define DC_pattern_disable 		0x0 		
#    define DC_pattern_enable 		0x20000000 	
#    define DC_transc_MASK 		0xbfffffff 	/* bit 30 */
#    define DC_transc_disable 		0x0 		
#    define DC_transc_enable 		0x40000000 	
#    define DC_clipdis_MASK 		0x7fffffff 	/* bit 31 */
#    define DC_clipdis_disable 		0x0 		
#    define DC_clipdis_enable 		0x80000000 	

#define MGAREG_DWGSYNC 			0x2c4c

#    define DS_dwgsyncaddr_MASK 	0x3 		/* bits 2-31 */
#    define DS_dwgsyncaddr_SHIFT 	2 		

#define MGAREG_FCOL 				0x1c24
#define MGAREG_FIFOSTATUS 			0x1e10

#    define FS_fifocount_MASK 		0xffffff80 	/* bits 0-6 */
#    define FS_fifocount_SHIFT 		0 		
#    define FS_bfull_MASK 		0xfffffeff 	/* bit 8 */
#    define FS_bfull_disable 		0x0 		
#    define FS_bfull_enable 		0x100 		
#    define FS_bempty_MASK 		0xfffffdff 	/* bit 9 */
#    define FS_bempty_disable 		0x0 		
#    define FS_bempty_enable 		0x200 		

#define MGAREG_FOGCOL 				0x1cf4
#define MGAREG_FOGSTART 			0x1cc4
#define MGAREG_FOGXINC 			0x1cd4
#define MGAREG_FOGYINC 			0x1ce4
#define MGAREG_FXBNDRY 			0x1c84

#    define XA_fxleft_MASK 		0xffff0000 	/* bits 0-15 */
#    define XA_fxleft_SHIFT 		0 		
#    define XA_fxright_MASK 		0xffff 		/* bits 16-31 */
#    define XA_fxright_SHIFT 		16 		

#define MGAREG_FXLEFT 				0x1ca8
#define MGAREG_FXRIGHT 			0x1cac
#define MGAREG_ICLEAR 				0x1e18

#    define IC_softrapiclr_MASK 	0xfffffffe 	/* bit 0 */
#    define IC_softrapiclr_disable 	0x0 		
#    define IC_softrapiclr_enable 	0x1 		
#    define IC_pickiclr_MASK 		0xfffffffb 	/* bit 2 */
#    define IC_pickiclr_disable 	0x0 		
#    define IC_pickiclr_enable 		0x4 		
#    define IC_vlineiclr_MASK 		0xffffffdf 	/* bit 5 */
#    define IC_vlineiclr_disable 	0x0 		
#    define IC_vlineiclr_enable 	0x20 		
#    define IC_wiclr_MASK 		0xffffff7f 	/* bit 7 */
#    define IC_wiclr_disable 		0x0 		
#    define IC_wiclr_enable 		0x80 		
#    define IC_wciclr_MASK 		0xfffffeff 	/* bit 8 */
#    define IC_wciclr_disable 		0x0 		
#    define IC_wciclr_enable 		0x100 		

#define MGAREG_IEN 				0x1e1c

#    define IE_softrapien_MASK 		0xfffffffe 	/* bit 0 */
#    define IE_softrapien_disable 	0x0 		
#    define IE_softrapien_enable 	0x1 		
#    define IE_pickien_MASK 		0xfffffffb 	/* bit 2 */
#    define IE_pickien_disable 		0x0 		
#    define IE_pickien_enable 		0x4 		
#    define IE_vlineien_MASK 		0xffffffdf 	/* bit 5 */
#    define IE_vlineien_disable 	0x0 		
#    define IE_vlineien_enable 		0x20 		
#    define IE_extien_MASK 		0xffffffbf 	/* bit 6 */
#    define IE_extien_disable 		0x0 		
#    define IE_extien_enable 		0x40 		
#    define IE_wien_MASK 		0xffffff7f 	/* bit 7 */
#    define IE_wien_disable 		0x0 		
#    define IE_wien_enable 		0x80 		
#    define IE_wcien_MASK 		0xfffffeff 	/* bit 8 */
#    define IE_wcien_disable 		0x0 		
#    define IE_wcien_enable 		0x100 		

#define MGAREG_LEN 				0x1c5c
#define MGAREG_MACCESS 			0x1c04

#    define MA_pwidth_MASK 		0xfffffffc 	/* bits 0-1 */
#    define MA_pwidth_8 		0x0 		/* val 0, shift 0 */
#    define MA_pwidth_16 		0x1 		/* val 1, shift 0 */
#    define MA_pwidth_32 		0x2 		/* val 2, shift 0 */
#    define MA_pwidth_24 		0x3 		/* val 3, shift 0 */
#    define MA_zwidth_MASK 		0xffffffe7 	/* bits 3-4 */
#    define MA_zwidth_16 		0x0 		/* val 0, shift 3 */
#    define MA_zwidth_32 		0x8 		/* val 1, shift 3 */
#    define MA_zwidth_15 		0x10 		/* val 2, shift 3 */
#    define MA_zwidth_24 		0x18 		/* val 3, shift 3 */
#    define MA_memreset_MASK 		0xffff7fff 	/* bit 15 */
#    define MA_memreset_disable 	0x0 		
#    define MA_memreset_enable 		0x8000 		
#    define MA_fogen_MASK 		0xfbffffff 	/* bit 26 */
#    define MA_fogen_disable 		0x0 		
#    define MA_fogen_enable 		0x4000000 	
#    define MA_tlutload_MASK 		0xdfffffff 	/* bit 29 */
#    define MA_tlutload_disable 	0x0 		
#    define MA_tlutload_enable 		0x20000000 	
#    define MA_nodither_MASK 		0xbfffffff 	/* bit 30 */
#    define MA_nodither_disable 	0x0 		
#    define MA_nodither_enable 		0x40000000 	
#    define MA_dit555_MASK 		0x7fffffff 	/* bit 31 */
#    define MA_dit555_disable 		0x0 		
#    define MA_dit555_enable 		0x80000000 	

#define MGAREG_MCTLWTST 			0x1c08

#    define MCWS_casltncy_MASK 		0xfffffff8 	/* bits 0-2 */
#    define MCWS_casltncy_SHIFT 	0 		
#    define MCWS_rrddelay_MASK 		0xffffffcf 	/* bits 4-5 */
#    define MCWS_rcddelay_MASK 		0xfffffe7f 	/* bits 7-8 */
#    define MCWS_rasmin_MASK 		0xffffe3ff 	/* bits 10-12 */
#    define MCWS_rasmin_SHIFT 		10 		
#    define MCWS_rpdelay_MASK 		0xffff3fff 	/* bits 14-15 */
#    define MCWS_wrdelay_MASK 		0xfff3ffff 	/* bits 18-19 */
#    define MCWS_rddelay_MASK 		0xffdfffff 	/* bit 21 */
#    define MCWS_rddelay_disable 	0x0 		
#    define MCWS_rddelay_enable 	0x200000 	
#    define MCWS_smrdelay_MASK 		0xfe7fffff 	/* bits 23-24 */
#    define MCWS_bwcdelay_MASK 		0xf3ffffff 	/* bits 26-27 */
#    define MCWS_bpldelay_MASK 		0x1fffffff 	/* bits 29-31 */
#    define MCWS_bpldelay_SHIFT 	29 		

#define MGAREG_MEMRDBK 			0x1e44

#    define MRB_mclkbrd0_MASK 		0xfffffff0 	/* bits 0-3 */
#    define MRB_mclkbrd0_SHIFT 		0 		
#    define MRB_mclkbrd1_MASK 		0xfffffe1f 	/* bits 5-8 */
#    define MRB_mclkbrd1_SHIFT 		5 		
#    define MRB_strmfctl_MASK 		0xff3fffff 	/* bits 22-23 */
#    define MRB_mrsopcod_MASK 		0xe1ffffff 	/* bits 25-28 */
#    define MRB_mrsopcod_SHIFT 		25 		

#define MGAREG_OPMODE 				0x1e54

#    define OM_dmamod_MASK 		0xfffffff3 	/* bits 2-3 */
#    define OM_dmamod_general 		0x0 		/* val 0, shift 2 */
#    define OM_dmamod_blit 		0x4 		/* val 1, shift 2 */
#    define OM_dmamod_vector 		0x8 		/* val 2, shift 2 */
#    define OM_dmamod_vertex 		0xc 		/* val 3, shift 2 */
#    define OM_dmadatasiz_MASK 		0xfffffcff 	/* bits 8-9 */
#    define OM_dmadatasiz_8 		0x0 		/* val 0, shift 8 */
#    define OM_dmadatasiz_16 		0x100 		/* val 1, shift 8 */
#    define OM_dmadatasiz_32 		0x200 		/* val 2, shift 8 */
#    define OM_dirdatasiz_MASK 		0xfffcffff 	/* bits 16-17 */
#    define OM_dirdatasiz_8 		0x0 		/* val 0, shift 16 */
#    define OM_dirdatasiz_16 		0x10000 	/* val 1, shift 16 */
#    define OM_dirdatasiz_32 		0x20000 	/* val 2, shift 16 */

#define MGAREG_PAT0 				0x1c10
#define MGAREG_PAT1 				0x1c14
#define MGAREG_PITCH 				0x1c8c

#    define P_iy_MASK 			0xffffe000 	/* bits 0-12 */
#    define P_iy_SHIFT 			0 		
#    define P_ylin_MASK 		0xffff7fff 	/* bit 15 */
#    define P_ylin_disable 		0x0 		
#    define P_ylin_enable 		0x8000 		

#define MGAREG_PLNWT 				0x1c1c
#define MGAREG_PRIMADDRESS 			0x1e58

#    define PDCA_primod_MASK 		0xfffffffc 	/* bits 0-1 */
#    define PDCA_primod_general 	0x0 		/* val 0, shift 0 */
#    define PDCA_primod_blit 		0x1 		/* val 1, shift 0 */
#    define PDCA_primod_vector 		0x2 		/* val 2, shift 0 */
#    define PDCA_primod_vertex 		0x3 		/* val 3, shift 0 */
#    define PDCA_primaddress_MASK 	0x3 		/* bits 2-31 */
#    define PDCA_primaddress_SHIFT 	2 		

#define MGAREG_PRIMEND 			0x1e5c

#    define PDEA_primnostart_MASK 	0xfffffffe 	/* bit 0 */
#    define PDEA_primnostart_disable 	0x0 		
#    define PDEA_primnostart_enable 	0x1 		
#    define PDEA_pagpxfer_MASK 		0xfffffffd 	/* bit 1 */
#    define PDEA_pagpxfer_disable 	0x0 		
#    define PDEA_pagpxfer_enable 	0x2 		
#    define PDEA_primend_MASK 		0x3 		/* bits 2-31 */
#    define PDEA_primend_SHIFT 		2 		

#define MGAREG_PRIMPTR 			0x1e50

#    define PLS_primptren0_MASK 	0xfffffffe 	/* bit 0 */
#    define PLS_primptren0_disable 	0x0 		
#    define PLS_primptren0_enable 	0x1 		
#    define PLS_primptren1_MASK 	0xfffffffd 	/* bit 1 */
#    define PLS_primptren1_disable 	0x0 		
#    define PLS_primptren1_enable 	0x2 		
#    define PLS_primptr_MASK 		0x7 		/* bits 3-31 */
#    define PLS_primptr_SHIFT 		3 		

#define MGAREG_RST 				0x1e40

#    define R_softreset_MASK 		0xfffffffe 	/* bit 0 */
#    define R_softreset_disable 	0x0 		
#    define R_softreset_enable 		0x1 		
#    define R_softextrst_MASK 		0xfffffffd 	/* bit 1 */
#    define R_softextrst_disable 	0x0 		
#    define R_softextrst_enable 	0x2 		

#define MGAREG_SECADDRESS 			0x2c40

#    define SDCA_secmod_MASK 		0xfffffffc 	/* bits 0-1 */
#    define SDCA_secmod_general 	0x0 		/* val 0, shift 0 */
#    define SDCA_secmod_blit 		0x1 		/* val 1, shift 0 */
#    define SDCA_secmod_vector 		0x2 		/* val 2, shift 0 */
#    define SDCA_secmod_vertex 		0x3 		/* val 3, shift 0 */
#    define SDCA_secaddress_MASK 	0x3 		/* bits 2-31 */
#    define SDCA_secaddress_SHIFT 	2 		

#define MGAREG_SECEND 				0x2c44

#    define SDEA_sagpxfer_MASK 		0xfffffffd 	/* bit 1 */
#    define SDEA_sagpxfer_disable 	0x0 		
#    define SDEA_sagpxfer_enable 	0x2 		
#    define SDEA_secend_MASK 		0x3 		/* bits 2-31 */
#    define SDEA_secend_SHIFT 		2 		

#define MGAREG_SETUPADDRESS 			0x2cd0

#    define SETADD_mode_MASK 		0xfffffffc 	/* bits 0-1 */
#    define SETADD_mode_vertlist 	0x0 		/* val 0, shift 0 */
#    define SETADD_address_MASK 	0x3 		/* bits 2-31 */
#    define SETADD_address_SHIFT 	2 		

#define MGAREG_SETUPEND 			0x2cd4

#    define SETEND_agpxfer_MASK 	0xfffffffd 	/* bit 1 */
#    define SETEND_agpxfer_disable 	0x0 		
#    define SETEND_agpxfer_enable 	0x2 		
#    define SETEND_address_MASK 	0x3 		/* bits 2-31 */
#    define SETEND_address_SHIFT 	2 		

#define MGAREG_SGN 				0x1c58

#    define S_sdydxl_MASK 		0xfffffffe 	/* bit 0 */
#    define S_sdydxl_y 			0x0 		
#    define S_sdydxl_x 			0x1 		
#    define S_scanleft_MASK 		0xfffffffe 	/* bit 0 */
#    define S_scanleft_disable 		0x0 		
#    define S_scanleft_enable 		0x1 		
#    define S_sdxl_MASK 		0xfffffffd 	/* bit 1 */
#    define S_sdxl_pos 			0x0 		
#    define S_sdxl_neg 			0x2 		
#    define S_sdy_MASK 			0xfffffffb 	/* bit 2 */
#    define S_sdy_pos 			0x0 		
#    define S_sdy_neg 			0x4 		
#    define S_sdxr_MASK 		0xffffffdf 	/* bit 5 */
#    define S_sdxr_pos 			0x0 		
#    define S_sdxr_neg 			0x20 		
#    define S_brkleft_MASK 		0xfffffeff 	/* bit 8 */
#    define S_brkleft_disable 		0x0 		
#    define S_brkleft_enable 		0x100 		
#    define S_errorinit_MASK 		0x7fffffff 	/* bit 31 */
#    define S_errorinit_disable 	0x0 		
#    define S_errorinit_enable 		0x80000000 	

#define MGAREG_SHIFT 				0x1c50

#    define FSC_x_off_MASK 		0xfffffff0 	/* bits 0-3 */
#    define FSC_x_off_SHIFT 		0 		
#    define FSC_funcnt_MASK 		0xffffff80 	/* bits 0-6 */
#    define FSC_funcnt_SHIFT 		0 		
#    define FSC_y_off_MASK 		0xffffff8f 	/* bits 4-6 */
#    define FSC_y_off_SHIFT 		4 		
#    define FSC_funoff_MASK 		0xffc0ffff 	/* bits 16-21 */
#    define FSC_funoff_SHIFT 		16 		
#    define FSC_stylelen_MASK 		0xffc0ffff 	/* bits 16-21 */
#    define FSC_stylelen_SHIFT 		16 		

#define MGAREG_SOFTRAP 			0x2c48

#    define STH_softraphand_MASK 	0x3 		/* bits 2-31 */
#    define STH_softraphand_SHIFT 	2 		

#define MGAREG_SPECBSTART 			0x2c98
#define MGAREG_SPECBXINC 			0x2c9c
#define MGAREG_SPECBYINC 			0x2ca0