r128_reg.h

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/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h,v 1.15 2002/12/16 16:19:11 dawes Exp $ */
/*
 * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
 *                      Precision Insight, Inc., Cedar Park, Texas, and
 *                      VA Linux Systems Inc., Fremont, California.
 *
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation on the rights to use, copy, modify, merge,
 * publish, distribute, sublicense, and/or sell copies of the Software,
 * and to permit persons to whom the Software is furnished to do so,
 * subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
 * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

/*
 * Authors:
 *   Rickard E. Faith <[e-mail]>
 *   Kevin E. Martin <[e-mail]>
 *   Gareth Hughes <[e-mail]>
 *
 * References:
 *
 *   RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
 *   Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
 *   1999.
 *
 *   RAGE 128 Software Development Manual (Technical Reference Manual P/N
 *   SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
 *
 */

#ifndef _R128_REG_H_
#define _R128_REG_H_

#define R128_ADAPTER_ID                   0x0f2c /* PCI */
#define R128_AGP_APER_OFFSET              0x0178
#define R128_AGP_BASE                     0x0170
#define R128_AGP_CNTL                     0x0174
#       define R128_AGP_APER_SIZE_256MB   (0x00 << 0)
#       define R128_AGP_APER_SIZE_128MB   (0x20 << 0)
#       define R128_AGP_APER_SIZE_64MB    (0x30 << 0)
#       define R128_AGP_APER_SIZE_32MB    (0x38 << 0)
#       define R128_AGP_APER_SIZE_16MB    (0x3c << 0)
#       define R128_AGP_APER_SIZE_8MB     (0x3e << 0)
#       define R128_AGP_APER_SIZE_4MB     (0x3f << 0)
#       define R128_AGP_APER_SIZE_MASK    (0x3f << 0)
#define R128_AGP_CNTL_B                   0x0b44
#define R128_AGP_COMMAND                  0x0f58 /* PCI */
#define R128_AGP_PLL_CNTL                 0x0010 /* PLL */
#define R128_AGP_STATUS                   0x0f54 /* PCI */
#       define R128_AGP_1X_MODE           0x01
#       define R128_AGP_2X_MODE           0x02
#       define R128_AGP_4X_MODE           0x04
#       define R128_AGP_MODE_MASK         0x07
#define R128_AMCGPIO_A_REG                0x01a0
#define R128_AMCGPIO_EN_REG               0x01a8
#define R128_AMCGPIO_MASK                 0x0194
#define R128_AMCGPIO_Y_REG                0x01a4
#define R128_ATTRDR                       0x03c1 /* VGA */
#define R128_ATTRDW                       0x03c0 /* VGA */
#define R128_ATTRX                        0x03c0 /* VGA */
#define R128_AUX_SC_CNTL                  0x1660
#       define R128_AUX1_SC_EN            (1 << 0)
#       define R128_AUX1_SC_MODE_OR       (0 << 1)
#       define R128_AUX1_SC_MODE_NAND     (1 << 1)
#       define R128_AUX2_SC_EN            (1 << 2)
#       define R128_AUX2_SC_MODE_OR       (0 << 3)
#       define R128_AUX2_SC_MODE_NAND     (1 << 3)
#       define R128_AUX3_SC_EN            (1 << 4)
#       define R128_AUX3_SC_MODE_OR       (0 << 5)
#       define R128_AUX3_SC_MODE_NAND     (1 << 5)
#define R128_AUX1_SC_BOTTOM               0x1670
#define R128_AUX1_SC_LEFT                 0x1664
#define R128_AUX1_SC_RIGHT                0x1668
#define R128_AUX1_SC_TOP                  0x166c
#define R128_AUX2_SC_BOTTOM               0x1680
#define R128_AUX2_SC_LEFT                 0x1674
#define R128_AUX2_SC_RIGHT                0x1678
#define R128_AUX2_SC_TOP                  0x167c
#define R128_AUX3_SC_BOTTOM               0x1690
#define R128_AUX3_SC_LEFT                 0x1684
#define R128_AUX3_SC_RIGHT                0x1688
#define R128_AUX3_SC_TOP                  0x168c
#define R128_AUX_WINDOW_HORZ_CNTL         0x02d8
#define R128_AUX_WINDOW_VERT_CNTL         0x02dc

#define R128_BASE_CODE                    0x0f0b
#define R128_BIOS_0_SCRATCH               0x0010
#define R128_BIOS_1_SCRATCH               0x0014
#define R128_BIOS_2_SCRATCH               0x0018
#define R128_BIOS_3_SCRATCH               0x001c
#define R128_BIOS_4_SCRATCH               0x0020
#define R128_BIOS_5_SCRATCH               0x0024
#       define R128_BIOS_DISPLAY_FP       (1 << 0)
#       define R128_BIOS_DISPLAY_CRT      (2 << 0)
#       define R128_BIOS_DISPLAY_FP_CRT   (3 << 0)
#define R128_BIOS_6_SCRATCH               0x0028
#define R128_BIOS_7_SCRATCH               0x002c
#define R128_BIOS_ROM                     0x0f30 /* PCI */
#define R128_BIST                         0x0f0f /* PCI */
#define R128_BM_CHUNK_0_VAL               0x0a18
#       define R128_BM_PTR_FORCE_TO_PCI    (1 << 21)
#       define R128_BM_PM4_RD_FORCE_TO_PCI (1 << 22)
#       define R128_BM_GLOBAL_FORCE_TO_PCI (1 << 23)
#define R128_BRUSH_DATA0                  0x1480
#define R128_BRUSH_DATA1                  0x1484
#define R128_BRUSH_DATA10                 0x14a8
#define R128_BRUSH_DATA11                 0x14ac
#define R128_BRUSH_DATA12                 0x14b0
#define R128_BRUSH_DATA13                 0x14b4
#define R128_BRUSH_DATA14                 0x14b8
#define R128_BRUSH_DATA15                 0x14bc
#define R128_BRUSH_DATA16                 0x14c0
#define R128_BRUSH_DATA17                 0x14c4
#define R128_BRUSH_DATA18                 0x14c8
#define R128_BRUSH_DATA19                 0x14cc
#define R128_BRUSH_DATA2                  0x1488
#define R128_BRUSH_DATA20                 0x14d0
#define R128_BRUSH_DATA21                 0x14d4
#define R128_BRUSH_DATA22                 0x14d8
#define R128_BRUSH_DATA23                 0x14dc
#define R128_BRUSH_DATA24                 0x14e0
#define R128_BRUSH_DATA25                 0x14e4
#define R128_BRUSH_DATA26                 0x14e8
#define R128_BRUSH_DATA27                 0x14ec
#define R128_BRUSH_DATA28                 0x14f0
#define R128_BRUSH_DATA29                 0x14f4
#define R128_BRUSH_DATA3                  0x148c
#define R128_BRUSH_DATA30                 0x14f8
#define R128_BRUSH_DATA31                 0x14fc
#define R128_BRUSH_DATA32                 0x1500
#define R128_BRUSH_DATA33                 0x1504
#define R128_BRUSH_DATA34                 0x1508
#define R128_BRUSH_DATA35                 0x150c
#define R128_BRUSH_DATA36                 0x1510
#define R128_BRUSH_DATA37                 0x1514
#define R128_BRUSH_DATA38                 0x1518
#define R128_BRUSH_DATA39                 0x151c
#define R128_BRUSH_DATA4                  0x1490
#define R128_BRUSH_DATA40                 0x1520
#define R128_BRUSH_DATA41                 0x1524
#define R128_BRUSH_DATA42                 0x1528
#define R128_BRUSH_DATA43                 0x152c
#define R128_BRUSH_DATA44                 0x1530
#define R128_BRUSH_DATA45                 0x1534
#define R128_BRUSH_DATA46                 0x1538
#define R128_BRUSH_DATA47                 0x153c
#define R128_BRUSH_DATA48                 0x1540
#define R128_BRUSH_DATA49                 0x1544
#define R128_BRUSH_DATA5                  0x1494
#define R128_BRUSH_DATA50                 0x1548
#define R128_BRUSH_DATA51                 0x154c
#define R128_BRUSH_DATA52                 0x1550
#define R128_BRUSH_DATA53                 0x1554
#define R128_BRUSH_DATA54                 0x1558
#define R128_BRUSH_DATA55                 0x155c
#define R128_BRUSH_DATA56                 0x1560
#define R128_BRUSH_DATA57                 0x1564
#define R128_BRUSH_DATA58                 0x1568
#define R128_BRUSH_DATA59                 0x156c
#define R128_BRUSH_DATA6                  0x1498
#define R128_BRUSH_DATA60                 0x1570
#define R128_BRUSH_DATA61                 0x1574
#define R128_BRUSH_DATA62                 0x1578
#define R128_BRUSH_DATA63                 0x157c
#define R128_BRUSH_DATA7                  0x149c
#define R128_BRUSH_DATA8                  0x14a0
#define R128_BRUSH_DATA9                  0x14a4
#define R128_BRUSH_SCALE                  0x1470
#define R128_BRUSH_Y_X                    0x1474
#define R128_BUS_CNTL                     0x0030
#       define R128_BUS_MASTER_DIS         (1 << 6)
#       define R128_BUS_RD_DISCARD_EN      (1 << 24)
#       define R128_BUS_RD_ABORT_EN        (1 << 25)
#       define R128_BUS_MSTR_DISCONNECT_EN (1 << 28)
#       define R128_BUS_WRT_BURST          (1 << 29)
#       define R128_BUS_READ_BURST         (1 << 30)
#define R128_BUS_CNTL1                    0x0034
#       define R128_BUS_WAIT_ON_LOCK_EN    (1 << 4)

#define R128_CACHE_CNTL                   0x1724
#define R128_CACHE_LINE                   0x0f0c /* PCI */
#define R128_CAP0_TRIG_CNTL               0x0950 /* ? */
#define R128_CAP1_TRIG_CNTL               0x09c0 /* ? */
#define R128_CAPABILITIES_ID              0x0f50 /* PCI */
#define R128_CAPABILITIES_PTR             0x0f34 /* PCI */
#define R128_CLK_PIN_CNTL                 0x0001 /* PLL */
#define R128_CLOCK_CNTL_DATA              0x000c
#define R128_CLOCK_CNTL_INDEX             0x0008
#       define R128_PLL_WR_EN             (1 << 7)
#       define R128_PLL_DIV_SEL           (3 << 8)
#define R128_CLR_CMP_CLR_3D               0x1a24
#define R128_CLR_CMP_CLR_DST              0x15c8
#define R128_CLR_CMP_CLR_SRC              0x15c4
#define R128_CLR_CMP_CNTL                 0x15c0
#       define R128_SRC_CMP_EQ_COLOR      (4 <<  0)
#       define R128_SRC_CMP_NEQ_COLOR     (5 <<  0)
#       define R128_CLR_CMP_SRC_SOURCE    (1 << 24)
#define R128_CLR_CMP_MASK                 0x15cc
#       define R128_CLR_CMP_MSK           0xffffffff
#define R128_CLR_CMP_MASK_3D              0x1A28
#define R128_COMMAND                      0x0f04 /* PCI */
#define R128_COMPOSITE_SHADOW_ID          0x1a0c
#define R128_CONFIG_APER_0_BASE           0x0100
#define R128_CONFIG_APER_1_BASE           0x0104
#define R128_CONFIG_APER_SIZE             0x0108
#define R128_CONFIG_BONDS                 0x00e8
#define R128_CONFIG_CNTL                  0x00e0
#       define APER_0_BIG_ENDIAN_16BPP_SWAP (1 << 0)
#       define APER_0_BIG_ENDIAN_32BPP_SWAP (2 << 0)
#define R128_CONFIG_MEMSIZE               0x00f8
#define R128_CONFIG_MEMSIZE_EMBEDDED      0x0114
#define R128_CONFIG_REG_1_BASE            0x010c
#define R128_CONFIG_REG_APER_SIZE         0x0110
#define R128_CONFIG_XSTRAP                0x00e4
#define R128_CONSTANT_COLOR_C             0x1d34
#       define R128_CONSTANT_COLOR_MASK   0x00ffffff
#       define R128_CONSTANT_COLOR_ONE    0x00ffffff
#       define R128_CONSTANT_COLOR_ZERO   0x00000000
#define R128_CRC_CMDFIFO_ADDR             0x0740
#define R128_CRC_CMDFIFO_DOUT             0x0744
#define R128_CRTC_CRNT_FRAME              0x0214
#define R128_CRTC_DEBUG                   0x021c
#define R128_CRTC_EXT_CNTL                0x0054
#       define R128_CRTC_VGA_XOVERSCAN    (1 <<  0)
#       define R128_VGA_ATI_LINEAR        (1 <<  3)
#       define R128_XCRT_CNT_EN           (1 <<  6)
#       define R128_CRTC_HSYNC_DIS        (1 <<  8)
#       define R128_CRTC_VSYNC_DIS        (1 <<  9)
#       define R128_CRTC_DISPLAY_DIS      (1 << 10)
#       define R128_CRTC_CRT_ON           (1 << 15)
#       define R128_FP_OUT_EN             (1 << 22)
#       define R128_FP_ACTIVE             (1 << 23)
#define R128_CRTC_EXT_CNTL_DPMS_BYTE      0x0055
#       define R128_CRTC_HSYNC_DIS_BYTE   (1 <<  0)
#       define R128_CRTC_VSYNC_DIS_BYTE   (1 <<  1)
#       define R128_CRTC_DISPLAY_DIS_BYTE (1 <<  2)
#define R128_CRTC_GEN_CNTL                0x0050