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📄 r128_dri.c

📁 Mesa is an open-source implementation of the OpenGL specification - a system for rendering interacti
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/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c,v 1.28 2003/02/07 20:41:14 martin Exp $ *//* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, *                      Precision Insight, Inc., Cedar Park, Texas, and *                      VA Linux Systems Inc., Fremont, California. * * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation on the rights to use, copy, modify, merge, * publish, distribute, sublicense, and/or sell copies of the Software, * and to permit persons to whom the Software is furnished to do so, * subject to the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial * portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. *//* * Authors: *   Kevin E. Martin <martin@valinux.com> *   Rickard E. Faith <faith@valinux.com> *   Daryll Strauss <daryll@valinux.com> *   Gareth Hughes <gareth@valinux.com> * */#include <stdio.h>#include <stdlib.h>#include <string.h>#include <errno.h>#include <unistd.h>// Fix this to use kernel pci_ids.h when all of these IDs make it into the kernel #include "pci_ids.h"#include "driver.h"#include "drm.h"#include "memops.h"#include "r128.h"#include "r128_dri.h"#include "r128_macros.h"#include "r128_reg.h"#include "r128_version.h"#include "r128_drm.h"static size_t r128_drm_page_size;/* Compute log base 2 of val. */static int R128MinBits(int val){    int bits;    if (!val) return 1;    for (bits = 0; val; val >>= 1, ++bits);    return bits;}/* Initialize the AGP state.  Request memory for use in AGP space, and   initialize the Rage 128 registers to point to that memory. */static GLboolean R128DRIAgpInit(const DRIDriverContext *ctx){    unsigned char *R128MMIO = ctx->MMIOAddress;    R128InfoPtr info = ctx->driverPrivate;    unsigned long mode;    unsigned int  vendor, device;    int           ret;    unsigned long cntl, chunk;    int           s, l;    int           flags;    unsigned long agpBase;    if (drmAgpAcquire(ctx->drmFD) < 0) {	fprintf(stderr, "[agp] AGP not available\n");	return GL_FALSE;    }				/* Modify the mode if the default mode is				   not appropriate for this particular				   combination of graphics card and AGP				   chipset. */    mode   = drmAgpGetMode(ctx->drmFD);        /* Default mode */    vendor = drmAgpVendorId(ctx->drmFD);    device = drmAgpDeviceId(ctx->drmFD);    mode &= ~R128_AGP_MODE_MASK;    switch (info->agpMode) {    case 4:          mode |= R128_AGP_4X_MODE;    case 2:          mode |= R128_AGP_2X_MODE;    case 1: default: mode |= R128_AGP_1X_MODE;    }    fprintf(stderr,	       "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n",	       mode, vendor, device,	       0x1002,	       info->Chipset);    if (drmAgpEnable(ctx->drmFD, mode) < 0) {	fprintf(stderr, "[agp] AGP not enabled\n");	drmAgpRelease(ctx->drmFD);	return GL_FALSE;    }    info->agpOffset = 0;    if ((ret = drmAgpAlloc(ctx->drmFD, info->agpSize*1024*1024, 0, NULL,			   &info->agpMemHandle)) < 0) {	fprintf(stderr, "[agp] Out of memory (%d)\n", ret);	drmAgpRelease(ctx->drmFD);	return GL_FALSE;    }    fprintf(stderr,	       "[agp] %d kB allocated with handle 0x%08x\n",	       info->agpSize*1024, info->agpMemHandle);    if (drmAgpBind(ctx->drmFD, info->agpMemHandle, info->agpOffset) < 0) {	fprintf(stderr, "[agp] Could not bind\n");	drmAgpFree(ctx->drmFD, info->agpMemHandle);	drmAgpRelease(ctx->drmFD);	return GL_FALSE;    }				/* Initialize the CCE ring buffer data */    info->ringStart       = info->agpOffset;    info->ringMapSize     = info->ringSize*1024*1024 + r128_drm_page_size;    info->ringSizeLog2QW  = R128MinBits(info->ringSize*1024*1024/8) - 1;    info->ringReadOffset  = info->ringStart + info->ringMapSize;    info->ringReadMapSize = r128_drm_page_size;				/* Reserve space for vertex/indirect buffers */    info->bufStart        = info->ringReadOffset + info->ringReadMapSize;    info->bufMapSize      = info->bufSize*1024*1024;				/* Reserve the rest for AGP textures */    info->agpTexStart     = info->bufStart + info->bufMapSize;    s = (info->agpSize*1024*1024 - info->agpTexStart);    l = R128MinBits((s-1) / R128_NR_TEX_REGIONS);    if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY;    info->agpTexMapSize   = (s >> l) << l;    info->log2AGPTexGran  = l;    if (info->CCESecure) flags = DRM_READ_ONLY;    else                  flags = 0;    if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize,		  DRM_AGP, flags, &info->ringHandle) < 0) {	fprintf(stderr,		   "[agp] Could not add ring mapping\n");	return GL_FALSE;    }    fprintf(stderr,	       "[agp] ring handle = 0x%08x\n", info->ringHandle);    if (drmMap(ctx->drmFD, info->ringHandle, info->ringMapSize,	       (drmAddressPtr)&info->ring) < 0) {	fprintf(stderr, "[agp] Could not map ring\n");	return GL_FALSE;    }    fprintf(stderr,	       "[agp] Ring mapped at 0x%08lx\n",	       (unsigned long)info->ring);    if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,		  DRM_AGP, flags, &info->ringReadPtrHandle) < 0) {	fprintf(stderr,		   "[agp] Could not add ring read ptr mapping\n");	return GL_FALSE;    }    fprintf(stderr, 	       "[agp] ring read ptr handle = 0x%08x\n",	       info->ringReadPtrHandle);    if (drmMap(ctx->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,	       (drmAddressPtr)&info->ringReadPtr) < 0) {	fprintf(stderr,		   "[agp] Could not map ring read ptr\n");	return GL_FALSE;    }    fprintf(stderr,	       "[agp] Ring read ptr mapped at 0x%08lx\n",	       (unsigned long)info->ringReadPtr);    if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,		  DRM_AGP, 0, &info->bufHandle) < 0) {	fprintf(stderr,		   "[agp] Could not add vertex/indirect buffers mapping\n");	return GL_FALSE;    }    fprintf(stderr,	       "[agp] vertex/indirect buffers handle = 0x%08lx\n",	       info->bufHandle);    if (drmMap(ctx->drmFD, info->bufHandle, info->bufMapSize,	       (drmAddressPtr)&info->buf) < 0) {	fprintf(stderr,		   "[agp] Could not map vertex/indirect buffers\n");	return GL_FALSE;    }    fprintf(stderr,	       "[agp] Vertex/indirect buffers mapped at 0x%08lx\n",	       (unsigned long)info->buf);    if (drmAddMap(ctx->drmFD, info->agpTexStart, info->agpTexMapSize,		  DRM_AGP, 0, &info->agpTexHandle) < 0) {	fprintf(stderr,		   "[agp] Could not add AGP texture map mapping\n");	return GL_FALSE;    }    fprintf(stderr,	       "[agp] AGP texture map handle = 0x%08lx\n",	       info->agpTexHandle);    if (drmMap(ctx->drmFD, info->agpTexHandle, info->agpTexMapSize,	       (drmAddressPtr)&info->agpTex) < 0) {	fprintf(stderr,		   "[agp] Could not map AGP texture map\n");	return GL_FALSE;    }    fprintf(stderr,	       "[agp] AGP Texture map mapped at 0x%08lx\n",	       (unsigned long)info->agpTex);				/* Initialize Rage 128's AGP registers */    cntl  = INREG(R128_AGP_CNTL);    cntl &= ~R128_AGP_APER_SIZE_MASK;    switch (info->agpSize) {    case 256: cntl |= R128_AGP_APER_SIZE_256MB; break;    case 128: cntl |= R128_AGP_APER_SIZE_128MB; break;    case  64: cntl |= R128_AGP_APER_SIZE_64MB;  break;    case  32: cntl |= R128_AGP_APER_SIZE_32MB;  break;    case  16: cntl |= R128_AGP_APER_SIZE_16MB;  break;    case   8: cntl |= R128_AGP_APER_SIZE_8MB;   break;    case   4: cntl |= R128_AGP_APER_SIZE_4MB;   break;    default:	fprintf(stderr,		   "[agp] Illegal aperture size %d kB\n",		   info->agpSize*1024);	return GL_FALSE;    }    agpBase = drmAgpBase(ctx->drmFD);    OUTREG(R128_AGP_BASE, agpBase);     OUTREG(R128_AGP_CNTL, cntl);				/* Disable Rage 128's PCIGART registers */    chunk = INREG(R128_BM_CHUNK_0_VAL);    chunk &= ~(R128_BM_PTR_FORCE_TO_PCI |	       R128_BM_PM4_RD_FORCE_TO_PCI |	       R128_BM_GLOBAL_FORCE_TO_PCI);    OUTREG(R128_BM_CHUNK_0_VAL, chunk);    OUTREG(R128_PCI_GART_PAGE, 1); /* Ensure AGP GART is used (for now) */    return GL_TRUE;}static GLboolean R128DRIPciInit(const DRIDriverContext *ctx){    R128InfoPtr info = ctx->driverPrivate;    unsigned char *R128MMIO = ctx->MMIOAddress;    u_int32_t chunk;    int ret;    int flags;    info->agpOffset = 0;    ret = drmScatterGatherAlloc(ctx->drmFD, info->agpSize*1024*1024,				&info->pciMemHandle);    if (ret < 0) {	fprintf(stderr, "[pci] Out of memory (%d)\n", ret);	return GL_FALSE;    }    fprintf(stderr,	       "[pci] %d kB allocated with handle 0x%08x\n",	       info->agpSize*1024, info->pciMemHandle);				/* Initialize the CCE ring buffer data */    info->ringStart       = info->agpOffset;    info->ringMapSize     = info->ringSize*1024*1024 + r128_drm_page_size;    info->ringSizeLog2QW  = R128MinBits(info->ringSize*1024*1024/8) - 1;    info->ringReadOffset  = info->ringStart + info->ringMapSize;    info->ringReadMapSize = r128_drm_page_size;				/* Reserve space for vertex/indirect buffers */    info->bufStart        = info->ringReadOffset + info->ringReadMapSize;    info->bufMapSize      = info->bufSize*1024*1024;    flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL;    if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize,		  DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) {	fprintf(stderr,		   "[pci] Could not add ring mapping\n");	return GL_FALSE;    }    fprintf(stderr,	       "[pci] ring handle = 0x%08lx\n", info->ringHandle);    if (drmMap(ctx->drmFD, info->ringHandle, info->ringMapSize,	       (drmAddressPtr)&info->ring) < 0) {	fprintf(stderr, "[pci] Could not map ring\n");	return GL_FALSE;    }    fprintf(stderr,	       "[pci] Ring mapped at 0x%08lx\n",	       (unsigned long)info->ring);    fprintf(stderr,	       "[pci] Ring contents 0x%08lx\n",	       *(unsigned long *)info->ring);    if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,		  DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {	fprintf(stderr,		   "[pci] Could not add ring read ptr mapping\n");	return GL_FALSE;    }    fprintf(stderr,	       "[pci] ring read ptr handle = 0x%08lx\n",	       info->ringReadPtrHandle);    if (drmMap(ctx->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,	       (drmAddressPtr)&info->ringReadPtr) < 0) {	fprintf(stderr,		   "[pci] Could not map ring read ptr\n");	return GL_FALSE;    }    fprintf(stderr,	       "[pci] Ring read ptr mapped at 0x%08lx\n",	       (unsigned long)info->ringReadPtr);    fprintf(stderr,	       "[pci] Ring read ptr contents 0x%08lx\n",	       *(unsigned long *)info->ringReadPtr);    if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,		  DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {	fprintf(stderr,		   "[pci] Could not add vertex/indirect buffers mapping\n");	return GL_FALSE;    }    fprintf(stderr,	       "[pci] vertex/indirect buffers handle = 0x%08lx\n",	       info->bufHandle);    if (drmMap(ctx->drmFD, info->bufHandle, info->bufMapSize,	       (drmAddressPtr)&info->buf) < 0) {	fprintf(stderr,		   "[pci] Could not map vertex/indirect buffers\n");	return GL_FALSE;    }    fprintf(stderr,	       "[pci] Vertex/indirect buffers mapped at 0x%08lx\n",	       (unsigned long)info->buf);    fprintf(stderr,	       "[pci] Vertex/indirect buffers contents 0x%08lx\n",	       *(unsigned long *)info->buf);    if (!info->IsPCI) {

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