i810_3d_reg.h

Mesa is an open-source implementation of the OpenGL specification - a system for rendering interacti

#define MC_ARG_REPLICATE_ALPHA         (0x1<<1)
#define MC_ARG_DONT_INVERT             (0x0)
#define MC_ARG_INVERT                  (0x1)

#define MC_UPDATE_ARG1                 (1<<17)
#define MC_ARG1_SHIFT                  12
#define MC_ARG1_MASK                   (0x1f << MC_ARG1_SHIFT)

#define MC_UPDATE_ARG2                 (1<<11)
#define MC_ARG2_SHIFT                  6
#define MC_ARG2_MASK                   (0x1f << MC_ARG2_SHIFT)

#define MC_UPDATE_OP                   (1<<5)
#define MC_OP_MASK                     (0xf)
#define MC_OP_DISABLE                  (0x0)
#define MC_OP_ARG1                     (0x1)
#define MC_OP_ARG2                     (0x2)
#define MC_OP_MODULATE                 (0x3)
#define MC_OP_MODULATE_X2              (0x4)
#define MC_OP_MODULATE_X4              (0x5)
#define MC_OP_ADD                      (0x6)
#define MC_OP_ADD_SIGNED               (0x7)
#define MC_OP_LIN_BLEND_ITER_ALPHA     (0x8)
#define MC_OP_LIN_BLEND_ALPHA_FACTOR   (0xa)
#define MC_OP_LIN_BLEND_TEX0_ALPHA     (0x10)
#define MC_OP_LIN_BLEND_TEX1_ALPHA     (0x11)
#define MC_OP_LIN_BLEND_TEX0_COLOR     (0x12)
#define MC_OP_LIN_BLEND_TEX1_COLOR     (0x13)
#define MC_OP_SUBTRACT                 (0x14)

/* GFXRENDERSTATE_MAP_PALETTE_LOAD, p128
 *
 * Format:
 *     0:  GFX_OP_MAP_PALETTE_LOAD
 *     1:  16bpp color[0]
 *     ...
 *     256: 16bpp color[255]
 */
#define GFX_OP_MAP_PALETTE_LOAD ((0x3<<29)|(0x1d<<24)|(0x82<<16)|0xff)

/* GFXRENDERSTATE_MAP_LOD_CONTROL, p127
 */
#define GFX_OP_MAP_LOD_CTL       ((0x3<<29)|(0x1c<<24)|(0x4<<19))
#define MLC_MAP_ID_SHIFT         16
#define MLC_MAP_0                (0<<16)
#define MLC_MAP_1                (1<<16)
#define MLC_UPDATE_DITHER_WEIGHT (1<<10)
#define MLC_DITHER_WEIGHT_MASK   (0x3<<8)
#define MLC_DITHER_WEIGHT_FULL   (0x0<<8)
#define MLC_DITHER_WEIGHT_50     (0x1<<8)
#define MLC_DITHER_WEIGHT_25     (0x2<<8)
#define MLC_DITHER_WEIGHT_12     (0x3<<8)
#define MLC_UPDATE_LOD_BIAS      (1<<7)
#define MLC_LOD_BIAS_MASK        ((1<<7)-1)

/* GFXRENDERSTATE_MAP_LOD_LIMITS, p126
 */
#define GFX_OP_MAP_LOD_LIMITS   ((0x3<<29)|(0x1c<<24)|(0x3<<19))
#define MLL_MAP_ID_SHIFT         16
#define MLL_MAP_0                (0<<16)
#define MLL_MAP_1                (1<<16)
#define MLL_UPDATE_MAX_MIP       (1<<13)
#define MLL_MAX_MIP_SHIFT        5
#define MLL_MAX_MIP_MASK         (0xff<<5)
#define MLL_MAX_MIP_ONE          (0x10<<5)
#define MLL_UPDATE_MIN_MIP       (1<<4)
#define MLL_MIN_MIP_SHIFT        0
#define MLL_MIN_MIP_MASK         (0xf<<0)

/* GFXRENDERSTATE_MAP_FILTER, p124
 */
#define GFX_OP_MAP_FILTER       ((0x3<<29)|(0x1c<<24)|(0x2<<19))
#define MF_MAP_ID_SHIFT         16
#define MF_MAP_0                (0<<16)
#define MF_MAP_1                (1<<16)
#define MF_UPDATE_ANISOTROPIC   (1<<12)
#define MF_ANISOTROPIC_MASK     (1<<10)
#define MF_ANISOTROPIC_ENABLE   (1<<10)
#define MF_UPDATE_MIP_FILTER    (1<<9)
#define MF_MIP_MASK             (0x3<<6)
#define MF_MIP_NONE             (0x0<<6)
#define MF_MIP_NEAREST          (0x1<<6)
#define MF_MIP_DITHER           (0x2<<6)
#define MF_MIP_LINEAR           (0x3<<6)
#define MF_UPDATE_MAG_FILTER    (1<<5)
#define MF_MAG_MASK             (1<<3)
#define MF_MAG_LINEAR           (1<<3)
#define MF_MAG_NEAREST          (0<<3)
#define MF_UPDATE_MIN_FILTER    (1<<2)
#define MF_MIN_MASK             (1<<0)
#define MF_MIN_LINEAR           (1<<0)
#define MF_MIN_NEAREST          (0<<0)

/* GFXRENDERSTATE_MAP_INFO, p118
 */
#define GFX_OP_MAP_INFO      ((0x3<<29)|(0x1d<<24)|0x2)
#define MI1_MAP_ID_SHIFT         28
#define MI1_MAP_0                (0<<28)
#define MI1_MAP_1                (1<<28)
#define MI1_FMT_MASK             (0x7<<24)
#define MI1_FMT_8CI              (0x0<<24)
#define MI1_FMT_8BPP             (0x1<<24)
#define MI1_FMT_16BPP            (0x2<<24)
#define MI1_FMT_422              (0x5<<24)
#define MI1_PF_MASK              (0x3<<21)
#define MI1_PF_8CI_RGB565         (0x0<<21)
#define MI1_PF_8CI_ARGB1555       (0x1<<21)
#define MI1_PF_8CI_ARGB4444       (0x2<<21)
#define MI1_PF_8CI_AY88           (0x3<<21)
#define MI1_PF_16BPP_RGB565       (0x0<<21)
#define MI1_PF_16BPP_ARGB1555     (0x1<<21)
#define MI1_PF_16BPP_ARGB4444     (0x2<<21)
#define MI1_PF_16BPP_AY88         (0x3<<21)
#define MI1_PF_422_YCRCB_SWAP_Y   (0x0<<21)
#define MI1_PF_422_YCRCB          (0x1<<21)
#define MI1_PF_422_YCRCB_SWAP_UV  (0x2<<21)
#define MI1_PF_422_YCRCB_SWAP_YUV (0x3<<21)
#define MI1_OUTPUT_CHANNEL_MASK   (0x3<<19)
#define MI1_COLOR_CONV_ENABLE     (1<<18)
#define MI1_VERT_STRIDE_MASK      (1<<17)
#define MI1_VERT_STRIDE_1         (1<<17)
#define MI1_VERT_OFFSET_MASK      (1<<16)
#define MI1_VERT_OFFSET_1         (1<<16)
#define MI1_ENABLE_FENCE_REGS     (1<<10)
#define MI1_TILED_SURFACE         (1<<9)
#define MI1_TILE_WALK_X           (0<<8)
#define MI1_TILE_WALK_Y           (1<<8)
#define MI1_PITCH_MASK            (0xf<<0)
#define MI2_DIMENSIONS_ARE_LOG2   (1<<31)
#define MI2_DIMENSIONS_ARE_EXACT  (0<<31)
#define MI2_HEIGHT_SHIFT          16
#define MI2_HEIGHT_MASK           (0x1ff<<16)
#define MI2_WIDTH_SHIFT           0
#define MI2_WIDTH_MASK            (0x1ff<<0)
#define MI3_BASE_ADDR_MASK        (~0xf)

/* GFXRENDERSTATE_MAP_COORD_SETS, p116
 */
#define GFX_OP_MAP_COORD_SETS ((0x3<<29)|(0x1c<<24)|(0x1<<19))
#define MCS_COORD_ID_SHIFT         16
#define MCS_COORD_0                (0<<16)
#define MCS_COORD_1                (1<<16)
#define MCS_UPDATE_NORMALIZED      (1<<15)
#define MCS_NORMALIZED_COORDS_MASK (1<<14)
#define MCS_NORMALIZED_COORDS      (1<<14)
#define MCS_UPDATE_V_STATE         (1<<7)
#define MCS_V_STATE_MASK           (0x3<<4)
#define MCS_V_WRAP                 (0x0<<4)
#define MCS_V_MIRROR               (0x1<<4)
#define MCS_V_CLAMP                (0x2<<4)
#define MCS_V_WRAP_SHORTEST        (0x3<<4)
#define MCS_UPDATE_U_STATE         (1<<3)
#define MCS_U_STATE_MASK           (0x3<<0)
#define MCS_U_WRAP                 (0x0<<0)
#define MCS_U_MIRROR               (0x1<<0)
#define MCS_U_CLAMP                (0x2<<0)
#define MCS_U_WRAP_SHORTEST        (0x3<<0)

/* GFXRENDERSTATE_MAP_TEXELS, p115
 */
#define GFX_OP_MAP_TEXELS   ((0x3<<29)|(0x1c<<24)|(0x0<<19))
#define MT_UPDATE_TEXEL1_STATE     (1<<15)
#define MT_TEXEL1_DISABLE          (0<<14)
#define MT_TEXEL1_ENABLE           (1<<14)
#define MT_TEXEL1_COORD0           (0<<11)
#define MT_TEXEL1_COORD1           (1<<11)
#define MT_TEXEL1_MAP0             (0<<8)
#define MT_TEXEL1_MAP1             (1<<8)
#define MT_UPDATE_TEXEL0_STATE     (1<<7)
#define MT_TEXEL0_DISABLE          (0<<6)
#define MT_TEXEL0_ENABLE           (1<<6)
#define MT_TEXEL0_COORD0           (0<<3)
#define MT_TEXEL0_COORD1           (1<<3)
#define MT_TEXEL0_MAP0             (0<<0)
#define MT_TEXEL0_MAP1             (1<<0)

/* GFXRENDERSTATE_VERTEX_FORMAT, p110
 */
#define GFX_OP_VERTEX_FMT  ((0x3<<29)|(0x5<<24))
#define VF_TEXCOORD_COUNT_SHIFT    8
#define VF_TEXCOORD_COUNT_0        (0<<8)
#define VF_TEXCOORD_COUNT_1        (1<<8)
#define VF_TEXCOORD_COUNT_2        (2<<8)
#define VF_SPEC_FOG_ENABLE         (1<<7)
#define VF_RGBA_ENABLE             (1<<6)
#define VF_Z_OFFSET_ENABLE         (1<<5)
#define VF_XYZ                     (0x1<<1)
#define VF_XYZW                    (0x2<<1)
#define VF_XY                      (0x3<<1)
#define VF_XYW                     (0x4<<1)


#define VERT_X_MASK       (~0xf)
#define VERT_X_EDGE_V2V0  (1<<2)
#define VERT_X_EDGE_V1V2  (1<<1)
#define VERT_X_EDGE_V0V1  (1<<0)

/* Not enabled fields should not be sent to hardware:
 */
typedef struct {
   union {
      float x;
      unsigned int edge_flags;
   } x;
   float y;
   float z;
   float z_bias;
   float oow;
   unsigned int argb;
   unsigned int fog_spec_rgb;	/* spec g and r ignored. */
   float tu0;
   float tv0;
   float tu1;
   float tv1;
} i810_full_vertex;



/* GFXCMDPARSER_BATCH_BUFFER, p105
 *
 * Not clear whether start address must be shifted or not.  Not clear
 * whether address is physical system memory, or subject to GTT
 * translation.  Because the address appears to be 32 bits long,
 * perhaps it refers to physical system memory...
 */
#define CMD_OP_BATCH_BUFFER  ((0x0<<29)|(0x30<<23)|0x1)
#define BB1_START_ADDR_MASK   (~0x7)
#define BB1_PROTECTED         (1<<0)
#define BB1_UNPROTECTED       (0<<0)
#define BB2_END_ADDR_MASK     (~0x7)

/* Hardware seems to barf on buffers larger than this (in strange ways)...
 */
#define MAX_BATCH (512*1024)


/* GFXCMDPARSER_Z_BUFFER_INFO, p98
 *
 * Base address is in GTT space, and must be 4K aligned
 */
#define CMD_OP_Z_BUFFER_INFO  ((0x0<<29)|(0x16<<23))
#define ZB_BASE_ADDR_SHIFT     0
#define ZB_BASE_ADDR_MASK     (~((1<<12)-1))
#define ZB_PITCH_512B         (0x0<<0)
#define ZB_PITCH_1K           (0x1<<0)
#define ZB_PITCH_2K           (0x2<<0)
#define ZB_PITCH_4K           (0x3<<0)

/* GFXCMDPARSER_FRONT_BUFFER_INFO, p97
 *
 * Format:
 *     0:  CMD_OP_FRONT_BUFFER_INFO | (pitch<<FB0_PITCH_SHIFT) | FB0_*
 *     1:  FB1_*
 */
#define CMD_OP_FRONT_BUFFER_INFO ((0x0<<29)|(0x14<<23))
#define FB0_PITCH_SHIFT           8
#define FB0_FLIP_SYNC            (0<<6)
#define FB0_FLIP_ASYNC           (1<<6)
#define FB0_BASE_ADDR_SHIFT       0
#define FB0_BASE_ADDR_MASK        0x03FFFFF8

/* GFXCMDPARSER_DEST_BUFFER_INFO, p96
 *
 * Format:
 */
#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
#define DB1_BASE_ADDR_SHIFT       0
#define DB1_BASE_ADDR_MASK        0x03FFF000
#define DB1_PITCH_512B            (0x0<<0)
#define DB1_PITCH_1K              (0x1<<0)
#define DB1_PITCH_2K              (0x2<<0)
#define DB1_PITCH_4K              (0x4<<0)


/* GFXRENDERSTATE_DEST_BUFFER_VARIABLES, p152
 *
 * Format:
 *     0:  GFX_OP_DESTBUFFER_VARS
 *     1:  DEST_*
 */
#define GFX_OP_DESTBUFFER_VARS   ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
#define DV_HORG_BIAS_MASK      (0xf<<20)
#define DV_HORG_BIAS_OGL       (0x0<<20)
#define DV_VORG_BIAS_MASK      (0xf<<16)
#define DV_VORG_BIAS_OGL       (0x0<<16)
#define DV_PF_MASK             (0x7<<8)
#define DV_PF_INDEX            (0x0<<8)
#define DV_PF_555           (0x1<<8)
#define DV_PF_565           (0x2<<8)

#define GFX_OP_ANTIALIAS         ((0x3<<29)|(0x6<<24))
#define AA_UPDATE_EDGEFLAG       (1<<13)
#define AA_ENABLE_EDGEFLAG       (1<<12)
#define AA_UPDATE_POLYWIDTH      (1<<11)
#define AA_POLYWIDTH_05          (1<<9)
#define AA_POLYWIDTH_10          (2<<9)
#define AA_POLYWIDTH_20          (3<<9)
#define AA_POLYWIDTH_40          (4<<9)
#define AA_UPDATE_LINEWIDTH      (1<<8)
#define AA_LINEWIDTH_05          (1<<6)
#define AA_LINEWIDTH_10          (2<<6)
#define AA_LINEWIDTH_20          (3<<6)
#define AA_LINEWIDTH_40          (4<<6)
#define AA_UPDATE_BB_EXPANSION   (1<<5)
#define AA_BB_EXPANSION_SHIFT    2
#define AA_UPDATE_AA_ENABLE      (1<<1)
#define AA_ENABLE                (1<<0)

#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
#define ST1_ENABLE               (1<<16)
#define ST1_MASK                 (0xffff)

#define I810_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)

#endif