via_dri.c

Mesa is an open-source implementation of the OpenGL specification - a system for rendering interacti

        bRegTemp |= (0x52 & 0x3F);
        bRegTemp |= ((0x52 & 0x40) << 1);
        VGAOUT8(0x3c5, bRegTemp);

        /*=* R3 Switch to the highest agent threshold value (74 -> 0x4a)
             SR18[5:0], SR18[7] (7bits) *=*/
        VGAOUT8(0x3c4, 0x18);
        bRegTemp = VGAIN8(0x3c5) & ~0xBF;
        bRegTemp |= (0x4a & 0x3F);
        bRegTemp |= ((0x4a & 0x40) << 1);
        VGAOUT8(0x3c5, bRegTemp);
#if 0
        /*=* R4 Fetch Number for a scan line (unit: 8 bytes)
             SR1C[7:0], SR1D[1:0] (10bits) *=*/
        wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
        VGAOUT8(0x3c4, 0x1c);
        VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF));
        VGAOUT8(0x3c4, 0x1d);
        bRegTemp = VGAIN8(0x3c5) & ~0x03;
        VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
#endif
        if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32)
        {
            /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/
            VGAOUT8(0x3c4, 0x22);
            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
            VGAOUT8(0x3c5, bRegTemp | 0x10);
        }
        else
        {
            /*=* Max. length for a request SR22[4:0]
                 (128/4 -> over flow 0x0) *=*/
            VGAOUT8(0x3c4, 0x22);
            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
            VGAOUT8(0x3c5, bRegTemp);
        }
        break;
    case VIA_PM800:
        /*=* R1 Display FIFO depth (96-1 -> 0x5f) SR17[7:0] (8bits) *=*/
        VGAOUT8(0x3c4, 0x17);
        VGAOUT8(0x3c5, 0x5f);

        /*=* R2 Display fetch datum threshold value (32 -> 0x20)
             SR16[5:0], SR16[7] (7bits) *=*/
        VGAOUT8(0x3c4, 0x16);
        bRegTemp = VGAIN8(0x3c5) & ~0xBF;
        bRegTemp |= (0x20 & 0x3F);
        bRegTemp |= ((0x20 & 0x40) << 1);
        VGAOUT8(0x3c5, bRegTemp);

        /*=* R3 Switch to the highest agent threshold value (16 -> 0x10)
             SR18[5:0], SR18[7] (7bits) *=*/
        VGAOUT8(0x3c4, 0x18);
        bRegTemp = VGAIN8(0x3c5) & ~0xBF;
        bRegTemp |= (0x10 & 0x3F);
        bRegTemp |= ((0x10 & 0x40) << 1);
        VGAOUT8(0x3c5, bRegTemp);
#if 0
        /*=* R4 Fetch Number for a scan line (unit: 8 bytes)
             SR1C[7:0], SR1D[1:0] (10bits) *=*/
        wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
        VGAOUT8(0x3c4, 0x1c);
        VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF));
        VGAOUT8(0x3c4, 0x1d);
        bRegTemp = VGAIN8(0x3c5) & ~0x03;
        VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
#endif
        if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32)
        {
            /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/
            VGAOUT8(0x3c4, 0x22);
            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
            VGAOUT8(0x3c5, bRegTemp | 0x10);
        }
        else
        {
            /*=* Max. length for a request SR22[4:0] (0x1F) *=*/
            VGAOUT8(0x3c4, 0x22);
            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
            VGAOUT8(0x3c5, bRegTemp | 0x1F);
        }
        break;
    default:
        break;
    }
}

static void VIAInitialize2DEngine(DRIDriverContext *ctx)
{
    VIAPtr  pVia = VIAPTR(ctx);
    u_int32_t  dwVQStartAddr, dwVQEndAddr;
    u_int32_t  dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH;
    u_int32_t  dwGEMode;

    /* init 2D engine regs to reset 2D engine */
    VIASETREG(0x04, 0x0);
    VIASETREG(0x08, 0x0);
    VIASETREG(0x0c, 0x0);
    VIASETREG(0x10, 0x0);
    VIASETREG(0x14, 0x0);
    VIASETREG(0x18, 0x0);
    VIASETREG(0x1c, 0x0);
    VIASETREG(0x20, 0x0);
    VIASETREG(0x24, 0x0);
    VIASETREG(0x28, 0x0);
    VIASETREG(0x2c, 0x0);
    VIASETREG(0x30, 0x0);
    VIASETREG(0x34, 0x0);
    VIASETREG(0x38, 0x0);
    VIASETREG(0x3c, 0x0);
    VIASETREG(0x40, 0x0);

    VIADisableMMIO(ctx);

    /* Init AGP and VQ regs */
    VIASETREG(0x43c, 0x00100000);
    VIASETREG(0x440, 0x00000000);
    VIASETREG(0x440, 0x00333004);
    VIASETREG(0x440, 0x60000000);
    VIASETREG(0x440, 0x61000000);
    VIASETREG(0x440, 0x62000000);
    VIASETREG(0x440, 0x63000000);
    VIASETREG(0x440, 0x64000000);
    VIASETREG(0x440, 0x7D000000);

    VIASETREG(0x43c, 0xfe020000);
    VIASETREG(0x440, 0x00000000);

    if (pVia->VQStart != 0) {
        /* Enable VQ */
        dwVQStartAddr = pVia->VQStart;
        dwVQEndAddr = pVia->VQEnd;
        dwVQStartL = 0x50000000 | (dwVQStartAddr & 0xFFFFFF);
        dwVQEndL = 0x51000000 | (dwVQEndAddr & 0xFFFFFF);
        dwVQStartEndH = 0x52000000 | ((dwVQStartAddr & 0xFF000000) >> 24) |
                        ((dwVQEndAddr & 0xFF000000) >> 16);
        dwVQLen = 0x53000000 | (VIA_VQ_SIZE >> 3);

        VIASETREG(0x43c, 0x00fe0000);
        VIASETREG(0x440, 0x080003fe);
        VIASETREG(0x440, 0x0a00027c);
        VIASETREG(0x440, 0x0b000260);
        VIASETREG(0x440, 0x0c000274);
        VIASETREG(0x440, 0x0d000264);
        VIASETREG(0x440, 0x0e000000);
        VIASETREG(0x440, 0x0f000020);
        VIASETREG(0x440, 0x1000027e);
        VIASETREG(0x440, 0x110002fe);
        VIASETREG(0x440, 0x200f0060);

        VIASETREG(0x440, 0x00000006);
        VIASETREG(0x440, 0x40008c0f);
        VIASETREG(0x440, 0x44000000);
        VIASETREG(0x440, 0x45080c04);
        VIASETREG(0x440, 0x46800408);

        VIASETREG(0x440, dwVQStartEndH);
        VIASETREG(0x440, dwVQStartL);
        VIASETREG(0x440, dwVQEndL);
        VIASETREG(0x440, dwVQLen);
    }
    else {
        /* Diable VQ */
        VIASETREG(0x43c, 0x00fe0000);
        VIASETREG(0x440, 0x00000004);
        VIASETREG(0x440, 0x40008c0f);
        VIASETREG(0x440, 0x44000000);
        VIASETREG(0x440, 0x45080c04);
        VIASETREG(0x440, 0x46800408);
    }

    dwGEMode = 0;

    switch (ctx->bpp) {
    case 16:
        dwGEMode |= VIA_GEM_16bpp;
        break;
    case 32:
        dwGEMode |= VIA_GEM_32bpp;
        break;
    default:
        dwGEMode |= VIA_GEM_8bpp;
        break;
    }

#if 0
    switch (ctx->shared.virtualWidth) {
    case 800:
        dwGEMode |= VIA_GEM_800;
        break;
    case 1024:
        dwGEMode |= VIA_GEM_1024;
        break;
    case 1280:
        dwGEMode |= VIA_GEM_1280;
        break;
    case 1600:
        dwGEMode |= VIA_GEM_1600;
        break;
    case 2048:
        dwGEMode |= VIA_GEM_2048;
        break;
    default:
        dwGEMode |= VIA_GEM_640;
        break;
    }
#endif
    
    VIAEnableMMIO(ctx);

    /* Set BPP and Pitch */
    VIASETREG(VIA_REG_GEMODE, dwGEMode);

    /* Set Src and Dst base address and pitch, pitch is qword */
    VIASETREG(VIA_REG_SRCBASE, 0x0);
    VIASETREG(VIA_REG_DSTBASE, 0x0);
    VIASETREG(VIA_REG_PITCH, VIA_PITCH_ENABLE |
              ((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) |
              (((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) << 16));
}

static int b3DRegsInitialized = 0;

static void VIAInitialize3DEngine(DRIDriverContext *ctx)
{
    VIAPtr  pVia = VIAPTR(ctx);
    int i;

    if (!b3DRegsInitialized)
    {

        VIASETREG(0x43C, 0x00010000);

        for (i = 0; i <= 0x7D; i++)
        {
            VIASETREG(0x440, (u_int32_t) i << 24);
        }

        VIASETREG(0x43C, 0x00020000);

        for (i = 0; i <= 0x94; i++)
        {
            VIASETREG(0x440, (u_int32_t) i << 24);
        }

        VIASETREG(0x440, 0x82400000);

        VIASETREG(0x43C, 0x01020000);


        for (i = 0; i <= 0x94; i++)
        {
            VIASETREG(0x440, (u_int32_t) i << 24);
        }

        VIASETREG(0x440, 0x82400000);
        VIASETREG(0x43C, 0xfe020000);

        for (i = 0; i <= 0x03; i++)
        {
            VIASETREG(0x440, (u_int32_t) i << 24);
        }

        VIASETREG(0x43C, 0x00030000);

        for (i = 0; i <= 0xff; i++)
        {
            VIASETREG(0x440, 0);
        }
        VIASETREG(0x43C, 0x00100000);
        VIASETREG(0x440, 0x00333004);
        VIASETREG(0x440, 0x10000002);
        VIASETREG(0x440, 0x60000000);
        VIASETREG(0x440, 0x61000000);
        VIASETREG(0x440, 0x62000000);
        VIASETREG(0x440, 0x63000000);
        VIASETREG(0x440, 0x64000000);

        VIASETREG(0x43C, 0x00fe0000);

        if (pVia->ChipRev >= 3 )
            VIASETREG(0x440,0x40008c0f);
        else
            VIASETREG(0x440,0x4000800f);

        VIASETREG(0x440,0x44000000);
        VIASETREG(0x440,0x45080C04);
        VIASETREG(0x440,0x46800408);
        VIASETREG(0x440,0x50000000);
        VIASETREG(0x440,0x51000000);
        VIASETREG(0x440,0x52000000);
        VIASETREG(0x440,0x53000000);

        b3DRegsInitialized = 1;
        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                   "3D Engine has been initialized.\n");
    }

    VIASETREG(0x43C,0x00fe0000);
    VIASETREG(0x440,0x08000001);
    VIASETREG(0x440,0x0A000183);
    VIASETREG(0x440,0x0B00019F);
    VIASETREG(0x440,0x0C00018B);
    VIASETREG(0x440,0x0D00019B);
    VIASETREG(0x440,0x0E000000);
    VIASETREG(0x440,0x0F000000);
    VIASETREG(0x440,0x10000000);
    VIASETREG(0x440,0x11000000);
    VIASETREG(0x440,0x20000000);
}

static int
WaitIdleCLE266(VIAPtr pVia)
{
    int loop = 0;

    /*mem_barrier();*/

    while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && (loop++ < MAXLOOP))
        ;

    while ((VIAGETREG(VIA_REG_STATUS) &
          (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) &&
          (loop++ < MAXLOOP))
        ;

    return loop >= MAXLOOP;
}

static int viaInitFBDev(DRIDriverContext *ctx)
{
    VIAPtr pVia = CALLOC(sizeof(*pVia));

    ctx->driverPrivate = (void *)pVia;

    switch (ctx->chipset) {
    case PCI_CHIP_CLE3122:
    case PCI_CHIP_CLE3022:
        pVia->Chipset = VIA_CLE266;
        break;
    case PCI_CHIP_VT7205:
    case PCI_CHIP_VT3205:
        pVia->Chipset = VIA_KM400;
        break;
    case PCI_CHIP_VT3204:
    case PCI_CHIP_VT3344:
        pVia->Chipset = VIA_K8M800;
        break;
    case PCI_CHIP_VT3259:
        pVia->Chipset = VIA_PM800;
        break;
    default:
        xf86DrvMsg(0, X_ERROR, "VIA: Unknown device ID (0x%x)\n", ctx->chipset);
    }

    /* _SOLO TODO XXX need to read ChipRev too */
    pVia->ChipRev = 0;

    pVia->videoRambytes = ctx->shared.fbSize;
    pVia->MmioBase = ctx->MMIOStart;
    pVia->FrameBufferBase = ctx->FBStart & 0xfc000000;

    pVia->FBFreeStart = ctx->shared.virtualWidth * ctx->cpp *
        ctx->shared.virtualHeight;

#if 1
    /* Alloc a second framebuffer for the second head */
    pVia->FBFreeStart += ctx->shared.virtualWidth * ctx->cpp *
	ctx->shared.virtualHeight;
#endif

    pVia->VQStart = pVia->FBFreeStart;
    pVia->VQEnd = pVia->FBFreeStart + VIA_VQ_SIZE - 1;

    pVia->FBFreeStart += VIA_VQ_SIZE;

    pVia->FBFreeEnd = pVia->videoRambytes;

    if (!VIADRIScreenInit(ctx))
        return 0;

    return 1;
}

static void viaHaltFBDev(DRIDriverContext *ctx)
{
    drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
    drmClose(ctx->drmFD);

    if (ctx->driverPrivate) {
        free(ctx->driverPrivate);
        ctx->driverPrivate = 0;
    }
}

static int viaEngineShutdown(const DRIDriverContext *ctx)
{
    return 1;
}

static int viaEngineRestore(const DRIDriverContext *ctx)
{
    return 1;
}

const struct DRIDriverRec __driDriver =
{
    viaValidateMode,
    viaPostValidateMode,
    viaInitFBDev,
    viaHaltFBDev,
    viaEngineShutdown,
    viaEngineRestore,  
    0,
};