📄 i915_vtbl.c
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/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/#include "glheader.h"#include "mtypes.h"#include "imports.h"#include "macros.h"#include "colormac.h"#include "tnl/t_context.h"#include "tnl/t_vertex.h"#include "intel_batchbuffer.h"#include "intel_tex.h"#include "intel_regions.h"#include "i915_reg.h"#include "i915_context.h"#include "glapi.h"static voidi915_render_prevalidate(struct intel_context *intel){ struct i915_context *i915 = i915_context(&intel->ctx); if (!intel->Fallback) i915ValidateFragmentProgram(i915);}static voidi915_render_start(struct intel_context *intel){}static voidi915_reduced_primitive_state(struct intel_context *intel, GLenum rprim){ struct i915_context *i915 = i915_context(&intel->ctx); GLuint st1 = i915->state.Stipple[I915_STPREG_ST1]; st1 &= ~ST1_ENABLE; switch (rprim) { case GL_QUADS: /* from RASTERIZE(GL_QUADS) in t_dd_tritemp.h */ case GL_TRIANGLES: if (intel->ctx.Polygon.StippleFlag && intel->hw_stipple) st1 |= ST1_ENABLE; break; case GL_LINES: case GL_POINTS: default: break; } i915->intel.reduced_primitive = rprim; if (st1 != i915->state.Stipple[I915_STPREG_ST1]) { INTEL_FIREVERTICES(intel); I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE); i915->state.Stipple[I915_STPREG_ST1] = st1; }}/* Pull apart the vertex format registers and figure out how large a * vertex is supposed to be. */static GLbooleani915_check_vertex_size(struct intel_context *intel, GLuint expected){ struct i915_context *i915 = i915_context(&intel->ctx); int lis2 = i915->current->Ctx[I915_CTXREG_LIS2]; int lis4 = i915->current->Ctx[I915_CTXREG_LIS4]; int i, sz = 0; switch (lis4 & S4_VFMT_XYZW_MASK) { case S4_VFMT_XY: sz = 2; break; case S4_VFMT_XYZ: sz = 3; break; case S4_VFMT_XYW: sz = 3; break; case S4_VFMT_XYZW: sz = 4; break; default: fprintf(stderr, "no xyzw specified\n"); return 0; } if (lis4 & S4_VFMT_SPEC_FOG) sz++; if (lis4 & S4_VFMT_COLOR) sz++; if (lis4 & S4_VFMT_DEPTH_OFFSET) sz++; if (lis4 & S4_VFMT_POINT_WIDTH) sz++; if (lis4 & S4_VFMT_FOG_PARAM) sz++; for (i = 0; i < 8; i++) { switch (lis2 & S2_TEXCOORD_FMT0_MASK) { case TEXCOORDFMT_2D: sz += 2; break; case TEXCOORDFMT_3D: sz += 3; break; case TEXCOORDFMT_4D: sz += 4; break; case TEXCOORDFMT_1D: sz += 1; break; case TEXCOORDFMT_2D_16: sz += 1; break; case TEXCOORDFMT_4D_16: sz += 2; break; case TEXCOORDFMT_NOT_PRESENT: break; default: fprintf(stderr, "bad texcoord fmt %d\n", i); return GL_FALSE; } lis2 >>= S2_TEXCOORD_FMT1_SHIFT; } if (sz != expected) fprintf(stderr, "vertex size mismatch %d/%d\n", sz, expected); return sz == expected;}static voidi915_emit_invarient_state(struct intel_context *intel){ BATCH_LOCALS; BEGIN_BATCH(200, IGNORE_CLIPRECTS); OUT_BATCH(_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_Z_CMD); OUT_BATCH(0); /* Don't support texture crossbar yet */ OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); OUT_BATCH(_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); /* Need to initialize this to zero. */ OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0)); OUT_BATCH(0); /* XXX: Use this */ OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE); OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ OUT_BATCH(0); /* Don't support twosided stencil yet */ OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); OUT_BATCH(0); ADVANCE_BATCH();}#define emit(intel, state, size ) \ intel_batchbuffer_data(intel->batch, state, size, IGNORE_CLIPRECTS )static GLuintget_dirty(struct i915_hw_state *state){ GLuint dirty; /* Workaround the multitex hang - if one texture unit state is * modified, emit all texture units. */ dirty = state->active & ~state->emitted; if (dirty & I915_UPLOAD_TEX_ALL) state->emitted &= ~I915_UPLOAD_TEX_ALL; dirty = state->active & ~state->emitted; return dirty;}static GLuintget_state_size(struct i915_hw_state *state){ GLuint dirty = get_dirty(state); GLuint i; GLuint sz = 0; if (dirty & I915_UPLOAD_INVARIENT) sz += 30 * 4; if (dirty & I915_UPLOAD_CTX) sz += sizeof(state->Ctx); if (dirty & I915_UPLOAD_BUFFERS) sz += sizeof(state->Buffer); if (dirty & I915_UPLOAD_STIPPLE) sz += sizeof(state->Stipple); if (dirty & I915_UPLOAD_FOG) sz += sizeof(state->Fog); if (dirty & I915_UPLOAD_TEX_ALL) { int nr = 0; for (i = 0; i < I915_TEX_UNITS; i++) if (dirty & I915_UPLOAD_TEX(i)) nr++; sz += (2 + nr * 3) * sizeof(GLuint) * 2; } if (dirty & I915_UPLOAD_CONSTANTS) sz += state->ConstantSize * sizeof(GLuint); if (dirty & I915_UPLOAD_PROGRAM) sz += state->ProgramSize * sizeof(GLuint); return sz;}/* Push the state into the sarea and/or texture memory. */static voidi915_emit_state(struct intel_context *intel){ struct i915_context *i915 = i915_context(&intel->ctx); struct i915_hw_state *state = i915->current; int i; int ret, count; GLuint dirty; GET_CURRENT_CONTEXT(ctx); BATCH_LOCALS; /* We don't hold the lock at this point, so want to make sure that * there won't be a buffer wrap between the state emits and the primitive * emit header. * * It might be better to talk about explicit places where * scheduling is allowed, rather than assume that it is whenever a * batchbuffer fills up. * * Set the space as LOOP_CLIPRECTS now, since that's what our primitives * will be emitted under. */ intel_batchbuffer_require_space(intel->batch, get_state_size(state) + 8, LOOP_CLIPRECTS);
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