📄 r200_reg.h
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/*Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.The Weather Channel (TM) funded Tungsten Graphics to develop theinitial release of the Radeon 8500 driver under the XFree86 license.This notice must be preserved.Permission is hereby granted, free of charge, to any person obtaininga copy of this software and associated documentation files (the"Software"), to deal in the Software without restriction, includingwithout limitation the rights to use, copy, modify, merge, publish,distribute, sublicense, and/or sell copies of the Software, and topermit persons to whom the Software is furnished to do so, subject tothe following conditions:The above copyright notice and this permission notice (including thenext paragraph) shall be included in all copies or substantialportions of the Software.THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OFMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BELIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTIONOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTIONWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.*/#ifndef _R200_REG_H_#define _R200_REG_H_#define R200_PP_MISC 0x1c14 #define R200_REF_ALPHA_MASK 0x000000ff#define R200_ALPHA_TEST_FAIL (0 << 8)#define R200_ALPHA_TEST_LESS (1 << 8)#define R200_ALPHA_TEST_LEQUAL (2 << 8)#define R200_ALPHA_TEST_EQUAL (3 << 8)#define R200_ALPHA_TEST_GEQUAL (4 << 8)#define R200_ALPHA_TEST_GREATER (5 << 8)#define R200_ALPHA_TEST_NEQUAL (6 << 8)#define R200_ALPHA_TEST_PASS (7 << 8)#define R200_ALPHA_TEST_OP_MASK (7 << 8)#define R200_CHROMA_FUNC_FAIL (0 << 16)#define R200_CHROMA_FUNC_PASS (1 << 16)#define R200_CHROMA_FUNC_NEQUAL (2 << 16)#define R200_CHROMA_FUNC_EQUAL (3 << 16)#define R200_CHROMA_KEY_NEAREST (0 << 18)#define R200_CHROMA_KEY_ZERO (1 << 18)#define R200_RIGHT_HAND_CUBE_D3D (0 << 24)#define R200_RIGHT_HAND_CUBE_OGL (1 << 24)#define R200_PP_FOG_COLOR 0x1c18 #define R200_FOG_COLOR_MASK 0x00ffffff#define R200_FOG_VERTEX (0 << 24)#define R200_FOG_TABLE (1 << 24)#define R200_FOG_USE_DEPTH (0 << 25)#define R200_FOG_USE_W (1 << 25)#define R200_FOG_USE_DIFFUSE_ALPHA (2 << 25)#define R200_FOG_USE_SPEC_ALPHA (3 << 25)#define R200_FOG_USE_VTX_FOG (4 << 25)#define R200_FOG_USE_MASK (7 << 25)#define R200_RE_SOLID_COLOR 0x1c1c #define R200_RB3D_BLENDCNTL 0x1c20#define R200_COMB_FCN_MASK (7 << 12)#define R200_COMB_FCN_ADD_CLAMP (0 << 12)#define R200_COMB_FCN_ADD_NOCLAMP (1 << 12)#define R200_COMB_FCN_SUB_CLAMP (2 << 12)#define R200_COMB_FCN_SUB_NOCLAMP (3 << 12)#define R200_COMB_FCN_MIN (4 << 12)#define R200_COMB_FCN_MAX (5 << 12)#define R200_COMB_FCN_RSUB_CLAMP (6 << 12)#define R200_COMB_FCN_RSUB_NOCLAMP (7 << 12)#define R200_BLEND_GL_ZERO (32)#define R200_BLEND_GL_ONE (33)#define R200_BLEND_GL_SRC_COLOR (34)#define R200_BLEND_GL_ONE_MINUS_SRC_COLOR (35)#define R200_BLEND_GL_DST_COLOR (36)#define R200_BLEND_GL_ONE_MINUS_DST_COLOR (37)#define R200_BLEND_GL_SRC_ALPHA (38)#define R200_BLEND_GL_ONE_MINUS_SRC_ALPHA (39)#define R200_BLEND_GL_DST_ALPHA (40)#define R200_BLEND_GL_ONE_MINUS_DST_ALPHA (41)#define R200_BLEND_GL_SRC_ALPHA_SATURATE (42) /* src factor only */#define R200_BLEND_GL_CONST_COLOR (43)#define R200_BLEND_GL_ONE_MINUS_CONST_COLOR (44)#define R200_BLEND_GL_CONST_ALPHA (45)#define R200_BLEND_GL_ONE_MINUS_CONST_ALPHA (46)#define R200_BLEND_MASK (63)#define R200_SRC_BLEND_SHIFT (16)#define R200_DST_BLEND_SHIFT (24)#define R200_RB3D_DEPTHOFFSET 0x1c24#define R200_RB3D_DEPTHPITCH 0x1c28#define R200_DEPTHPITCH_MASK 0x00001ff8#define R200_DEPTH_HYPERZ (3 << 16)#define R200_DEPTH_ENDIAN_NO_SWAP (0 << 18)#define R200_DEPTH_ENDIAN_WORD_SWAP (1 << 18)#define R200_DEPTH_ENDIAN_DWORD_SWAP (2 << 18)#define R200_RB3D_ZSTENCILCNTL 0x1c2c #define R200_DEPTH_FORMAT_MASK (0xf << 0)#define R200_DEPTH_FORMAT_16BIT_INT_Z (0 << 0)#define R200_DEPTH_FORMAT_24BIT_INT_Z (2 << 0)#define R200_DEPTH_FORMAT_24BIT_FLOAT_Z (3 << 0)#define R200_DEPTH_FORMAT_32BIT_INT_Z (4 << 0)#define R200_DEPTH_FORMAT_32BIT_FLOAT_Z (5 << 0)#define R200_DEPTH_FORMAT_24BIT_FLOAT_W (9 << 0)#define R200_DEPTH_FORMAT_32BIT_FLOAT_W (11 << 0)#define R200_Z_TEST_NEVER (0 << 4)#define R200_Z_TEST_LESS (1 << 4)#define R200_Z_TEST_LEQUAL (2 << 4)#define R200_Z_TEST_EQUAL (3 << 4)#define R200_Z_TEST_GEQUAL (4 << 4)#define R200_Z_TEST_GREATER (5 << 4)#define R200_Z_TEST_NEQUAL (6 << 4)#define R200_Z_TEST_ALWAYS (7 << 4)#define R200_Z_TEST_MASK (7 << 4)#define R200_Z_HIERARCHY_ENABLE (1 << 8)#define R200_STENCIL_TEST_NEVER (0 << 12)#define R200_STENCIL_TEST_LESS (1 << 12)#define R200_STENCIL_TEST_LEQUAL (2 << 12)#define R200_STENCIL_TEST_EQUAL (3 << 12)#define R200_STENCIL_TEST_GEQUAL (4 << 12)#define R200_STENCIL_TEST_GREATER (5 << 12)#define R200_STENCIL_TEST_NEQUAL (6 << 12)#define R200_STENCIL_TEST_ALWAYS (7 << 12)#define R200_STENCIL_TEST_MASK (0x7 << 12)#define R200_STENCIL_FAIL_KEEP (0 << 16)#define R200_STENCIL_FAIL_ZERO (1 << 16)#define R200_STENCIL_FAIL_REPLACE (2 << 16)#define R200_STENCIL_FAIL_INC (3 << 16)#define R200_STENCIL_FAIL_DEC (4 << 16)#define R200_STENCIL_FAIL_INVERT (5 << 16)#define R200_STENCIL_FAIL_INC_WRAP (6 << 16)#define R200_STENCIL_FAIL_DEC_WRAP (7 << 16)#define R200_STENCIL_FAIL_MASK (0x7 << 16)#define R200_STENCIL_ZPASS_KEEP (0 << 20)#define R200_STENCIL_ZPASS_ZERO (1 << 20)#define R200_STENCIL_ZPASS_REPLACE (2 << 20)#define R200_STENCIL_ZPASS_INC (3 << 20)#define R200_STENCIL_ZPASS_DEC (4 << 20)#define R200_STENCIL_ZPASS_INVERT (5 << 20)#define R200_STENCIL_ZPASS_INC_WRAP (6 << 20)#define R200_STENCIL_ZPASS_DEC_WRAP (7 << 20)#define R200_STENCIL_ZPASS_MASK (0x7 << 20)#define R200_STENCIL_ZFAIL_KEEP (0 << 24)#define R200_STENCIL_ZFAIL_ZERO (1 << 24)#define R200_STENCIL_ZFAIL_REPLACE (2 << 24)#define R200_STENCIL_ZFAIL_INC (3 << 24)#define R200_STENCIL_ZFAIL_DEC (4 << 24)#define R200_STENCIL_ZFAIL_INVERT (5 << 24)#define R200_STENCIL_ZFAIL_INC_WRAP (6 << 24)#define R200_STENCIL_ZFAIL_DEC_WRAP (7 << 24)#define R200_STENCIL_ZFAIL_MASK (0x7 << 24)#define R200_Z_COMPRESSION_ENABLE (1 << 28)#define R200_FORCE_Z_DIRTY (1 << 29)#define R200_Z_WRITE_ENABLE (1 << 30)#define R200_Z_DECOMPRESSION_ENABLE (1 << 31)/*gap*/#define R200_PP_CNTL 0x1c38 #define R200_TEX_0_ENABLE 0x00000010#define R200_TEX_1_ENABLE 0x00000020#define R200_TEX_2_ENABLE 0x00000040#define R200_TEX_3_ENABLE 0x00000080#define R200_TEX_4_ENABLE 0x00000100#define R200_TEX_5_ENABLE 0x00000200#define R200_TEX_ENABLE_MASK 0x000003f0#define R200_FILTER_ROUND_MODE_MASK 0x00000400#define R200_TEX_BLEND_7_ENABLE 0x00000800#define R200_TEX_BLEND_0_ENABLE 0x00001000#define R200_TEX_BLEND_1_ENABLE 0x00002000#define R200_TEX_BLEND_2_ENABLE 0x00004000#define R200_TEX_BLEND_3_ENABLE 0x00008000#define R200_TEX_BLEND_4_ENABLE 0x00010000#define R200_TEX_BLEND_5_ENABLE 0x00020000#define R200_TEX_BLEND_6_ENABLE 0x00040000#define R200_TEX_BLEND_ENABLE_MASK 0x0007f800#define R200_TEX_BLEND_0_ENABLE_SHIFT (12)#define R200_MULTI_PASS_ENABLE 0x00080000#define R200_SPECULAR_ENABLE 0x00200000#define R200_FOG_ENABLE 0x00400000#define R200_ALPHA_TEST_ENABLE 0x00800000#define R200_ANTI_ALIAS_NONE 0x00000000#define R200_ANTI_ALIAS_LINE 0x01000000#define R200_ANTI_ALIAS_POLY 0x02000000#define R200_ANTI_ALIAS_MASK 0x03000000#define R200_RB3D_CNTL 0x1c3c #define R200_ALPHA_BLEND_ENABLE (1 << 0)#define R200_PLANE_MASK_ENABLE (1 << 1)#define R200_DITHER_ENABLE (1 << 2)#define R200_ROUND_ENABLE (1 << 3)#define R200_SCALE_DITHER_ENABLE (1 << 4)#define R200_DITHER_INIT (1 << 5)#define R200_ROP_ENABLE (1 << 6)#define R200_STENCIL_ENABLE (1 << 7)#define R200_Z_ENABLE (1 << 8)#define R200_DEPTH_XZ_OFFEST_ENABLE (1 << 9)#define R200_COLOR_FORMAT_ARGB1555 (3 << 10)#define R200_COLOR_FORMAT_RGB565 (4 << 10)#define R200_COLOR_FORMAT_ARGB8888 (6 << 10)#define R200_COLOR_FORMAT_RGB332 (7 << 10)#define R200_COLOR_FORMAT_Y8 (8 << 10)#define R200_COLOR_FORMAT_RGB8 (9 << 10)#define R200_COLOR_FORMAT_YUV422_VYUY (11 << 10)#define R200_COLOR_FORMAT_YUV422_YVYU (12 << 10)#define R200_COLOR_FORMAT_aYUV444 (14 << 10)#define R200_COLOR_FORMAT_ARGB4444 (15 << 10)#define R200_CLRCMP_FLIP_ENABLE (1 << 14)#define R200_SEPARATE_ALPHA_ENABLE (1 << 16)#define R200_RB3D_COLOROFFSET 0x1c40 #define R200_COLOROFFSET_MASK 0xfffffff0#define R200_RE_WIDTH_HEIGHT 0x1c44 #define R200_RE_WIDTH_SHIFT 0#define R200_RE_HEIGHT_SHIFT 16#define R200_RB3D_COLORPITCH 0x1c48 #define R200_COLORPITCH_MASK 0x000001ff8#define R200_COLOR_TILE_ENABLE (1 << 16)#define R200_COLOR_MICROTILE_ENABLE (1 << 17)#define R200_COLOR_ENDIAN_NO_SWAP (0 << 18)#define R200_COLOR_ENDIAN_WORD_SWAP (1 << 18)#define R200_COLOR_ENDIAN_DWORD_SWAP (2 << 18)#define R200_SE_CNTL 0x1c4c #define R200_FFACE_CULL_CW (0 << 0)#define R200_FFACE_CULL_CCW (1 << 0)#define R200_FFACE_CULL_DIR_MASK (1 << 0)#define R200_BFACE_CULL (0 << 1)#define R200_BFACE_SOLID (3 << 1)#define R200_FFACE_CULL (0 << 3)#define R200_FFACE_SOLID (3 << 3)#define R200_FFACE_CULL_MASK (3 << 3)#define R200_FLAT_SHADE_VTX_0 (0 << 6)#define R200_FLAT_SHADE_VTX_1 (1 << 6)#define R200_FLAT_SHADE_VTX_2 (2 << 6)#define R200_FLAT_SHADE_VTX_LAST (3 << 6)#define R200_DIFFUSE_SHADE_SOLID (0 << 8)#define R200_DIFFUSE_SHADE_FLAT (1 << 8)#define R200_DIFFUSE_SHADE_GOURAUD (2 << 8)#define R200_DIFFUSE_SHADE_MASK (3 << 8)#define R200_ALPHA_SHADE_SOLID (0 << 10)#define R200_ALPHA_SHADE_FLAT (1 << 10)#define R200_ALPHA_SHADE_GOURAUD (2 << 10)#define R200_ALPHA_SHADE_MASK (3 << 10)#define R200_SPECULAR_SHADE_SOLID (0 << 12)#define R200_SPECULAR_SHADE_FLAT (1 << 12)#define R200_SPECULAR_SHADE_GOURAUD (2 << 12)#define R200_SPECULAR_SHADE_MASK (3 << 12)#define R200_FOG_SHADE_SOLID (0 << 14)#define R200_FOG_SHADE_FLAT (1 << 14)⌨️ 快捷键说明
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