hdpdeps.ref

来自「verilog 语言去产生可以调节占空比的pwm波形 去控制信号管的开通和关断」· REF 代码 · 共 8 行

V3 7
FL $XILINX/verilog/src/glbl.v 2006/12/02.07:44:50 J.30
MO work/glbl FL $XILINX/verilog/src/glbl.v
FL $XILINX/work/PWM/a.tfw 2008/12/05.16:04:26 J.30
MO work/a FL $XILINX/work/PWM/a.tfw MI pwm
FL $XILINX/work/PWM/PWM.v 2008/12/04.18:58:29 J.30
MO work/pwm FL $XILINX/work/PWM/PWM.v