📄 periph.lst
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C51 COMPILER V8.02 PERIPH 11/30/2008 11:59:27 PAGE 1
C51 COMPILER V8.02, COMPILATION OF MODULE PERIPH
OBJECT MODULE PLACED IN periph.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE periph.c BROWSE DEBUG OBJECTEXTEND
line level source
1 #pragma NOIV // Do not generate interrupt vectors
2 //-----------------------------------------------------------------------------
3 // File: periph.c
4 // Contents: Hooks required to implement USB peripheral function.
5 //
6 // Copyright (c) 1997 AnchorChips, Inc. All rights reserved
7 //-----------------------------------------------------------------------------
8 #include "fx2.h"
9 #include "fx2regs.h"
10 #include "fx2sdly.h"
11 #include "io.h"
12 #include "gpif.h"
13 #include "serial.h"
14
15 extern BOOL GotSUD; // Received setup data flag
16 extern BOOL Sleep;
17 extern BOOL Rwuen;
18 extern BOOL Selfpwr;
19
20 BYTE Configuration; // Current configuration
21 BYTE AlternateSetting; // Alternate settings
22 BYTE GpifHighAddr; //gpif high addr
23 BYTE GpifReadWriteFlag; //gpif read write flag
24 BYTE GpifFinishFlag;
25 BYTE High_Full_Flag;
26 //-----------------------------------------------------------------------------
27 // Task Dispatcher hooks
28 // The following hooks are called by the task dispatcher.
29 //-----------------------------------------------------------------------------
30
31 void TD_Init(void) // Called once at startup
32 {
33 1 BREAKPT &= ~bmBPEN; // to see BKPT LED go out TGE
34 1 Rwuen = TRUE; // Enable remote-wakeup
35 1 GpifInit();
36 1
37 1 // EP2 512 BULK OUT 4x
38 1 SYNCDELAY; // see TRM section 15.14
39 1 EP2CFG = 0xA0; //512PACKET; // BUF[1:0]=00 for 4x buffering
40 1
41 1 // EP4 and EP6 and EP8 are not used in this implementation...
42 1 SYNCDELAY; //
43 1 EP4CFG = 0x20; // clear valid bit
44 1 SYNCDELAY; //
45 1 EP6CFG = 0xE0; // clear valid bit
46 1 SYNCDELAY; //
47 1 EP8CFG = 0x60; // clear valid bit
48 1
49 1 SYNCDELAY; //
50 1 FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
51 1 SYNCDELAY; //
52 1 FIFORESET = 0x02; // reset, FIFO 2
53 1 SYNCDELAY; //
54 1 FIFORESET = 0x04; // reset, FIFO 4
55 1 SYNCDELAY; //
C51 COMPILER V8.02 PERIPH 11/30/2008 11:59:27 PAGE 2
56 1 FIFORESET = 0x06; // reset, FIFO 6
57 1 SYNCDELAY; //
58 1 FIFORESET = 0x08; // reset, FIFO 8
59 1 SYNCDELAY; //
60 1 FIFORESET = 0x00; // deactivate NAK-ALL
61 1 SYNCDELAY;
62 1
63 1 // 8-bit bus (WORDWIDE=1)...
64 1 EP2FIFOCFG = 0x10;//AUTO OUT 8-BIT BUS
65 1 SYNCDELAY;
66 1 EP6FIFOCFG = 0x08;//AUTO IN 8-BIT BUS
67 1 SYNCDELAY;
68 1
69 1 // setup INT4 as internal source for GPIF interrupts
70 1 // using INT4CLR (SFR), automatically enabled
71 1 SYNCDELAY;
72 1 INTSETUP |= 0x03; // Enable INT4 FIFO/GPIF Autovectoring
73 1 SYNCDELAY; // used here as "delay"
74 1 EXIF &= ~0x40; // just in case one was pending...
75 1 SYNCDELAY; // used here as "delay"
76 1 GPIFIRQ = 0x03;
77 1 SYNCDELAY; //
78 1 GPIFIE = 0x03; // Enable GPIFDONE interrupt
79 1 SYNCDELAY; //
80 1 EIE |= 0x04; // Enable INT4 ISR, EIE.2(EIEX4=1)
81 1
82 1 GpifReadWriteFlag = 0; //write
83 1 GpifHighAddr = 0;
84 1 *GA = GpifHighAddr;
85 1 Peripheral_SetAddress(0);
86 1 Peripheral_SetEP2GPIFTC(512); //transfer 512 byte data to gipf
87 1 Peripheral_FIFOWrite(0); //ep2 fifo write
88 1 GpifFinishFlag = 0;
89 1 High_Full_Flag = 0;
90 1 }
91
92 void TD_Poll(void) // Called repeatedly while the device is idle
93 {
94 1 if(GpifFinishFlag == 1)
95 1 {
96 2 GpifFinishFlag = 0;
97 2 GpifHighAddr++;
98 2 GpifHighAddr&=0x3F;
99 2 *GA = GpifHighAddr;
100 2 if(GpifHighAddr == 0)
101 2 {
102 3 GpifReadWriteFlag = (~GpifReadWriteFlag)&1;
103 3 }
104 2 if(GpifReadWriteFlag == 0)
105 2 {
106 3 Peripheral_SetAddress(0);
107 3 Peripheral_SetEP2GPIFTC(512); //write 512 byte data to gipf
108 3 Peripheral_FIFOWrite(0);
109 3 }
110 2 else
111 2 {
112 3 Peripheral_SetAddress(0);
113 3 Peripheral_SetEP6GPIFTC(512); //read 512 byte data from gipf
114 3 Peripheral_FIFORead(2);
115 3 }
116 2 }
117 1 }
C51 COMPILER V8.02 PERIPH 11/30/2008 11:59:27 PAGE 3
118
119 BOOL TD_Suspend(void) // Called before the device goes into suspend mode
120 {
121 1 return(TRUE);
122 1 }
123
124 BOOL TD_Resume(void) // Called after the device resumes
125 {
126 1 return(TRUE);
127 1 }
128
129 //-----------------------------------------------------------------------------
130 // Device Request hooks
131 // The following hooks are called by the end point 0 device request parser.
132 //-----------------------------------------------------------------------------
133
134 BOOL DR_GetDescriptor(void)
135 {
136 1 return(TRUE);
137 1 }
138
139 BOOL DR_SetConfiguration(void) // Called when a Set Configuration command is received
140 {
141 1 Configuration = SETUPDAT[2];
142 1 if(High_Full_Flag == 1)
143 1 {
144 2 SYNCDELAY; //
145 2 EP2AUTOINLENH = 0x02; //ep2 auto commit length 512
146 2 SYNCDELAY;
147 2 EP2AUTOINLENL = 0x00;
148 2 SYNCDELAY;
149 2 EP6AUTOINLENH = 0x02; //ep6 auto commit length 512
150 2 SYNCDELAY;
151 2 EP6AUTOINLENL = 0x00;
152 2 SYNCDELAY;
153 2 }
154 1 else
155 1 {
156 2 SYNCDELAY; //
157 2 EP2AUTOINLENH = 0x00; //ep2 auto commit length 512
158 2 SYNCDELAY;
159 2 EP2AUTOINLENL = 0x40;
160 2 SYNCDELAY;
161 2 EP6AUTOINLENH = 0x00; //ep6 auto commit length 512
162 2 SYNCDELAY;
163 2 EP6AUTOINLENL = 0x40;
164 2 SYNCDELAY;
165 2 }
166 1 return(TRUE); // Handled by user code
167 1 }
168
169 BOOL DR_GetConfiguration(void) // Called when a Get Configuration command is received
170 {
171 1 EP0BUF[0] = Configuration;
172 1 EP0BCH = 0;
173 1 EP0BCL = 1;
174 1 return(TRUE); // Handled by user code
175 1 }
176
177 BOOL DR_SetInterface(void) // Called when a Set Interface command is received
178 {
179 1 AlternateSetting = SETUPDAT[2];
C51 COMPILER V8.02 PERIPH 11/30/2008 11:59:27 PAGE 4
180 1 return(TRUE); // Handled by user code
181 1 }
182
183 BOOL DR_GetInterface(void) // Called when a Set Interface command is received
184 {
185 1 EP0BUF[0] = AlternateSetting;
186 1 EP0BCH = 0;
187 1 EP0BCL = 1;
188 1 return(TRUE); // Handled by user code
189 1 }
190
191 BOOL DR_GetStatus(void)
192 {
193 1 return(TRUE);
194 1 }
195
196 BOOL DR_ClearFeature(void)
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