d_024.mdl

基于PSAT 软件的多目标最优潮流计算用于中小型电力系统的分析和管理

Model {
  Name			  "d_024"
  Version		  6.2
  SaveDefaultBlockParams  on
  SampleTimeColors	  off
  LibraryLinkDisplay	  "none"
  WideLines		  off
  ShowLineDimensions	  off
  ShowPortDataTypes	  off
  ShowLoopsOnError	  on
  IgnoreBidirectionalLines off
  ShowStorageClass	  off
  SortedOrder		  off
  RecordCoverage	  off
  CovPath		  "/"
  CovSaveName		  "covdata"
  CovMetricSettings	  "dw"
  CovNameIncrementing	  off
  CovHtmlReporting	  on
  covSaveCumulativeToWorkspaceVar on
  CovSaveSingleToWorkspaceVar on
  CovCumulativeVarName	  "covCumulativeData"
  CovCumulativeReport	  off
  DataTypeOverride	  "UseLocalSettings"
  MinMaxOverflowLogging	  "UseLocalSettings"
  MinMaxOverflowArchiveMode "Overwrite"
  BlockNameDataTip	  off
  BlockParametersDataTip  off
  BlockDescriptionStringDataTip	off
  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks off
  BrowserLookUnderMasks	  off
  Created		  "Tue Nov 18 12:34:54 2003"
  Creator		  "fmilano"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "fmilano"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Fri Mar 31 19:33:53 2006"
  ModelVersionFormat	  "1.%<AutoIncrement:131>"
  ConfigurationManager	  "None"
  LinearizationMsg	  "none"
  Profile		  off
  ParamWorkspaceSource	  "MATLABWorkspace"
  AccelSystemTargetFile	  "accel.tlc"
  AccelTemplateMakefile	  "accel_default_tmf"
  AccelMakeCommand	  "make_rtw"
  TryForcingSFcnDF	  off
  ExtModeBatchMode	  off
  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "normal"
  ExtModeTrigPort	  "1"
  ExtModeTrigElement	  "any"
  ExtModeTrigDuration	  1000
  ExtModeTrigHoldOff	  0
  ExtModeTrigDelay	  0
  ExtModeTrigDirection	  "rising"
  ExtModeTrigLevel	  0
  ExtModeArchiveMode	  "off"
  ExtModeAutoIncOneShot	  off
  ExtModeIncDirWhenArm	  off
  ExtModeAddSuffixToVar	  off
  ExtModeWriteAllDataToWs off
  ExtModeArmWhenConnect	  on
  ExtModeSkipDownloadWhenConnect off
  ExtModeLogAll		  on
  ExtModeAutoUpdateStatusClock off
  BufferReuse		  on
  Solver		  "ode45"
  SolverMode		  "Auto"
  StartTime		  "0.0"
  StopTime		  "10.0"
  MaxOrder		  5
  MaxStep		  "auto"
  MinStep		  "auto"
  MaxNumMinSteps	  "-1"
  InitialStep		  "auto"
  FixedStep		  "auto"
  RelTol		  "1e-3"
  AbsTol		  "auto"
  OutputOption		  "RefineOutputTimes"
  OutputTimes		  "[]"
  Refine		  "1"
  LoadExternalInput	  off
  ExternalInput		  "[t, u]"
  LoadInitialState	  off
  InitialState		  "xInitial"
  SaveTime		  on
  TimeSaveName		  "tout"
  SaveState		  off
  StateSaveName		  "xout"
  SaveOutput		  on
  OutputSaveName	  "yout"
  SaveFinalState	  off
  FinalStateName	  "xFinal"
  SaveFormat		  "Array"
  Decimation		  "1"
  LimitDataPoints	  on
  MaxDataPoints		  "1000"
  SignalLoggingName	  "logsout"
  ConsistencyChecking	  "none"
  ArrayBoundsChecking	  "none"
  AlgebraicLoopMsg	  "warning"
  BlockPriorityViolationMsg "warning"
  MinStepSizeMsg	  "warning"
  InheritedTsInSrcMsg	  "warning"
  DiscreteInheritContinuousMsg "warning"
  MultiTaskRateTransMsg	  "error"
  SingleTaskRateTransMsg  "none"
  CheckForMatrixSingularity "none"
  IntegerOverflowMsg	  "warning"
  Int32ToFloatConvMsg	  "warning"
  ParameterDowncastMsg	  "error"
  ParameterOverflowMsg	  "error"
  ParameterPrecisionLossMsg "warning"
  UnderSpecifiedDataTypeMsg "none"
  UnnecessaryDatatypeConvMsg "none"
  VectorMatrixConversionMsg "none"
  InvalidFcnCallConnMsg	  "error"
  SignalLabelMismatchMsg  "none"
  UnconnectedInputMsg	  "warning"
  UnconnectedOutputMsg	  "warning"
  UnconnectedLineMsg	  "warning"
  SfunCompatibilityCheckMsg "none"
  RTWInlineParameters	  off
  BlockReductionOpt	  on
  BooleanDataType	  on
  ConditionallyExecuteInputs on
  ParameterPooling	  on
  OptimizeBlockIOStorage  on
  AssertionControl	  "UseLocalSettings"
  ProdHWDeviceType	  "Microprocessor"
  ProdHWWordLengths	  "8,16,32,32"
  RTWSystemTargetFile	  "grt.tlc"
  RTWTemplateMakefile	  "grt_default_tmf"
  RTWMakeCommand	  "make_rtw"
  RTWGenerateCodeOnly	  off
  RTWRetainRTWFile	  off
  TLCProfiler		  off
  TLCDebug		  off
  TLCCoverage		  off
  TLCAssertion		  off
  RTWOptions		  "-aEnforceIntegerDowncast=1 -aFoldNonRolledExpr=1 -a"
"InlineInvariantSignals=1 -aInlineParameters=0 -aLocalBlockOutputs=1 -aRollThr"
"eshold=5 -aGenerateReport=0 -aGenCodeOnly=0 -aRTWVerbose=1 -aIncludeHyperlink"
"InReport=0 -aLaunchReport=0 -aForceParamTrailComments=0 -aGenerateComments=1 "
"-aIgnoreCustomStorageClasses=1 -aIncHierarchyInIds=0 -aMaxRTWIdLen=31 -aShowE"
"liminatedStatements=0 -aPrefixModelToSubsysFcnNames=1 -aIncDataTypeInIds=0 -a"
"InsertBlockDesc=0 -aSimulinkBlockComments=1 -aInlinedPrmAccess=\"Literals\"  "
"-aSuppressErrorStatus=0 -aModelReferenceCompliant=1 -aSupportNonInlinedSFcns="
"1 -aSupportContinuousTime=1 -aSupportComplex=1 -aSupportNonFinite=1 -aSupport"
"AbsoluteTime=1 -aTargetPreCompLibLocation=\"\" -aTargetLibSuffix=\"\" -aTarge"
"tFcnLib=\"ansi_tfl_tmw.mat\" -aMultiInstanceERTCode=0 -aLogVarNameModifier=\""
"rt_\" -aIsPILTarget=0 -aCombineOutputUpdateFcns=0 -aGenerateASAP2=0 -aGenerat"
"eSampleERTMain=0 -aGenerateFullHeader=1 -aUtilityFuncGeneration=\"Auto\" -aIn"
"cludeFileDelimiter=\"Auto\" -aIncludeMdlTerminateFcn=1 -aPurelyIntegerCode=0 "
"-aERTCustomFileBanners=0 -aRTWCAPIStates=0 -aRTWCAPIParams=0 -aRTWCAPISignals"
"=0 -aMatFileLogging=1 -aGenFloatMathFcnCalls=\"ANSI_C\" -aExtModeMexFile=\"ex"
"t_comm\" -aExtModeTransport=0 -aExtModeStaticAllocSize=1000000 -aExtModeTesti"
"ng=0 -aExtModeStaticAlloc=0 -aExtMode=0  -aInitFltsAndDblsToZero=1 -aInitFlts"
"AndDblsToZero=1 "
  SimulationMode	  "normal"
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      PMComponent
      SubClassName	      "unknown"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "tp335251"
    Location		    [359, 5, 996, 826]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "portrait"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    ZoomFactor		    "64"
    ReportName		    "simulink-default.rpt"
    Block {

      BlockType		      Reference
      Name		      "A01"
      Tag		      "PSATblock"
      Description	      "Power Flow"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [330, 1104, 400, 1116]
      ShowName		      off
	SourceBlock	"fm_lib/Power Flow/Line1"
      SourceType	      "Line"
      PhysicalDomain	      "psatdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__newl0"
      RConnTagsString	      "__newr0"
      p3_4_5q		      "[100  138  60]"
      p6q		      "0"
      p8q		      "0.0026"
      p9q		      "0.0139"
      p10q		      "0.4611"
      p13_14_15q	      "[1.93  0.0  2.00]"
    }
    Block {

      BlockType		      Reference
      Name		      "A02"
      Tag		      "PSATblock"
      Description	      "Power Flow"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [160, 960, 170, 1015]
      Orientation	      "up"
      NamePlacement	      "alternate"
      ShowName		      off
	SourceBlock	"fm_lib/Power Flow/Line"
      SourceType	      "Line"
      PhysicalDomain	      "psatdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__newl0"
      RConnTagsString	      "__newr0"
      p3_4_5q		      "[100  138  60]"
      p6q		      "0"
      p8q		      "0.0546"
      p9q		      "0.2112"
      p10q		      "0.0572"
      p13_14_15q	      "[2.08  0.0  2.20]"
    }
    Block {

      BlockType		      Reference
      Name		      "A03"
      Tag		      "PSATblock"
      Description	      "Power Flow"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [395, 1025, 455, 1035]
      ShowName		      off
	SourceBlock	"fm_lib/Power Flow/Line"
      SourceType	      "Line"
      PhysicalDomain	      "psatdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__newl0"
      RConnTagsString	      "__newr0"
      p3_4_5q		      "[100  138  60]"
      p6q		      "0"
      p8q		      "0.0218"
      p9q		      "0.0845"
      p10q		      "0.0229"
      p13_14_15q	      "[2.08  0.0  2.20]"
    }
    Block {

      BlockType		      Reference
      Name		      "A04"
      Tag		      "PSATblock"
      Description	      "Power Flow"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [375, 960, 435, 970]
      Orientation	      "left"
      ShowName		      off
	SourceBlock	"fm_lib/Power Flow/Line"
      SourceType	      "Line"
      PhysicalDomain	      "psatdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__newl0"
      RConnTagsString	      "__newr0"
      p3_4_5q		      "[100  138  60]"
      p6q		      "0"
      p8q		      "0.0328"
      p9q		      "0.1267"
      p10q		      "0.0343"
      p13_14_15q	      "[2.08  0.0  2.20]"
    }
    Block {

      BlockType		      Reference
      Name		      "A05"
      Tag		      "PSATblock"
      Description	      "Power Flow"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [715, 880, 725, 935]
      Orientation	      "up"
      ShowName		      off
	SourceBlock	"fm_lib/Power Flow/Line"
      SourceType	      "Line"
      PhysicalDomain	      "psatdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__newl0"
      RConnTagsString	      "__newr0"
      p3_4_5q		      "[100  138  60]"
      p6q		      "0"
      p8q		      "0.0497"
      p9q		      "0.192"
      p10q		      "0.052"
      p13_14_15q	      "[2.08  0.0  2.20]"
    }
    Block {

      BlockType		      Reference
      Name		      "A06"
      Tag		      "PSATblock"
      Description	      "Power Flow"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [255, 825, 315, 835]
      Orientation	      "left"
      ShowName		      off
	SourceBlock	"fm_lib/Power Flow/Line"
      SourceType	      "Line"
      PhysicalDomain	      "psatdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__newl0"
      RConnTagsString	      "__newr0"
      p3_4_5q		      "[100  138  60]"
      p6q		      "0"
      p8q		      "0.0308"
      p9q		      "0.119"
      p10q		      "0.0322"
      p13_14_15q	      "[2.08  0.0  2.20]"
    }
    Block {

      BlockType		      Reference
      Name		      "A07"
      Tag		      "PSATblock"
      Description	      "Power Flow"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [264, 695, 296, 745]
      Orientation	      "down"
      NamePlacement	      "alternate"
      ShowName		      off
	SourceBlock	"fm_lib/Power Flow/Transf2"
      SourceType	      "Line"
      PhysicalDomain	      "psatdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__newl0"
      RConnTagsString	      "__newr0"