tm-sparc.h

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/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
   This is included by other tm-*.h files to define SPARC cpu-related info.
   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
   1998, 1999, 2000
   Free Software Foundation, Inc.
   Contributed by Michael Tiemann ([e-mail])

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "regcache.h"

struct type;
struct value;
struct frame_info;

/*
 * The following enums are purely for the convenience of the GDB 
 * developer, when debugging GDB.
 */

enum {	/* Sparc general registers, for all sparc versions.  */
  G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM, 
  G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM, 
  O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM, 
  O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
  L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM, 
  L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM, 
  I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM, 
  I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
  FP0_REGNUM 		/* Floating point register 0 */
};

enum {	/* Sparc general registers, alternate names.  */
  R0_REGNUM,  R1_REGNUM,  R2_REGNUM,  R3_REGNUM, 
  R4_REGNUM,  R5_REGNUM,  R6_REGNUM,  R7_REGNUM, 
  R8_REGNUM,  R9_REGNUM,  R10_REGNUM, R11_REGNUM, 
  R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM, 
  R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM, 
  R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM, 
  R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM, 
  R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
};

enum {			/* Sparc32 control registers.  */
  PS_REGNUM  = 65, 	/* PC, NPC, and Y are omitted because */
  WIM_REGNUM = 66,	/* they have different values depending on */
  TBR_REGNUM = 67,	/* 32-bit / 64-bit mode.  */
  FPS_REGNUM = 70,
  CPS_REGNUM = 71
};

/* v9 misc. and priv. regs */

/* Note: specifying values explicitly for documentation purposes.  */
enum {	/* Sparc64 control registers, excluding Y, PC, and NPC.  */
  CCR_REGNUM = 82,		/* Condition Code Register (%xcc,%icc) */
  FSR_REGNUM = 83,		/* Floating Point State */
  FPRS_REGNUM = 84,		/* Floating Point Registers State */
  ASI_REGNUM = 86,		/* Alternate Space Identifier */
  VER_REGNUM = 87,		/* Version register */
  TICK_REGNUM = 88,		/* Tick register */
  PIL_REGNUM = 89, 		/* Processor Interrupt Level */
  PSTATE_REGNUM = 90,		/* Processor State */
  TSTATE_REGNUM = 91,		/* Trap State */
  TBA_REGNUM = 92,		/* Trap Base Address */
  TL_REGNUM = 93,		/* Trap Level */
  TT_REGNUM = 94,		/* Trap Type */
  TPC_REGNUM = 95,		/* Trap pc */
  TNPC_REGNUM = 96,		/* Trap npc */
  WSTATE_REGNUM = 97,		/* Window State */
  CWP_REGNUM = 98,		/* Current Window Pointer */
  CANSAVE_REGNUM = 99,		/* Savable Windows */
  CANRESTORE_REGNUM = 100,	/* Restorable Windows */
  CLEANWIN_REGNUM = 101,	/* Clean Windows */
  OTHERWIN_REGNUM = 102,	/* Other Windows */
  ASR16_REGNUM = 103,		/* Ancillary State Registers */
  ASR17_REGNUM = 104,
  ASR18_REGNUM = 105,
  ASR19_REGNUM = 106,
  ASR20_REGNUM = 107,
  ASR21_REGNUM = 108,
  ASR22_REGNUM = 109,
  ASR23_REGNUM = 110,
  ASR24_REGNUM = 111,
  ASR25_REGNUM = 112,
  ASR26_REGNUM = 113,
  ASR27_REGNUM = 114,
  ASR28_REGNUM = 115,
  ASR29_REGNUM = 116,
  ASR30_REGNUM = 117,
  ASR31_REGNUM = 118,
  ICC_REGNUM   = 119,		/* 32 bit condition codes */
  XCC_REGNUM   = 120,		/* 64 bit condition codes */
  FCC0_REGNUM  = 121,		/* fp cc reg 0 */
  FCC1_REGNUM  = 122,		/* fp cc reg 1 */
  FCC2_REGNUM  = 123,		/* fp cc reg 2 */
  FCC3_REGNUM  = 124		/* fp cc reg 3 */
};

/*
 * Make sparc target multi-archable: April 2000
 */

#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)

/* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
#undef  GDB_TARGET_IS_SPARC64
#define GDB_TARGET_IS_SPARC64 \
     (sparc_intreg_size () == 8)
#undef  TARGET_ELF64
#define TARGET_ELF64 \
     (sparc_intreg_size () == 8)
extern int sparc_intreg_size (void);
#else

/* Non-multi-arch: if it isn't defined, define it to zero.  */
#ifndef GDB_TARGET_IS_SPARC64
#define GDB_TARGET_IS_SPARC64 0
#endif
#ifndef TARGET_ELF64
#define TARGET_ELF64 0
#endif
#endif

#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
/*
 * The following defines must go away for MULTI_ARCH
 */

/* Initializer for an array of names of registers.
   There should be NUM_REGS strings in this initializer.  */

#define REGISTER_NAMES  \
{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",		\
  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",		\
  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",		\
  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",		\
								\
  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",		\
  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",		\
  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",	\
                                                                \
  "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" 	\
}

/* Offset from address of function to start of its code.
   Zero on most machines.  */

#define FUNCTION_START_OFFSET 0

/* Amount PC must be decremented by after a breakpoint.
   This is often the number of bytes in BREAKPOINT
   but not always.  */

#define DECR_PC_AFTER_BREAK 0

/* Say how long (ordinary) registers are.  This is a piece of bogosity
   used in push_word and a few other places; REGISTER_RAW_SIZE is the
   real way to know how big a register is.  */

#define REGISTER_SIZE 4

/* Number of machine registers */

#define NUM_REGS 72

#define	SP_REGNUM 14		/* Contains address of top of stack, \
				   which is also the bottom of the frame.  */
#define	FP_REGNUM 30		/* Contains address of executing stack frame */

#define	FP0_REGNUM 32		/* Floating point register 0 */

#define	Y_REGNUM 64		/* Temp register for multiplication, etc.  */

#define	PC_REGNUM 68		/* Contains program counter */

#define	NPC_REGNUM 69		/* Contains next PC */


/* Total amount of space needed to store our copies of the machine's
   register state, the array `registers'.  On the sparc, `registers'
   contains the ins and locals, even though they are saved on the
   stack rather than with the other registers, and this causes hair
   and confusion in places like pop_frame.  It might be better to
   remove the ins and locals from `registers', make sure that
   get_saved_register can get them from the stack (even in the
   innermost frame), and make this the way to access them.  For the
   frame pointer we would do that via TARGET_READ_FP.  On the other
   hand, that is likely to be confusing or worse for flat frames.  */

#define REGISTER_BYTES (32*4+32*4+8*4)

/* Index within `registers' of the first byte of the space for
   register N.  */

#define REGISTER_BYTE(N)  ((N)*4)

/* Number of bytes of storage in the actual machine representation for
   register N.  */

/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8).  */

#define REGISTER_RAW_SIZE(N) (4)

/* Number of bytes of storage in the program's representation
   for register N.  */

/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8).  */

#define REGISTER_VIRTUAL_SIZE(N) (4)

/* Largest value REGISTER_RAW_SIZE can have.  */

#define MAX_REGISTER_RAW_SIZE 8

/* Largest value REGISTER_VIRTUAL_SIZE can have.  */

#define MAX_REGISTER_VIRTUAL_SIZE 8

/* Return the GDB type object for the "standard" data type
   of data in register N.  */

#define REGISTER_VIRTUAL_TYPE(N) \
     ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
      builtin_type_int)

/* Sun /bin/cc gets this right as of SunOS 4.1.x.  We need to define
   BELIEVE_PCC_PROMOTION to get this right now that the code which
   detects gcc2_compiled. is broken.  This loses for SunOS 4.0.x and
   earlier.  */

#define BELIEVE_PCC_PROMOTION 1

/* Advance PC across any function entry prologue instructions
   to reach some "real" code.  SKIP_PROLOGUE_FRAMELESS_P advances
   the PC past some of the prologue, but stops as soon as it
   knows that the function has a frame.  Its result is equal
   to its input PC if the function is frameless, unequal otherwise.  */

#define SKIP_PROLOGUE(PC) sparc_skip_prologue (PC, 0)

/* Immediately after a function call, return the saved pc.
   Can't go through the frames for this because on some machines
   the new frame is not set up until the new function executes
   some instructions.  */

#define SAVED_PC_AFTER_CALL(FRAME) PC_ADJUST (read_register (RP_REGNUM))

/* Stack grows downward.  */

#define INNER_THAN(LHS,RHS) ((LHS) < (RHS))

/* Write into appropriate registers a function return value of type
   TYPE, given in virtual format.  */

#define STORE_RETURN_VALUE(TYPE, VALBUF) \
     sparc_store_return_value (TYPE, VALBUF)
extern void sparc_store_return_value (struct type *, char *);

/* Extract from an array REGBUF containing the (raw) register state
   the address in which a function should return its structure value,
   as a CORE_ADDR (or an expression that can be used as one).  */

#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
     sparc_extract_struct_value_address (REGBUF)

extern CORE_ADDR sparc_extract_struct_value_address (char *);

/* If the current gcc for for this target does not produce correct
   debugging information for float parameters, both prototyped and
   unprototyped, then define this macro.  This forces gdb to always
   assume that floats are passed as doubles and then converted in the
   callee. */

#define COERCE_FLOAT_TO_DOUBLE(FORMAL, ACTUAL) (1)

/* Stack must be aligned on 64-bit boundaries when synthesizing
   function calls (128-bit for sparc64).  */

#define STACK_ALIGN(ADDR) sparc32_stack_align (ADDR)
extern CORE_ADDR sparc32_stack_align (CORE_ADDR addr);

/* The Sparc returns long doubles on the stack.  */

#define RETURN_VALUE_ON_STACK(TYPE) \
  (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
   && TYPE_LENGTH(TYPE) > 8)

/* When passing a structure to a function, Sun cc passes the address
   not the structure itself.  It (under SunOS4) creates two symbols,
   which we need to combine to a LOC_REGPARM.  Gcc version two (as of
   1.92) behaves like sun cc.  REG_STRUCT_HAS_ADDR is smart enough to
   distinguish between Sun cc, gcc version 1 and gcc version 2.  */

#define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) \
     sparc_reg_struct_has_addr (GCC_P, TYPE)
extern int sparc_reg_struct_has_addr (int, struct type *);

#endif /* GDB_MULTI_ARCH */

#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
/*
 * The following defines should ONLY appear for MULTI_ARCH.
 */

/* Multi-arch the nPC and Y registers.  */
#define Y_REGNUM              (sparc_y_regnum ())
extern int sparc_npc_regnum (void);
extern int sparc_y_regnum (void);

#endif /* GDB_MULTI_ARCH */

/* On the Sun 4 under SunOS, the compile will leave a fake insn which
   encodes the structure size being returned.  If we detect such
   a fake insn, step past it.  */

#define PC_ADJUST(PC) sparc_pc_adjust (PC)
extern CORE_ADDR sparc_pc_adjust (CORE_ADDR);

/* Advance PC across any function entry prologue instructions to reach
   some "real" code.  SKIP_PROLOGUE_FRAMELESS_P advances the PC past
   some of the prologue, but stops as soon as it knows that the
   function has a frame.  Its result is equal to its input PC if the
   function is frameless, unequal otherwise.  */

#define SKIP_PROLOGUE_FRAMELESS_P(PC) sparc_skip_prologue (PC, 1)
extern CORE_ADDR sparc_skip_prologue (CORE_ADDR, int);

/* If an argument is declared "register", Sun cc will keep it in a register,
   never saving it onto the stack.  So we better not believe the "p" symbol
   descriptor stab.  */

#define USE_REGISTER_NOT_ARG

/* For acc, there's no need to correct LBRAC entries by guessing how
   they should work.  In fact, this is harmful because the LBRAC
   entries now all appear at the end of the function, not intermixed
   with the SLINE entries.  n_opt_found detects acc for Solaris binaries;
   function_stab_type detects acc for SunOS4 binaries.

   For binary from SunOS4 /bin/cc, need to correct LBRAC's.

   For gcc, like acc, don't correct.  */

#define	SUN_FIXED_LBRAC_BUG \
  (n_opt_found \
   || function_stab_type == N_STSYM \
   || function_stab_type == N_GSYM \
   || processing_gcc_compilation)

/* Do variables in the debug stabs occur after the N_LBRAC or before it?
   acc: after, gcc: before, SunOS4 /bin/cc: before.  */

#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
  (!(gcc_p) \
   && (n_opt_found \
       || function_stab_type == N_STSYM \
       || function_stab_type == N_GSYM))

/* Sequence of bytes for breakpoint instruction (ta 1). */

#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}

/* Register numbers of various important registers.
   Note that some of these values are "real" register numbers,
   and correspond to the general registers of the machine,
   and some are "phony" register numbers which are too large
   to be actual register numbers as far as the user is concerned
   but do serve to get the desired values when passed to read_register.  */

#define	G0_REGNUM 0		/* %g0 */
#define	G1_REGNUM 1		/* %g1 */