📄 npostdim.asm
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dih_pci_check_ide proc near
pushad
mov dword ptr dih_manual_ide_id, 0FFFFFFFFh ;Init scratch data
; 1a. Read the setup question Q_PCI_OFFBOARD_IDE.
; If it is set to Auto, then exit this function.
mov al, Q_PCI_OFFBOARD_IDE
call check_cmos_data_far ;AL = 0/1/../6 for Auto/Slot1/../Slot6
jz check_ide_done ;Br if set to Auto
; 1b. If it is set to Slot 1/2/3/4/5/6, then translate the slot # into a
; PCI bus/device/function number (function part will always be 0).
mov ah, RT_PCI_SLOT_TO_DEV
CALL_RT_FUNCTION ;Translate slot AL to bus/dev in BX
jc check_ide_done ;Br if unknown PCI slot number
mov di, PCI_REG_SUB_TYPE
mov ah, RT_PCI_READ_CFG_WORD
CALL_RT_FUNCTION
cmp ch,03h ; class code = VGA ?
jz vga_found ; yes..
cmp cx,0001h ; class code = old VGA ?
vga_found:
jz check_ide_done ;Br if this slot number is VGA
; 2. Read the device's vendor/device ID and save it in the variable
; dih_manual_ide_id. This will make it a protected device and prevent the
; device from getting programmed by the normal PCI configuration routines.
mov di, PCI_REG_VENDID
mov ah, RT_PCI_READ_CFG_DWORD
CALL_RT_FUNCTION ;Read Vendor ID & Device ID
mov dword ptr dih_manual_ide_id, ecx ;Save vendor ID and Device ID
mov di, offset OwnerWork ;Make an owner_pci structure for resmgr
mov (owner_pci ptr [di]).own_pci_sig, OWNTYPE_PCI
mov (owner_pci ptr [di]).own_pci_bus, bh
mov (owner_pci ptr [di]).own_pci_devfunc, bl
mov dword ptr (owner_pci ptr [di]).own_pci_vendid, ecx
mov (owner_pci ptr [di]).own_pci_rsvd, 0
; 3a. Read the setup question Q_PCI_OFFBOARD_IDE_PRI_IRQ.
; 3b. If it is set to Disabled, then go to step 4.
xor cx, cx ;CH <> 00 primary enabled
;CL <> 00 secondary enabled
mov al, Q_PCI_OFFBOARD_IDE_PRI_IRQ
call check_cmos_data_far ;AL = 0/1/../5 for Disabled/IntA/B/C/D/Hardwired
mov ch, al
jz check_ide_secondary ;Br if primary IRQ is disabled
push cx
; 3c. If it is set to IntA/B/C/D, then route and allocate IRQ 14 to the PCI
; bus/device from step 1.
cmp al, 4
ja check_ide_pri_hardwired ;Br if primary IRQ is set to hardwired
mov dl, al ;DL = 1/2/3/4 for IntA/B/C/D
mov al, 0Eh ;AL = IRQ 14
mov ah,RT_PCI_ROUTE_IRQ
CALL_RT_FUNCTION ;Route IRQ to the device
; 3d. If it is set to Hardwired, then allocate IRQ 14, but don't route it.
check_ide_pri_hardwired:
pusha
mov bx, 0100000000000000b ;Bit 14 = IRQ 14
mov di, offset OwnerWork ;Point ES:DI to owner_pci structure
mov ax, RM_ALLOC_IRQ * 100h
CALL_RESMGR ;Call Resource Manager to allocate IRQ
popa
mov cl, 0Eh ;IRQ 14
mov di, PCI_REG_INT_LINE
mov ah, RT_PCI_WRITE_CFG_BYTE
CALL_RT_FUNCTION ;Write Int Line register with IRQ 14
; 3c. Allocate ports 1F0-1F7 and 3F6 to the device.
mov ecx, 1F0h ;Base address
mov dx, 8 ;Size
mov di, PCI_REG_FIRST_BASE_ADD ;Offset in config space
call alloc_and_prog_pci_ioaddr ;Allocate and program base addr reg
mov ecx, 3F6h ;Base address
mov dx, 1 ;Size
mov di, PCI_REG_FIRST_BASE_ADD+4 ;Offset in config space
call alloc_and_prog_pci_ioaddr ;Allocate and program base addr reg
; 4a. Read the setup question Q_PCI_OFFBOARD_IDE_SEC_IRQ.
; 4b. If it is set to Disabled, then go to step 5.
pop cx
check_ide_secondary:
mov al, Q_PCI_OFFBOARD_IDE_SEC_IRQ
call check_cmos_data_far ;AL = 0/1/../5 for Disabled/IntA/B/C/D/Hardwired
mov cl, al
jz check_ide_enable ;Br if secondary IRQ is disabled
push cx
; 4c. If it is set to IntA/B/C/D, then route and allocate IRQ 15 to the PCI
; bus/device from step 1.
cmp al, 4
ja check_ide_sec_hardwired ;Br if secondary IRQ is set to hardwired
mov dl, al ;DL = 1/2/3/4 for IntA/B/C/D
mov al, 0Fh ;AL = IRQ 15
mov ah,RT_PCI_ROUTE_IRQ
CALL_RT_FUNCTION ;Route IRQ to the device
; 4d. If it is set to Hardwired, then allocate IRQ 15, but don't route it.
check_ide_sec_hardwired:
pusha
mov bx, 1000000000000000b ;Bit 15 = IRQ 15
mov di, offset OwnerWork ;Point ES:DI to owner_pci structure
mov ax, RM_ALLOC_IRQ * 100h
CALL_RESMGR ;Call Resource Manager to allocate IRQ
popa
mov cl, 0Fh ;IRQ 15
mov di, PCI_REG_INT_LINE
mov ah, RT_PCI_WRITE_CFG_BYTE
CALL_RT_FUNCTION ;Write Int Line register with IRQ 15
; 4e. Allocate ports 170-177 and 376 to the device.
mov ecx, 170h ;Base address
mov dx, 8 ;Size
mov di, PCI_REG_FIRST_BASE_ADD+8 ;Offset in config space
call alloc_and_prog_pci_ioaddr ;Allocate and program base addr reg
mov ecx, 376h ;Base address
mov dx, 1 ;Size
mov di, PCI_REG_FIRST_BASE_ADD+0Ch ;Offset in config space
call alloc_and_prog_pci_ioaddr ;Allocate and program base addr reg
; 5. Enable the device by writing to its command register.
pop cx
check_ide_enable:
jcxz check_ide_disable ;Br if neither controller is enabled
mov cx, CMD_IO_SPACE + CMD_MEM_SPACE + CMD_BUS_MASTER
check_ide_disable:
mov di, PCI_REG_COMMAND
mov ah, RT_PCI_WRITE_CFG_WORD
CALL_RT_FUNCTION ;Write CX to command register
check_ide_done:
popad
ret
dih_pci_check_ide endp
;---------------------------------------;
; alloc_and_prog_base_addr ;
;---------------------------------------;--------------------------------------;
; This function allocates an I/O port block from the resource manager and then ;
; programs the given PCI device / register with the base address. ;
; ;
; Input: BL = Device/Function number to initialize ;
; Bits 7-3: PCI device number ;
; Bits 2-0: Function number within the device ;
; BH = Bus number of device to initialize ;
; DI = PCI register to program ;
; ECX = I/O port base address ;
; DX = Size of I/O port block in bytes ;
; DS = ES = _dimdata Segment ;
; ;
; Output: Nothing ;
; ;
; Destroys: Nothing ;
;------------------------------------------------------------------------------;
alloc_and_prog_pci_ioaddr proc near
push ax
pusha
mov si, dx ;SI = alignment (same as size)
mov bx, cx ;BX = min base addr (same as max in CX)
mov di, offset OwnerWork
mov ax, (RM_ALLOC_PORT * 100h) + RESFLAG_PORT_DECODE16
CALL_RESMGR ;Call Resource Manager to allocate port
popa
mov ah, RT_PCI_WRITE_CFG_DWORD
CALL_RT_FUNCTION ;Write ECX to PCI device BX, register DI
pop ax
ret
alloc_and_prog_pci_ioaddr endp
;---------------------------------------;
; dih_pci_func_2 (Output Device Init) ;
;---------------------------------------;--------------------------------------;
; This function is called by the PCI Device Initializer (DI-PCI.ASM) ;
; during function 2 (Output Device Init). ;
; ;
; Input: SI = Offset of the NVRam workspace (in _dimdata seg) ;
; DS = ES = _dimdata Segment ;
; ;
; Output: CF = Cleared if boot output device was found, set if not found. ;
; FoundDevID = Device ID of device that was found (if CF clear) ;
; FoundDevFunc = Device/Func number of device found (if CF clear) ;
; Bits 7-3: PCI device number ;
; Bits 2-0: Function number within dev ;
; FoundDevBus = Bus number of device that was found (if CF clear) ;
; ;
; Preserves: DS, ES, BP (all other registers are destroyed) ;
;------------------------------------------------------------------------------;
public check_isa_vga
dih_pci_func_2 proc near
;; Have DRAM in bank0?
mov bx, S530_BUS_NUM * 100h + S530_DEV_FUNC_NUM
mov di, 063h
mov ah, RT_PCI_READ_CFG_BYTE
CALL_RT_FUNCTION
test cl,01h
jnz short do_share_memory
call auto_detect_local_share
jz skip_share_memory
mov bx, S530_BUS_NUM * 100h + S530_DEV_FUNC_NUM
mov di, 0afh
mov cl, 0ffh
mov ah, RT_PCI_WRITE_CFG_BYTE
CALL_RT_FUNCTION
jmp short skip_share_memory
do_share_memory:
mov al,Q_SHARE_MEMORY
call check_cmos_data_far
jnz short check_share_memory
;; Here, We must be check if system only one V.G.A on the M/B!
push si
mov ecx, BT_DISPLAY * 100h * 100h
mov si,1
mov ah,RT_PCI_FIND_CLASS
CALL_RT_FUNCTION
pop si
jnc short skip_share_memory
check_share_memory:
call auto_detect_local_share
jz short skip_share_memory
call setup_share_memory
skip_share_memory:
mov FindDevID,0
mov al,q_pri_display_card
call check_cmos_data_far
jz check_pci_apg_done
mov FindDevIncBus, -1 ;Search busses highest to lowest
jmp short check_isa_vga
check_pci_apg_done:
push si
mov ecx, ST_OLD_VGA * 100h
sub si,si
mov ah,RT_PCI_FIND_CLASS
CALL_RT_FUNCTION
pop si
jc short check_isa_vga
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