pcimhbr.asm

<BIOS研发技术剖析>书的源代码,包括完整的BIOS汇编语言源程序.

	page	,132
	title .		PCI Multiple Host Bridge Hooks
;*****************************************************************;
;*****************************************************************;
;**                                                             **;
;**      (C)Copyright 1985-1996, American Megatrends, Inc.      **;
;**                                                             **;
;**                     All Rights Reserved.                    **;
;**                                                             **;
;**           6145-F Northbelt Pkwy, Norcross, GA 30071         **;
;**                                                             **;
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;*****************************************************************;
;*****************************************************************;

;---------------------------------------;
	include	dim.equ
	include devnode.equ
	include rt.equ
	include escd.equ
	include pci.equ
	include pnp.equ
;---------------------------------------;
	include dim.dat
;---------------------------------------;

	public pci_host_bridge_count
	public pci_host_bridge_table
	public compat_opb_busdev_num

	public pci_hb_set_sec_bus_num
	public pci_hb_set_sub_bus_num
	public pci_hb_program_limits
	public pci_hb_program_compat_limits
	public pci_hb_enable_vga

;---------------------------------------;

cgroup	group	_text
_text 	segment word public 'CODE'
	assume	cs:cgroup
.386


;------------------------------------------------------------------------------;
; Note: This code contains examples of how to implement a system with two host ;
; bridges on the Intel Orion chipset.                                          ;
;------------------------------------------------------------------------------;

pci_host_bridge_count	label byte
	db	2	;Number of PCI host bridges in system


; This table should have one entry (two bytes per entry) for each PCI host
; bridge that is present in the system.  If the system has a host bridge
; that operates in compatibility mode, then put that bridge at the top of
; the table.

pci_host_bridge_table	label byte
compat_opb_busdev_num	label word

;          Device Number SHL 3 +
;             Function Number       Bus Number
;          ---------------------    ----------
	db          0C8h,                00h
	db          0D0h,                00h


;---------------------------------------;
; pci_hb_set_sec_bus_num                ;
;---------------------------------------;--------------------------------------;
; This function should write the given value to a host bridge's Secondary Bus  ;
; Number register.  This register controls the PCI bus number of the bus that  ;
; is directly behind the host bridge.                                          ;
;                                                                              ;
; Input: BH = Bus number used to access host bridge's config registers (this   ;
;             value will be from one of the entries in the                     ;
;             pci_host_bridge_table)                                           ;
;        BL = Device/Function number used to access host bridge's              ;
;             config registers (this value will be from one of the entries in  ;
;             the pci_host_bridge_table)                                       ;
;        AL = Bus number to write to host bridge's Secondary Bus Number        ;
;             register                                                         ;
;        DS = ES = _dimdata Segment                                            ;
;                                                                              ;
; Output: Nothing                                                              ;
;                                                                              ;
; Destroys: Nothing                                                            ;
;------------------------------------------------------------------------------;
pci_hb_set_sec_bus_num	proc near
	pusha

	mov	di, opb_bus_number_index
	mov	cl, al
	mov	ah, RT_PCI_WRITE_CFG_BYTE
	CALL_RT_FUNCTION		;Write CL to device BH/BL, register DI

	popa
	ret
pci_hb_set_sec_bus_num	endp


;---------------------------------------;
; pci_hb_set_sub_bus_num                ;
;---------------------------------------;--------------------------------------;
; This function should write the given value to a host bridge's Subordinate Bus;
; Number register.  This register is used to set the bus number of the last    ;
; hierarchical PCI bus behind the host bridge.                                 ;
;                                                                              ;
; Input: BH = Bus number used to access host bridge's config registers (this   ;
;             value will be from one of the entries in the                     ;
;             pci_host_bridge_table)                                           ;
;        BL = Device/Function number used to access host bridge's              ;
;             config registers (this value will be from one of the entries in  ;
;             the pci_host_bridge_table)                                       ;
;        AL = Bus number to write to host bridge's Subordinate Bus Number      ;
;             register                                                         ;
;        DS = ES = _dimdata Segment                                            ;
;                                                                              ;
; Output: Nothing                                                              ;
;                                                                              ;
; Destroys: Nothing                                                            ;
;------------------------------------------------------------------------------;
pci_hb_set_sub_bus_num	proc near
	pusha

	mov	di, opb_sub_bus_number_index
	mov	cl, al
	mov	ah, RT_PCI_WRITE_CFG_BYTE
	CALL_RT_FUNCTION		;Write CL to device BH/BL, register DI

	popa
	ret
pci_hb_set_sub_bus_num	endp


;---------------------------------------;
; pci_hb_program_limits                 ;
;---------------------------------------;--------------------------------------;
; This function programs a bridge chip's I/O, memory, and prefetchable memory  ;
; decode ranges with values from the PCIBusTable.                              ;
;                                                                              ;
; Input: SI = Pointer to bus's entry in PCIBusTable                            ;
;        DS = ES = _dimdata Segment                                            ;
;                                                                              ;
; Output: Nothing                                                              ;
;                                                                              ;
; Destroys: Nothing                                                            ;
;------------------------------------------------------------------------------;
pci_hb_program_limits	proc near
	pushad

	mov	bl, (pci_bus_entry ptr [si]).pbe_parent_bus_dev
	mov	bh, (pci_bus_entry ptr [si]).pbe_parent_bus

	cmp	bx, cgroup:compat_opb_busdev_num
	jz	skip_limit_prog		;Br if on compat OPB

	;Set I/O base address

	mov	dx, (pci_bus_entry ptr [si]).pbe_io_start
	mov	cx, (pci_bus_entry ptr [si]).pbe_io_size
	jcxz	skip_io_region		;Br if no I/O region to program
	add	cx, dx			;CX = End address+1 of I/O region
	dec	cx			;CX = End address of I/O region
	and	cx, 0FFF0h		;Low 4 bits of end address are reserved
	shl	ecx, 16			;Upper word of ECX = end addr of I/O
	mov	cx, dx			;CX = Start address of I/O region
	and	cx, 0FFF0h		;Bits 3:1 are reserved
	or	cl, 01h			;Set bit 0, to enable I/O region decode
	mov	di, opb_io_space_range_1_index
	mov	ah, RT_PCI_WRITE_CFG_DWORD
	CALL_RT_FUNCTION		;Write ECX to device BH/BL, register DI
	mov	di, opb_io_space_range_2_index
	mov	ah, RT_PCI_WRITE_CFG_DWORD
	CALL_RT_FUNCTION		;Write ECX to device BH/BL, register DI

skip_io_region:

	;Set memory end address

	mov	edx, (pci_bus_entry ptr [si]).pbe_mem_start
	mov	ecx, (pci_bus_entry ptr [si]).pbe_mem_size
	jecxz	skip_mem_region		;Br if no mem region to program
	add	ecx, edx		;ECX = End address+1 of mem region
	dec	ecx			;ECX = End address of mem region
	shr	ecx, 20			;Align address bit 20 with register bit 0