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📄 oempost.asm

📁 <BIOS研发技术剖析>书的源代码,包括完整的BIOS汇编语言源程序.
💻 ASM
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;-----------------------------------------------------------------------;
; check point           : AA                                            ;
; this routine is called from special_config_display in POST.ASM to     ;
; display any OEM specific configuration.                               ;
; input :                                                               ;
;       ds      0040h                                                   ;
;       es      0000h                                                   ;
;       stack available                                                 ;
; register usage : can destroy any register except EBP,DS,ES,FS,GS      ;
;-----------------------------------------------------------------------;
        extrn   edo_memory_msg:abs
        extrn   rsdram_memory_msg:abs
        extrn   sdram_memory_msg:abs
        extrn   fpm_memory_msg:abs
	extrn	write_tty:near
        extrn   display_0d0a:near
        extrn   display_message_set:near
	extrn	read_cursor_posn:near
	extrn	set_cursor_posn:near
	extrn	dmi_mem_module_info:near

        public  oem_special_config_display
oem_special_config_display:
;; Display DRAM Types Information
	mov	dx,10			; Check SDRAM
        mov     bh,sdram_memory_msg
	call	display_dram_info

	mov	dx,4			; Check EDO
        mov     bh,edo_memory_msg
	call	display_dram_info

	mov	dx,3			; Check FP
        mov     bh,fpm_memory_msg
	call	display_dram_info

        ret

display_dram_info:
	mov	ax,1
next_dimm:
	push	ax
	call	dmi_mem_module_info
	pop	ax
	cmp	bl,7fh
	jz	dimm_no_dram
	bt	cx,dx
	jnc	dimm_no_dram
	or	ah,ah
	jnz	skip_show_title
	push	ax
        mov     bl,09h
        call    display_message_set
	pop	ax
skip_show_title:
	or	ah,ah
	jz	@f
	push	ax
	mov	al,','
	call	write_tty
	pop	ax
@@:
	push	ax
	add	al,30h
	call	write_tty
	pop	ax
	mov	ah,0ffh
dimm_no_dram:
	inc	ax
	cmp	al,4
	jnz	next_dimm
	or	ah,ah
	jz	dis_info_done
	call	read_cursor_posn	; DH,DL = row,col of cursor
	cmp	dl,40
	ja	goto_next_row
	mov	dl,40
set_cursor:
	call	set_cursor_posn		; set cursor posn
dis_info_done:
	ret
goto_next_row:
	call	display_0d0a
	ret

;-----------------------------------------------------------------------;
					; (CORE0228),(CORE0206+)>
	include	dc.equ
dc_oem_arrangement	label	byte
	db	dc_math_processor,	dc_base_memory
	db	dc_floppy_a,		dc_ext_memory
	db	dc_floppy_b,		dc_serial_port
	db	dc_display_type,	dc_parallel_port
	db	dc_amibios_date,	dc_processor_clock
	db	dc_l2_cache,		dc_apm_smi
;	db	dc_sdram_type,		dc_ecc_info
;	db	dc_k6_3_l2_cache,	dc_apm_version
	db	0ffh			; end

dc_oem_routines_table	label	word
;dc_sdram_type		equ	dc_oem_index_start
;	dw	offset cgroup:sdram_type
;
;dc_ecc_info		equ	dc_oem_index_start+1
;	dw	offset cgroup:ecc_info
;
;dc_k6_3_l2_cache	equ     dc_oem_index_start+2
;	dw	offset cgroup:k6_3_l2_cache
;
;dc_apm_version		equ	dc_oem_index_start+3
;	dw	offset cgroup:apm_version
;---------------------------------------;
; Example				;
;---------------------------------------;-------------------------------;
; Input:
;	None
; Output:
;	Message displayed with ':'
; Registers destroyed:
;	All except BP,DS,ES,FS,GS
; NOTES: Please use display_dc_colon for "xxxx : " string
;-----------------------------------------------------------------------;
;	extrn	sdram_type_msg:abs
;sdram_type:
;	mov	bl,9
;	mov	bh,sdram_type_msg
;	call	display_dc_colon	; "SDRAM TYPE      : "
;	ret
;ecc_info:
;	mov	bl,9
;	mov	bh,
;	call	display_dc_colon
;	ret
;k6_3_l2_cache
;	mov	bl,9
;	mov	bh,
;	call	display_dc_colon
;	ret
;apm_version
;	mov	bl,9
;	mov	bh,
;	call	display_dc_colon
;	ret

;-----------------------------------------------------------------------;
; Input:
;	DI	index
;---------------------------------------;
	public	dc_oem_routines
dc_oem_routines:
	sub	di,dc_oem_index_start
	shl	di,1
	call	word ptr cs:dc_oem_routines_table[di]
	retf
;---------------------------------------;
display_dc_colon:
	push	bp
	push	ds

	push	cs
	push	offset dc_return	; return address for retf

	extern	ram_segment:word
	mov	ds,cgroup:ram_segment
	push	ds:[0feb4h+2]		; segment
	push	ds:[0feb4h]		; offset
	mov	bp,dc_display_colon
	retf				; far jump to DC public routines entry
dc_return:
	pop	ds
	pop	bp
	ret
;---------------------------------------;
; Output:
;	ES:SI	point to dc_oem_arrangement
;---------------------------------------;
	public	get_dc_oem_table
get_dc_oem_table:
	push	cs
	pop	es
	mov	si,offset cgroup:dc_oem_arrangement
	ret
					; <(CORE0228),(CORE0206+)
;-----------------------------------------------------------------------;
;                       GET_SHADOW_STATUS                               ;
;-----------------------------------------------------------------------;
; this routine returns the information whether shadow ram can be made   ;
; readable and writeable at the same time i.e. whether read ram and     ;
; write ram is possible.                                                ;
; input :                                                               ;
;       stack   available                                               ;
; output:                                                               ;
;       cy      routine not implemented                                 ;
;       nc      routine implemented                                     ;
;       DI      shadow ram attribute                                    ;
;               bit-0 = 0 shadow ram read and write not possible        ;
;                       1 shadow ram read write possible                ;
;               bit-1 = 0 VGA memory not USWC                           ;
;                       1 VGA memory USWC                               ;
;               bit15-2= reserved (set to 0)                            ;
;       SI      bit 3-0 = C000 shadow ram cacheable in 16k granularity  ;
;                   bit-0 C0000-C3FFF                                   ;
;                   bit-1 C4000-C7FFF                                   ;
;                   bit-2 C8000-CBFFF                                   ;
;                   bit-3 CC000-CFFFF                                   ;
;               bit 7-4 = D000 shadow ram cacheable in 16k granularity  ;
;               bit11-8 = E000 shadow ram cacheable in 16k granularity  ;
;               bit15-12= F000 shadow ram cacheable in 16k granularity  ;
;       ECX,EDX USWC memory region1 32-bit start address, size in bytes ;
;       EAX,EBX USWC memory region2 32-bit start address, size in bytes ;
; register usage : can destroy any register except EBP,DS,ES,FS,GS      ;
; NOTE: 1. do not program anything in this routine.                     ;
;       2. in this routine, CS should NOT be assumed as F000.           ;
;       3. if read ram and write ram is possible, then in the hooks     ;
;       E000_READ_X_WRITE_RAM and F000_READ_X_WRITE_RAM, make read ram  ;
;       and write ram.                                                  ;
;       4. Set both start address and size to 0000 for a region which   ;
;       will not be set to USWC.                                        ;
;-----------------------------------------------------------------------;
first_shadow_question   label   byte
        db      Q_DC000_SHADOW
        db      Q_D8000_SHADOW
        db      Q_D4000_SHADOW
        db      Q_D0000_SHADOW
        db      Q_CC000_SHADOW
        db      Q_C8000_SHADOW
;        db      Q_C4000_SHADOW
        db      Q_C0000_SHADOW
        db      Q_C0000_SHADOW
last_shadow_question    label   byte
number_shadow_questions equ     (last_shadow_question - first_shadow_question)
        public  get_shadow_status
get_shadow_status:
        xor     si,si                   ; default to no areas shadowed

        call    check_cmos_8e           ; check if cmos checksum good
        jnz     gss_exit                ; exit if not

        test    bp,ins_key_err_bit      ; <INS> key pressed ?
        jnz     gss_exit                ; exit if yes

        mov     di,offset first_shadow_question
        mov     cx,number_shadow_questions
gss_00:
        mov     al,byte ptr cs:[di]
        call    check_cmos_data
        inc     di              ; point to next CMOS question
        cmp     al,2            ; is shadow cache enabled?
        jne     gss_01          ; jump if NOT
        or      si,01h          ; else OR in this bit
gss_01:
        shl     si,1            ; shift si for next shadow region
        loop    gss_00          ; do this for up to 8 regions
        shr     si,1            ; fix up after testing last region
;
; Next see if we are supposed to cache the system BIOS region (0f0000)
;
        mov     al,Q_CACHE_BIOS
        call    check_cmos_data
;;        or      al,al           ; is system BIOS cacheable set?
        jz      gss_02          ; jump if not
        or      si,0f000h       ; else OR in the 4 0F0000 page bits
;
; next decide whether to set the VGA frame buffer region to
; USWC memory type.
;
gss_02:
        xor	di,di
;        mov     al,VGA_FRAME_BUFFER_USWC
;        call    check_cmos_data
;        jz      gss_exit
;        or      di,00000010b

gss_exit:
        xor     ecx,ecx         ; no USWC region1
        xor     edx,edx
        xor     eax,eax         ; no USWC region2
        xor     ebx,ebx
        clc
        ret
;-----------------------------------------------------------------------;
;                       DISPLAY_CPU_NAME_PRATING                        ;
; This routine displays CPU name and PRating.                           ;
; If you do not want to display the PRating along with the CPU name,    ;
; then you have to modify this routine to display only the CPU name.    ;
; input :                                                               ;
;       none                                                            ;
; output:                                                               ;
;       none                                                            ;
; register usage : do not destroy any register                          ;
;-----------------------------------------------------------------------;
        extrn   cpu_name_display_buffer:byte
        extrn   write_tty:near
        extrn   display_message_cs:near
        public  display_cpu_name_prating
display_cpu_name_prating:
	pusha
	mov	si,offset cgroup:cpu_name_display_buffer
	call	display_message_cs	; display cpu name
;---------------------------------------;
; if you do not want to display PRating along with the CPU name,
; then comment out the following lines between {PR_STARTS and PR_ENDS}
	extrn	pr_string:byte
	cmp	byte ptr cgroup:[pr_string+2],0 ; James 012497
	jz	dcnp_00
	mov	si,offset pr_string
	call	display_message_cs
dcnp_00:
;---------------------------------------;

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