oemrun.asm

<BIOS研发技术剖析>书的源代码,包括完整的BIOS汇编语言源程序.

;	al	hard disk standby timer value in unit of 5sec		;
;		NOTE: a zero (00) value indicates that standby feature	;
;		is disabled.						;
; register usage : can destroy any register except EBP,DS,ES,FS,GS	;
; NOTE: the following may need to be modified to return the timer value	;
; properly according to setup option in case cmos register is used in	;
; setup to make this timer value user selectable.			;
;-----------------------------------------------------------------------;
;			GET_HD_STANDBY_VALUE_SS				;
;-----------------------------------------------------------------------;
; check point		: 91						;
; this routine is called from hard_disk_setup during POST from HI.ASM.	;
; is used to return standby timer value for secondary slave hard disk.	;
; input :								;
;	SS	0030H							;
;	DS	0040H							;
;	ES	0000H							;
;	stack	available						;
; output:								;
;	al	hard disk standby timer value in unit of 5sec		;
;		NOTE: a zero (00) value indicates that standby feature	;
;		is disabled.						;
; register usage : can destroy any register except EBP,DS,ES,FS,GS	;
; NOTE: the following may need to be modified to return the timer value	;
; properly according to setup option in case cmos register is used in	;
; setup to make this timer value user selectable.			;
;-----------------------------------------------------------------------;
	public	get_hd_standby_value_pm
	public	get_hd_standby_value_ps
	public	get_hd_standby_value_sm
	public	get_hd_standby_value_ss
get_hd_standby_value_pm:
get_hd_standby_value_ps:
get_hd_standby_value_sm:
get_hd_standby_value_ss:
COMMENT ~
IF	MKF_GPC_SUPPORT 		; If GPC support, use drive time-out
	mov	al,Q_POWER_MANAGEMENT
	call	check_cmos_data
	jz	short all_timers_disabled; AL = 00 already
	mov	al,Q_IDE_TIME_OUT
	call	check_cmos_data		; AL = time out value in Minutes
	mov	ah,12
	mul	ah			; AL = time out value in unit of 5sec
all_timers_disabled:
ELSE
	mov	al,00h			; Disabled, e.g. Use timers for NB
ENDIF
~
        xor     al,al
	ret
;-----------------------------------------------------------------------;
;			LPT SUPPORT ROUTINES				;
;-----------------------------------------------------------------------;
;			GET_LPT_IRQ_INFO    				;
;			SET_LPT_IRQ              			;
;			GET_LPT_ECP_DMA_INFO   				;
;			SET_LPT_ECP_DMA_CHANNEL				;
;-----------------------------------------------------------------------;
; - GET_LPT_IRQ_INFO and GET_LPT_ECP_DMA_INFO: The I/O module calls	;
;   these routines to determine if the parallel port IRQ/DMA channel	;
;   is routed by the I/O chip or by the system chipset.			;
;									;
;   If I/O chipset handles the IRQ/DMA routing, clear the carry flag	;
;   and return.								;
;									;
;   If the routing of the parallel port IRQ/DMA channel is handled	;
;   by the system chipset, set the carry flag and return the requested	;
;   IRQ/DMA information.						;
;									;
; - SET_LPT_IRQ and SET_LPT_ECP_DMA_CHANNEL are called only if IRQ or	;
;   ECP DMA is to be routed by system chipset.				;
;-----------------------------------------------------------------------;
;			GET_LPT_IRQ_INFO        			;
;-----------------------------------------------------------------------;
; This routine returns the IRQ routing information of the parallel port	;
; input :								;
;	none								;
;	stack	available						;
; output:								;
;	CF = Clear - LPT IRQ is routed by I/O chipset			;
;	   = Set   - LPT IRQ is routed by system chipset		;
;									;
;	If LPT IRQ is routed by the system chipset then also return:	;
;	   BX = Bit-mask of LPT IRQ currently used.			;
;	   DX = Bit-mask of LPT IRQ available.				;
;									;
; register usage : Do not destroy any register except BX, DX		;
;									;
; Examples:								;
; 1. If IRQ 7 is routed by system chipset with IRQ 5 & IRQ 7 available, ;
;    then return: BX = 0000000010000000b, DX = 0000000010100000b, and	;
;    CF = 1.								;
; 2. If IRQ is routed by I/O chipset, then just clear CF and return.	;
;-----------------------------------------------------------------------;
	public	get_lpt_irq_info
get_lpt_irq_info:
	clc			; LPT IRQ is routed by I/O chipset.
	ret
;-----------------------------------------------------------------------;
;			SET_LPT_IRQ					;
;-----------------------------------------------------------------------;
; This routine programs the system chipset to route the parallel port	;
; IRQ to the channel given in AL.					;
; input :								;
;	AL = IRQ channel number (0 for None)				;
;	stack	available						;
; output:								;
;	none								;
; register usage : Do not destroy any register				;
;									;
; Note: This routine is called only if LPT IRQ is to be routed by	;
;	system chipset.							;
;-----------------------------------------------------------------------;
	public	set_lpt_irq
set_lpt_irq:
	ret
;-----------------------------------------------------------------------;
;			GET_LPT_ECP_DMA_INFO        			;
;-----------------------------------------------------------------------;
; This routine returns the ECP DMA routing information of the parallel	;
; port.									;
; input :								;
;	none								;
;	stack	available						;
; output:								;
;	CF = Clear - ECP DMA is routed by I/O chipset			;
;	   = Set   - ECP DMA is routed by system chipset		;
;									;
;	If ECP DMA is routed by the system chipset then also return:	;
;	   CL = Bit-mask of ECP DMA channel currently used.		;
;	   DL = Bit-mask of DMA channels available.			;
;									;
; register usage : Do not destroy any register except CL and DL		;
;									;
; Examples:								;
; 1. If ECP DMA channel 3 is routed by system chipset with channels 1	;
;    and 3 available, then return: CL = 00001000b, DL = 00001010b	;
;    and CF = 1.							;
; 2. If ECP DMA is routed by I/O chipset, then just clear CF and return.;
;-----------------------------------------------------------------------;
	public	get_lpt_ecp_dma_info
get_lpt_ecp_dma_info:
	clc			; ECP DMA is routed by I/O chipset.
	ret
;-----------------------------------------------------------------------;
;			SET_LPT_ECP_DMA_CHANNEL				;
;-----------------------------------------------------------------------;
; This routine programs the system chipset to route the papallel port	;
; ECP DMA to the channel given in AL.					;
; input :								;
;	AL = DMA channel number (0-7, 4 for None)			;
;	AH = Previous DMA channel number (0-7, 4 for None)		;
;	stack	available						;
; output:								;
;	none								;
; register usage : Do not destroy any register				;
;									;
; Note: This routine is called only if LPT IRQ is to be routed by	;
;	system chipset.							;
;-----------------------------------------------------------------------;
	public	set_lpt_ecp_dma_channel
set_lpt_ecp_dma_channel:
	ret
;-----------------------------------------------------------------------;
;			OEM_SET_INT_40_FLAG				;
;			OEM_CLEAR_INT_40_FLAG				;
;			OEM_SET_INT_13_FLAG				;
;			OEM_CLEAR_INT_13_FLAG				;
; These SET routines are called from the respective INT ISR at the	;
; start of ISR. The SET routines can be used to implement any OEM	;
; specific requirements.						;
; These CLEAR routines are called from the respective INT ISR at the	;
; end of ISR. The CLEAR routines can be used to clear the status which	;
; has been set in the SET routines.					;
; Input of SET routines:						;
;	As input to the respective INT ISR				;
; Input of CLEAR routines:						;
;	As output of the respective INT ISR				;
; Register Usage : Do not destroy any register including Flags		;
;									;
; EXAMPLE : This will give the idea of how these SET and CLEAR routines	;
; are invoked.								;
;									;
; The following code is in the respective INT ISR routine e.g. INT_40	;
; in FD.ASM file.							;
;									;
; INT_XX:								;
;	CALL	SET_INT_XX_FLAG		; in RUNTIME.ASM		;
; ; execute INT-XX ISR							;
;	|	|	|	|	; Start of INT-XX ISR		;
;	|	|	|	|					;
;	|	|	|	|					;
;	|	|	|	|					;
;	|	|	|	|					;
;	|	|	|	|					;
; ; INT-XX ISR has been executed					;
; ; all registers & flag have the value as output of INT-XX ISR		;
;	CALL	CLEAR_INT_XX_FLAG	; in RUNTIME.ASM		;
;	IRET								;
;									;
; The RUNTIME.ASM has the SET and CLEAR routines as follows:		;
;									;
; SET_INT_XX_FLAG:							;
;	CALL	OEM_SET_INT_XX_FLAG					;
;	RET								;
;									;
; CLEAR_INT_XX_FLAG:							;
;	CALL	OEM_CLEAR_INT_XX_FLAG					;
;	RET								;
;									;
; NOTE: If anything specific needs to be implemented in SET routines and;
; the implementation needs to return the control back to the caller of	;
; INT-XX then stack must be balanced properly before returning the	;
; control back to the caller of INT-XX.					;
;-----------------------------------------------------------------------;
        public  oem_set_int_40_flag
oem_set_int_40_flag:
	ret
;-----------------------------------------------------------------------;
        public  oem_clear_int_40_flag
oem_clear_int_40_flag:
	ret
;-----------------------------------------------------------------------;
        public  oem_set_int_13_flag
oem_set_int_13_flag:
	ret
;-----------------------------------------------------------------------;
        public  oem_clear_int_13_flag
oem_clear_int_13_flag:
	ret
;; PaiLin debug {
bios_revision_string	db	'PaiLin Huang is a kind of God.....',0
	public	show_bios_revision
show_bios_revision:
	push	cs
	pop	dx
	mov	bx,offset bios_revision_string		       
	ret
	
;; } PaiLin debug
;-----------------------------------------------------------------------;
;*****************************************************************;
;*****************************************************************;
;**                                                             **;
;**     (C)Copyright 1985-1995, American Megatrends Inc.        **;
;**                                                             **;
;**                     All Rights Reserved.                    **;
;**                                                             **;
;**             6145-F, Northbelt Parkway, Norcross,            **;
;**                                                             **;
;**             Georgia - 30071, USA. Phone-(770)-263-8181.     **;
;**                                                             **;
;*****************************************************************;
;*****************************************************************;
;-----------------------------------------------------------------------;
;			CHECK_CONTROLLER_PRESENCE			;
;-----------------------------------------------------------------------;
; Check point	: 83, 87, 91						;
; This routine checks for the presence of concerned IDE controller and	;
; is called from the following routines:				;
; *  CHECK_PRESENCE_OF_ATAPI_DEVICES at check point 83			;
;    during the checking of ATAPI device presence at POST.		;
; *  AUTO_HD_TYPE, DETECT_HDD_CDROM at check point 87			;
;    during the auto-detection of ATA/ATAPI devices at SETUP.		;
; *  AUTO_HD_TYPE, DETECT_HDD_CDROM at check point 91			;
;    during the auto-detection of ATA/ATAPI devices at POST.		;
; input :								;
;	BX	IDE controller base address (e.g. 1F0, 170, etc.)	;
;	DH	Drive selection parameter (A0 for Master, B0 for Slave)	;
;	stack	available						;
; output:								;
;	NC	controller present					;
;	CY	controller not present					;
; register usage : Do not destroy any register.				;
;-----------------------------------------------------------------------;
	extrn	fixed_delay:near
	extrn	read_status_reg:near
	extrn	select_drive_read_status:near
	public	check_controller_presence
check_controller_presence:
	pusha
	call	select_drive_read_status; select drive and read status reg
	cmp	al,0ffh
	jz	ccp_00			; CY, controller not found
;  reading of status register return a non-FF value
	mov	cx,350			; time out 21ms (350*60us=21000us=21ms)
ccp_01:
	mov	ah,al			; save current status in AH
	push	cx
	mov	cx,04h			; 60us delay
	call	fixed_delay
	pop	cx
	call	read_status_reg		; read status register
	test	al,80h			; controller free ?
	jz	ccp_02			; yes, so controller present
;  status register return a non-FF value and controller is not free (bit7 = 1)
	or	al,ah
	and	al,11001001b		; keep bits7,6,3,0
	cmp	al,11001001b
	loopnz	ccp_01			; continue checking
	jnz	ccp_02			; bus not floating, controller present
;  bus may be floating, do R/W test on 1x6
	mov	al,dh
	push	dx
	mov	dx,bx
	add	dx,06h			; 1x6
	push	dx
	out	dx,al			; 1x6 <- drive selection parameter
	mov	cx,0004h		; 60us io delay
	call	fixed_delay
	sub	dx,04h			; 1x2
	mov	al,0ffh
	out	dx,al
	io_delay			; 1x2 <- FF
	pop	dx			; 1x6
	in	al,dx			; read 1x6
	pop	dx
	cmp	al,dh			; R/W on 1x6 successful ?
	jnz	ccp_00			; no, controller not present
ccp_02:
	clc
ccp_exit:
	popa
	ret
ccp_00:
	stc				; CY, controller not found
	jmp	short ccp_exit
;-----------------------------------------------------------------------;
;				CPU_FREQ_TABLE				;