📄 oemrun.asm
字号:
page ,132
title OEM RUNTIME HOOKS
;-----------------------------------------------------------------------;
; This file is derived from RUNTIME.ASM and NRUNTIME.ASM files. ;
; ======================== NOTE === NOTE === NOTE ===================== ;
; If the routine name in this file starts with "OEM_", then this routine;
; is called from the corresponding generic chipset hook (in RUNTIME.ASM ;
; or NRUNTIME.ASM file). For example, OEM_SET_INT_40_FLAG routine is ;
; called from SET_INT_40_FLAG hook in RUNTIME.ASM file. ;
; ======================== NOTE === NOTE === NOTE ===================== ;
; If the routine name in this file does not start with "OEM_", then this;
; routine is called directly from Core file. For example, NMI_PARITY_CHECK
; is called from core file INT2.ASM. ;
;-----------------------------------------------------------------------;
; NOTE: Do not destroy EBP,FS,GS,SS,DS,ES unless otherwise specified. ;
;-----------------------------------------------------------------------;
;*****************************************************************;
;*****************************************************************;
;** **;
;** (C)Copyright 1985-1996, American Megatrends, Inc. **;
;** **;
;** All Rights Reserved. **;
;** **;
;** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
;** **;
;** Phone (770)-246-8600 **;
;** **;
;*****************************************************************;
;*****************************************************************;
;*****************************************************************;
; $Header: /BIOS/OEM/GENERIC/630/Intel/440BX/Desktop CR/OEMPORT/OEMRUN.ASM 1 9/15/97 5:57p Juand $
;
; $Revision: 1 $
;
; $Date: 9/15/97 5:57p $
;*****************************************************************;
;*****************************************************************;
; Revision History
; ----------------
; $Log: /BIOS/OEM/GENERIC/630/Intel/440BX/Desktop CR/OEMPORT/OEMRUN.ASM $
;
; 1 9/15/97 5:57p Juand
;
; 1 9/11/97 6:41p Juand
;
; 1 6/05/97 12:43p Debkumar
;
; 3 3/05/97 11:53a Debkumar
; OEM_POWER_ON_INIT hook added.
;
; 2 2/04/97 3:09p Debkumar
; GET_HD_STANDBY_VALUE routines for PM,PS,SM,SS moved to OEMRUN.ASM file
; from OEMPOST.ASM file.
;
; 1 1/31/97 1:15p Debkumar
; New files for 62700.
;
; 2 1/14/97 3:07p Debkumar
; Check_Controller_Presence routine is moved to this file from
; NRUNTIME.ASM.
;
; 1 1/13/97 2:22p Debkumar
; New file for 6.27.00.
;
;*****************************************************************;
;---------------------------------------;
include mbiosmac.mac
include mbiosequ.equ
include cf.equ
include setupequ.ext
include makeflag.equ
;---------------------------------------;
extrn _high_speed_chipset:byte
extrn _led_on_8042 :byte
extrn _cache_on_chipset:byte
extrn _ctrl_alt_plus :byte
extrn _low_speed_chipset:byte
extrn _led_off_8042 :byte
extrn _cache_off_chipset:byte
extrn _ctrl_alt_minus :byte
extrn _ctrl_alt_setup :byte
extrn enable_internal_cache:near
extrn disable_internal_cache:near
extrn enable_l1_cache:near
extrn disable_l1_cache:near
extrn flush_internal_cache :near
extrn enable_l2_cache:near
extrn disable_l2_cache:near
extrn low_speed:near
extrn high_speed:near
extrn check_cmos_data:near
extrn cmos_data_in:near
extrn cmos_data_out:near
extrn cmos_data_in_x:near
extrn cmos_data_out_x:near
extrn enable_disable_nmi:near
extrn e000_read_rom_write_x:near
extrn f000_read_rom_write_x:near
;---------------------------------------;
cgroup group _text
_text segment word public 'CODE'
assume cs:cgroup
.486p
;---------------------------------------;
public _OEM_RUNTIME_STARTS
_OEM_RUNTIME_STARTS label byte ; marks start of module
;-----------------------------------------------------------------------;
; INT-15.ASM MODULE ;
; this routine is called from SPECIAL_INT_15 in NRUNTIME.ASM. ;
; support any OEM specific int-15 function if any. if you do not have ;
; any OEM special func, simply return control to SPECIAL_INT_15 by RET. ;
; otherwise balance stack, implement the OEM special functions and ;
; return control to caller of INT-15 by IRET or RET 2. ;
;=======================================================================;
; EXAMPLE: INT15 function to GATE-A20 support. ;
; input : (ah) 24h ;
; (al) 03h ;
; output: (ah) return code ;
; 00h successful ;
; 86h function not supported ;
; (NC) successful ;
; (CY) unsuccessful ;
; if successful ;
; (bx) bit 0..0 = GateA20 not supported on 8042;
; 1 = GateA20 supported on 8042 ;
; bit 1..0 = GateA20 not supported with ;
; bit-1 of I/O port 92H ;
; 1 = GateA20 supported with bit-1 ;
; of I/O port 92H ;
; Let us assume the chipset concerned has the support for GateA20 thru' ;
; bit-1 of I/O port 92H. In this case OEM_SPECIAL_INT_15 shoule be like ;
; as follows: ;
; ;
; oem_special_int_15: ;
; cmp ah,24h ; func# 24h ? ;
; jnz si15_00 ; no.. ;
; cmp al,03h ; subfunc# 03h ? ;
; jnz si15_00 ; no.. ;
; POP BX ; ===VERY VERY IMPORTANT=== ;
; ; discard return address to SPECIAL_INT_15 routine ;
; POP BX ; ===VERY VERY IMPORTANT=== ;
; ; discard return address to BIOS INT15 ISR ;
; mov bx,02h ; bit 1 = 1..GateA20 thru' bit-1;
; ; of I/O port 92H ;
; sti ; enable interrupt ;
; xor ah,ah ; AH = 00..successful ;
; ; NC..successful ;
; x?? proc far ;
; ret 0002 ;
; x?? endp ;
; ;
; si15_00: ;
; ret ;
;-----------------------------------------------------------------------;
; OEM_SPECIAL_INT_15 ;
;-----------------------------------------------------------------------;
; input : ;
; AH function# ;
; stack available ;
; register usage : do not destroy any register other than the registers;
; having output values. ;
;-----------------------------------------------------------------------;
public oem_special_int_15
oem_special_int_15:
cmp ax,2403h
jnz si15_00 ; no.. ;
POP BX ; ===VERY VERY IMPORTANT=== ;
; discard return address to SPECIAL_INT_15 routine ;
POP BX ; ===VERY VERY IMPORTANT=== ;
; discard return address to BIOS INT15 ISR ;
mov bx,01h ; bit 0 = 1..GateA20 thru keyboard
sti ; enable interrupt ;
xor ah,ah ; AH = 00..successful ;
; NC..successful ;
x?? proc far ;
ret 0002 ;
x?? endp ;
;
si15_00: ;
ret
;-----------------------------------------------------------------------;
; NMI_PARITY_CHECK ;
;-----------------------------------------------------------------------;
; this routine is always called whenever an INT-2 (NMI) is generated. ;
; this routine can handle parity error by itself (according to the way ;
; it wants to handle NMI) or it can tell BIOS to handle NMI. ;
; input : ;
; AL [port 61h] at the time of generation of this NMI ;
; stack available ;
; NMI disabled ;
; output: ;
; NC BIOS will handle the NMI as usual ;
; CY this routine handles the NMI. when BIOS gets back control
; from this routine, BIOS will simply go back to caller. ;
; register usage : do not destroy any register ;
;-----------------------------------------------------------------------;
public nmi_parity_check
nmi_parity_check:
ret
;-----------------------------------------------------------------------;
; DISPLAY_PARITY_ADDRESS ;
;-----------------------------------------------------------------------;
; this routine is called when an NMI is generated and NMI_PARITY_CHECK ;
; hook returns NC and parity checking is enabled. this routine is to ;
; display the address at which parity error happened. if you do not have;
; any special action simply return. some chipset latches the address of ;
; parity error. in this case, write the routine to display the parity ;
; error address on the screen and then return. on return from this ;
; routine, system will be HALTED. ;
; input : ;
; none ;
; stack available ;
; register usage : can destroy any register except SS, SP ;
;-----------------------------------------------------------------------;
public display_parity_address
display_parity_address:
ret
;-----------------------------------------------------------------------;
; OEM_PREPARE_CHIPSET_FOR_FLASH_PROGRAMMING ;
;-----------------------------------------------------------------------;
; This routine is called from PREPARE_CHIPSET_FOR_FLASH_PROGRAMMING ;
; routine before flash programming. This function is used by Flash ;
; program utility AMIFLASH. ;
; This routine is called from PREPARE_CHIPSET_FOR_FLASH_PROGRAMMING ;
; after ;
; 1. external cache and internal cache are disabled. ;
; 2. power management is disabled. ;
; 3. all shadow rams are disabled. ;
; 4. E000 and F000 ROMand ROMCS are enabled. ;
; input : ;
; none ;
; stack available ;
; output: ;
; none ;
; register usage : Do not destroy any register ;
;-----------------------------------------------------------------------;
public oem_prepare_chipset_for_flash_programming
oem_prepare_chipset_for_flash_programming:
ret
;-----------------------------------------------------------------------;
; OEM_POWER_ON_INIT ;
;-----------------------------------------------------------------------;
; this routine is invoked from POWER_ON_INIT routine which get control ;
; just after bios gets control at F000:FFF0 in shadow ram. ;
; NOTHING IS DEFINED (except EDX) ON ENTRY TO THIS ROUTINE. ;
; input : ;
; edx cpu id if hard reset ;
; ss = cs ;
; stack not available ;
; output: ;
; none ;
; register usage : can destroy any register except EDX, SS ;
; Note: This routine can be used to implement any OEM specific stuff at;
; power on like resume from 5V suspend, etc. ;
; This routine should go back to OEM_POWER_ON_INIT_END label ;
; using a JMP instruction. ;
;-----------------------------------------------------------------------;
public oem_power_on_init
extrn oem_power_on_init_end:near
oem_power_on_init:
jmp oem_power_on_init_end
;-----------------------------------------------------------------------;
; OEM_DISABLE_ALL_CACHE ;
;-----------------------------------------------------------------------;
; check_point : 05 ;
; this routine must disable cache at this time, if system has external ;
; cache. ;
; input : ;
; stack available ;
; register usage : can destroy any register except DS, ES, EBP ;
; 1. this routine should disable both internal and external cache. ;
;-----------------------------------------------------------------------;
extrn generate_hard_reset:near
extrn get_processor_info:near
extrn copy_control_to_ram:near
extrn f000_read_rom_write_x:near
public oem_disable_all_cache
oem_disable_all_cache:
ret
;-----------------------------------------------------------------------;
; GET_HD_STANDBY_VALUE_PM ;
;-----------------------------------------------------------------------;
; check point : 91 ;
; this routine is called from hard_disk_setup during POST from HI.ASM. ;
; is used to return standby timer value for primary master hard disk. ;
; input : ;
; SS 0030H ;
; DS 0040H ;
; ES 0000H ;
; stack available ;
; output: ;
; al hard disk standby timer value in unit of 5sec ;
; NOTE: a zero (00) value indicates that standby feature ;
; is disabled. ;
; register usage : can destroy any register except EBP,DS,ES,FS,GS ;
; NOTE: the following may need to be modified to return the timer value ;
; properly according to setup option in case cmos register is used in ;
; setup to make this timer value user selectable. ;
;-----------------------------------------------------------------------;
; GET_HD_STANDBY_VALUE_PS ;
;-----------------------------------------------------------------------;
; check point : 91 ;
; this routine is called from hard_disk_setup during POST from HI.ASM. ;
; is used to return standby timer value for primary slave hard disk. ;
; input : ;
; SS 0030H ;
; DS 0040H ;
; ES 0000H ;
; stack available ;
; output: ;
; al hard disk standby timer value in unit of 5sec ;
; NOTE: a zero (00) value indicates that standby feature ;
; is disabled. ;
; register usage : can destroy any register except EBP,DS,ES,FS,GS ;
; NOTE: the following may need to be modified to return the timer value ;
; properly according to setup option in case cmos register is used in ;
; setup to make this timer value user selectable. ;
;-----------------------------------------------------------------------;
; GET_HD_STANDBY_VALUE_SM ;
;-----------------------------------------------------------------------;
; check point : 91 ;
; this routine is called from hard_disk_setup during POST from HI.ASM. ;
; is used to return standby timer value for secondary master hard disk. ;
; input : ;
; SS 0030H ;
; DS 0040H ;
; ES 0000H ;
; stack available ;
; output: ;
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