eioroute.asl

<BIOS研发技术剖析>书的源代码,包括完整的BIOS汇编语言源程序.

//**********************************************************************;
//     *****************************************************************;
//     *****************************************************************;
//     **                                                             **;
//     **      (C)Copyright 1985-1996, American Megatrends, Inc.      **;
//     **                                                             **;
//     **                     All Rights Reserved.                    **;
//     **                                                             **;
//     **           6145-F Northbelt Pkwy, Norcross, GA 30071         **;
//     **                                                             **;
//     **                     Phone [phone]                    **;
//     **                                                             **;
//     *****************************************************************;
//     *****************************************************************;
//**********************************************************************;
//**********************************************************************;
// $Header: /BIOS/PORTING/ALEXP/INCLUDE.ASL/PCIDEV/PIIX4/EIOROUTE.ASL 6     5/07/98 1:31p Alexp $
//
// $Revision: 6 $
//
// $Date: 5/07/98 1:31p $
//**********************************************************************;
	OperationRegion(\_SB.NRTH.SBRG.PIX2, PCI_Config, 0x90, 0x02)
	Field(\_SB.NRTH.SBRG.PIX2,ByteAcc,NoLock,Preserve){
			TDMA,16,	// Type of DMA CH 0-3
//			DMA0,8,		// Type of DMA CH 0-3
//			DMA1,8,		// Type of DMA CH 4-7
	}

	OperationRegion(\_SB.NRTH.SBRG.PIX3, PCI_Config, 0xB0, 0x01)
	Field(\_SB.NRTH.SBRG.PIX3,ByteAcc,NoLock,Preserve){
			GCFG,8,			// #B0h General Config Register
	}

	OperationRegion(\_SB.NRTH.PMU.PIX4, PCI_Config, 0x50, 0x4)
	Field(\_SB.NRTH.PMU.PIX4,ByteAcc,NoLock,Preserve){
			DACK,32,		// #50h-52h
			}			// DACKx enbl to reload idle timer

	OperationRegion(\_SB.NRTH.PMU.PIX5, PCI_Config, 0x50, 0x30)
	Field(\_SB.NRTH.PMU.PIX5,ByteAcc,NoLock,Preserve){
			DCK0,8,		// #50h DACKx enbl to reload idle timer
			DCK1,8,         // #51
			DCK2,8,         // #52
			Offset(0x0c),
			RSA0,8,		// #5Ch Device Resource A
			RSA1,8,
			RSA2,8,
			RSA3,8,
			RSB0,16,	// #60h Device Resource B
//			RSB1,8,
			RSB2,8,
			RSB3,8,
			RSC0,16,	// #64h Device Resource C
//			RSC1,8,
			RSC2,8,
			RSC3,8, 	// #67h
			GDR2,16,	// #68h Generic Device 2 I/O
			GDM2,8,		// #6Ah Generic Device 2 Monitoring
			,40,
			GDR3,16,	// #70h Generic Device 3 I/O
			GDM3,8,		// #72h Generic Device 3 Monitoring
			,40,
			GDR4,16,	// #78h Generic Device 4 I/O
			GDM4,8,		// #7Ah Generic Device 4 Monitoring
			,8,
			GDR5,16,	// #7Ch Generic Device 5 I/O
			GDM5,8,		// #7Eh Generic Device 5 Monitoring
			}
// Route and Release I/O, DMA resources to EIO Bus

// Standart Port Base Table
Name(STBL,Package(){
	Package(){},  // Device       - 00
	Package(){},  // Device       - 01
	Package(){},  // Device       - 02
	Package(){},  // Device       - 03
		      // AudioDevice  - 04
	Package()  {0x220, 0x240, 0x260, 0x280,  // Sound Blaster
		    0x300, 0x310, 0x320, 0x330,  // MIDI
		    0x530, 0x604, 0xe80, 0xf40,  // Microsoft Sound
		    0x200},                      // Game Port
		     // FDD Device   - 05
//        Package()  {0x3f2, 0x372},
	Package()  {0x3f0, 0x370},
		     // UART1 Device - 06
	Package()  {0x3f8, 0x2f8, 0x220, 0x228, 0x238, 0x2e8, 0x338, 0x3e8},
		     // UART2 Device - 07
	Package()  {0x3f8, 0x2f8, 0x220, 0x228, 0x238, 0x2e8, 0x338, 0x3e8},
		     // LPT Device   - 08
	Package()  {0x3bc, 0x378, 0x278}
	})           // End of Standart Port Base Table

//  Standard Device Resource Table
//  --------------------------
//  EIOEnRegister(db) 哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪哪