📄 oemdsdt.as_
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DefinitionBlock (
"OEMDSDT.AML",
"DSDT",
0x01,
"SiS", // OEM ID (6 byte string)
"530", // OEM table ID (8 byte string)
0x1000 // OEM version of DSDT table (4 byte Integer)
)
//--------------------------------------------------------------------------
// BEGIN OF ASL SCOPE
//--------------------------------------------------------------------------
{
Scope(\_PR) { // BEGIN PROCESSOR PACKAGE
Processor( CPU1,
// ProcessorID (unique for each CPU)
1,
// PBlockAddress
0x40c,
// PBlockLength hardwired to 6 byte
0x06
){}
} // end CPU scope
// Value to be set in SLP_TYP register
Name(\_S0, Package(4){0,0,0,0}) // working state on this chip set
Name(\_S1, Package(4){1,0,0,0}) // Power on suspend with CPU context maintained.
Name(\_S5, Package(4){5,0,0,0}) // Soft Off
// MCTH(Str1, Str2) - Compare Str1 and Str2.
Method(MCTH, 2)
{
// Returns One if Str1 <> Str2
// Returns Zero if Str1 == Str2
//1. If Length str1 < Str2 - Return (Err)
If(LLess(Sizeof(Arg0), Sizeof(Arg1)))
{
Return(0)
}
//2. Convert str1 & str2 into buffer with length of str2
// Local0 contains length of string + NULL.
//
Add(Sizeof(Arg0), 1, Local0)
Name(BUF0, Buffer(Local0) {})
Name(BUF1, Buffer(Local0) {})
Store(Arg0, BUF0)
Store(Arg1, BUF1)
While(Local0)
{
Decrement(Local0)
If(LEqual(Derefof(Index(BUF0, Local0)), Derefof(Index(BUF1, Local0))))
{ }
Else
{ Return(Zero) }
}
Return(One) // Str1 & Str2 are match
}
//-----------------------------------------------------------------------
// System Bus scope
//-----------------------------------------------------------------------
Scope(\_SB){
Name(APIC, 0) // 0-PIC mode
// 1-APIC mode
Method(_PIC, 1)
{
Store(Arg0, APIC)
}
//-----------------------------------------------------------------------
// PCI ROOT (NORTH) BRIDGE
//-----------------------------------------------------------------------
Device(PCI0) { // Start of Root PCI Bus
Name(_HID, EISAID("PNP0A03")) // PnP ID for PCI Bus
Name(_ADR, 0x0000) // Root Bus is Bus # 0
Name(_BBN, 0) // PCI 0 Bus device address
Name(CRS, //
ResourceTemplate()
{
// Tag 0 Bus Number Resources
WORDBusNumber(
ResourceProducer, // bit 0 of general flags 1
MinFixed, // Range fixed
MaxFixed, // Range fixed
PosDecode, // Positive Decode
0x00, // Granularity
0x00, // Min
0xff, // Max
0x00, // Translation
0x0100 // Range Length = Max-Min+1
)
// Tag 1 Consumed Resources
IO(Decode16, 0xCF8, 0xCF8, 1, 8)
// Tag 2 Consumed-&-Produced Resources(I/O Window 1)
// all I/O below CF8
WORDIO(
ResourceProducer, // bit 0 of general flags 0
MinFixed, // Range fixed
MaxFixed, // Range fixed
PosDecode, // Positive Decode
EntireRange,
0x00, // Granularity A = 0x0
0x00, // Min
0x0CF7, // Max
0x00, // Translation
0x0CF8 // Range Length
)
// Tag 3 Consumed-&-Produced Resources(I/O Window 2)
// all I/O above CFF
WORDIO(
ResourceProducer, // bit 0 of general flags 0
MinFixed, // Range is not fixed
MaxFixed, // Range is not fixed
PosDecode, // Positive Decode
EntireRange,
0x00, // Granularity
0x0D00, // Min
0xffff, // Max
0x00, // Translation
0xf300 // Range Length
)
// Tag 4 Consumed-&-Produced Resources(Memory Window 1)
// Descriptor for video RAM behind ISA bus
DWORDMemory(
ResourceProducer, // bit 0 of general flags 0
PosDecode,
MinFixed, // Range is not fixed
MaxFixed, // Range is not fixed
Cacheable,
ReadWrite,
0x0, // Granularity
0x0a0000, // Min
0x0bffff, // Max
0x00, // Translation
0x020000 // Range Length
)
// Tag 5 Consumed-&-Produced Resources(Memory Window 2)
// for device ROMs for ISA plugins devices
// OEM specific
DWORDMemory(
ResourceProducer, // bit 0 of general flags 0
PosDecode,
MinFixed, // Range is not fixed
MaxFixed, // Range is not fixed
Cacheable,
ReadWrite,
0x0, // Granularity
0x0cb000, // Min
0x0dffff, // Max
0x00, // Translation
0x015000 // Range Length
)
// Tag 6 Consumed-&-Produced Resources(Memory Window 3)
DWORDMemory(
ResourceProducer, // bit 0 of general flags 0
PosDecode,
MinFixed, // Range is not fixed
MaxFixed, // Range is not fixed
Cacheable,
ReadWrite,
0x0, // Granularity
0x020000000, // Min 512M (calculated dinamically)
0xffdfffff, // Max 4Gb-2Mb
0x00, // Translation
0xDFE00000, // Range Length
// (4G-2M)-TOM (calculated dinamically)
,
,
MEM6 // Name declaration for this descriptor
)
}
) // end of CRS
// PCI North bridge specific code
Include(".\\oemport\\acpi.asl\\sis530.asl")
Name(FLAG, 1) // PCI Bus access Flag
// Reset flag if test NT 5.0
Name(OSFL, 1) // Curernt OS name 1 - Win 98
// 0 - NT 5.0
Method(_INI, 0)
{
// Detect SuperIO devices present onboard
\_SB.PCI0.SBRG.IODT()
// Detect currently running OS
If(MCTH(\_OS, "Microsoft Windows")) // Is the running OS - Win98?
{ }
Else // It is not Win 98 (it's NT 5.0)
{
Store(0, OSFL)
}
}
Method(_REG, 2) // is PCI Config space accessible as OpRegion?
// _REG to update FLAG status
{
If(LEqual(Arg0, 0x2))
{
Store(Arg1, FLAG)
}
}
Method(_CRS, 0) // PCI 0 Bus resources
{
CreateDwordField(CRS, \_SB.PCI0.MEM6._MIN, TMEM) // Top of memory
CreateDwordField(CRS, \_SB.PCI0.MEM6._LEN, TLEN) // 4G-TOM
// MDET Control Method
// returns available system memory
Store(MDET(), TMEM) // MDET defined in a \_SB.PCI0 scope
Subtract(0xffe00000, TMEM, TLEN)// Local(4G - 2M)-TOM
Return(CRS)
} // end PCI _CRS
//-----------------------------------------------------------------------
// PCI IRQ ROUTING TABLE (PRT)
//-----------------------------------------------------------------------
Name(_PRT, Package() { // Table applies in PIC mode
//-----------------------------------------------------------------------
Package(){0x01ffff, 0, LNKU, 0},
// Slot 1
Package(){0x09ffff, 0, LNKA, 0},
Package(){0x09ffff, 1, LNKB, 0},
Package(){0x09ffff, 2, LNKC, 0},
Package(){0x09ffff, 3, LNKD, 0},
// Slot 3
Package(){0x0bffff, 0, LNKC, 0},
Package(){0x0bffff, 1, LNKD, 0},
Package(){0x0bffff, 2, LNKA, 0},
Package(){0x0bffff, 3, LNKB, 0},
// Slot 4
Package(){0x0affff, 0, LNKD, 0},
Package(){0x0affff, 1, LNKA, 0},
Package(){0x0affff, 2, LNKB, 0},
Package(){0x0affff, 3, LNKC, 0},
// Device 1, IRQA
Package(){0x02ffff, 0, LNKA, 0},
// Device 1, IRQB
Package(){0x02ffff, 1, LNKB, 0},
//-----------------------------------------------------------------------
} )
//-----------------------------------------------------------------------
// PCI-ISA (SOUTH) BRIDGE
//-----------------------------------------------------------------------
Device(SBRG) {
Name(_ADR, 0x010000)
// PCI interrupt routing devices
Name(\_SB.IPRS, // List of possible IRQs
// to be returned by _PRS for LINKx devices
ResourceTemplate()
{
StartDependentFnNoPri()
{
IRQ(Level, ActiveLow, Shared ) {3,4,5,6,7,9,10,11,12,14,15} // 3,4,5,6,7,9,10,11,12,14,15
}
EndDependentFn()
})
Include(".\\oemport\\acpi.asl\\irq-pci.asl")
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