📄 post.asm
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mov dx,MKF_PM_BASE_ADDRESS+30h; Clear SMI status
in al,dx ;
jmp short $+2
jmp short $+2
out dx,al ;
;
mov dx,MKF_PM_BASE_ADDRESS+31h; Clear SMI ENABLE
mov al,0h ;
out dx,al ;
;;default is c0 for checkit rtc alarm test
mov ax,0c0feh
call cmos_data_out_x ; write cmos reg 7eh
inc ax
call cmos_data_out_x ; write cmos reg 7fh
mov al,Q_RESUME_BY_RTC
call get_cmos_item
jz check_rtc_power_on_done
mov bh,03h
call read_apc_cmos
or bl,04h
call write_apc_cmos
check_rtc_power_on_done:
mov bh,03h
call read_apc_cmos
and bl,not 30h
mov al,Q_RING_ON
call get_cmos_item
shl al,4
or bl,al
call write_apc_cmos
mov ah, 070h
call read_sio_byte
or al, 01000000b
call write_sio_byte
;------------------------------------------
mov bh,05h
call read_apc_cmos
and bl,not 20h
mov al,q_hotkey
call get_cmos_item
jz set_hot_key_apc_cmos
or bl,20h
set_hot_key_apc_cmos:
call write_apc_cmos
mov al,Q_GRAPHIC_WIN
call get_cmos_item
shl al,4
mov bl,al
mov ah,094h
call read_pci_byte
and al,10001111b
or al,bl
call write_pci_byte
call oem_detect_l2_cache
ci_exit:
mov al,0b3h
call cmos_data_in
and al,01h
mov bl,al
; BL = L2 cache sizing status
ret
set_rtc_cmos:
call get_cmos_item
aam
shl ah,4
or ah,al
mov al,bh
call cmos_data_in_x
and al,bl
or ah,al
mov al,bh
call cmos_data_out_x
ret
;; Input: BH = APC Register Index
;; Output:BL = Value
;; Destroy: AL, BL
public read_apc_cmos
read_apc_cmos:
pushf
call open_apc_cmos
mov al,bh
call cmos_data_in_x
mov bl,al
call close_apc_cmos
popf
ret
;; Input: BH = APC Register Index
;; BL = Value
;; Output: None
;; Destroy: AX
write_apc_cmos:
pushf
call open_apc_cmos
mov ax,bx
xchg al,ah
call cmos_data_out_x
call close_apc_cmos
popf
ret
;-----------------------------------------------------------------------;
; DO_MEMORY_SIZE ;
;-----------------------------------------------------------------------;
; check_point : 57 ;
; This routine can be used for any base/extended memory size adjustment ;
; for memory hole programming, etc. before setup is called. ;
; input : ;
; SS 0030H ;
; DS 0040H ;
; ES 0000H ;
; stack available ;
; [0040H:0013H] base memory in KB as found in memory test
; [cmos reg 30h,31h] extd memory in kb as found in memory test
; [cmos reg 35h,36h] extd memory in 64kb as found in memory test
; register usage : can destroy any register except EBP,DS,ES,FS,GS ;
; NOTE : 1. Progarm chipset registers for memory hole only. ;
; 2. Update cmos register 17h,18h,30h,31h,35h,36h properly. ;
; 3. Update cmos checksum. ;
;-----------------------------------------------------------------------;
extrn oem_do_memory_size:near
public do_memory_size
do_memory_size:
; Do chipset specific generic stuff
call check_cmos_8e ;CMOS checksum good ?
jnz skip_adjust_mem_cmos ;No, Exit
; Adjust base memory
mov ah, ds:byte ptr [13h]
mov al, 95h ;Write CMOS 15h
call cmos_data_out_x
mov ah, ds:byte ptr [14h]
mov al, 96h ;Write CMOS 16h
call cmos_data_out_x
mov ax, 97B0h ;Read cmos reg 30h
call cmos_data_in_x
xchg al, ah ;Write cmos reg 17h
call cmos_data_out_x
mov ax, 98B1h ;Read cmos reg 31h
call cmos_data_in_x
xchg al, ah ;Write cmos reg 18h
call cmos_data_out_x
;; Recalculate the CMOS checksum
; call update_stnd_cmos_checksum
; call update_extd_cmos_checksum
mov ax,Q_CLEAR_NVRAM
extrn set_cmos_item_checksum:near
call set_cmos_item_checksum
skip_adjust_mem_cmos:
; Do OEM specific stuff if any
call oem_do_memory_size ; in OEMPOST.ASM
ret
;-----------------------------------------------------------------------;
; PROGRAM_PARAMETERS_AFTER_SETUP ;
;-----------------------------------------------------------------------;
; check_point : 8C ;
; This routine can be used to do any programming even if cmos setup is ;
; not executed. ;
; input : ;
; SS 0030H ;
; DS 0040H ;
; ES 0000H ;
; stack available ;
; register usage : can destroy any register except EBP,DS,ES,FS,GS ;
; NOTE: 1. program setup selected parameters including non-cacheable ;
; regions. ;
; 2. use check_cmos_data routine to get the value of any selected ;
; parameters. ;
; 3. Leave all Shadow RAM regions as non-cacheable here. This is ;
; done in program_ws_shadow_cacheable. ;
;-----------------------------------------------------------------------;
extrn get_processor_info:near
extrn oem_program_parameters_after_setup:near
public program_parameters_after_setup
program_parameters_after_setup:
; (CORE0210+)>
ifdef MKF_CNVRAM
if MKF_CNVRAM
extrn cmos_to_cnvram:near
call cmos_to_cnvram
endif; if MKF_CNVRAM
endif; ifdef MKF_CNVRAM
; <(CORE0210+)
; Do chipset specific generic stuff
;
; Program Setup Options
;
; call check_cmos_8e ;CMOS checksum good ?
; jnz short ppas_skip_setup_prog ;No, do not program Setup Options
;; Set USB controller enable/disable from CMOS SETUP
mov al,Q_USB_FUNCTION_ENABLE
call get_cmos_item
jnz usb_still_enable
mov ax,2f02h ; Stop USB Host controller
CALL_RT_FUNCTION
;; Disabled USB Command
mov ax, 0400h
call write_usb_byte
;; Disabled USB Controller & PIRQ
mov ax, 06280h
call write_sio_byte
usb_still_enable:
call oem_program_parameters_after_setup
ppas_skip_setup_prog:
ret
;-----------------------------------------------------------------------;
; PROGRAM_WS_SHADOW_CACHEABLE ;
;-----------------------------------------------------------------------;
; check point : A4 ;
; This routine is used to do any time dependent programming e.g. wait ;
; state and to program the Shadow RAM caheability except system BIOS ;
; F000 shadow ram cacheability (F000 shadow ram cacheability is done in ;
; COPY_RUNTIME_BIOS hook). ;
; input : ;
; SS 0030H ;
; DS 0040H ;
; ES 0000H ;
; stack available ;
; register usage : can destroy any register except EBP,DS,ES,FS,GS ;
;-----------------------------------------------------------------------;
reg_struc struc
setup_Q db (?)
reg_index db (?)
mask_value db (?)
sis_dev_func_number dw (?)
reg_struc ends
extrn oem_program_ws:near
extrn program_ws_table_start:byte
extrn program_ws_table_end:byte
public program_ws_shadow_cacheable
program_ws_shadow_cacheable:
; Do chipset specific generic stuf
; call check_cmos_8e ;CMOS checksum good ?
; jnz short pwsc_skip_setup_prog ;No, do not program Setup
mov si,offset cgroup:program_ws_table_start
pcow_00:
mov al,cgroup:(reg_struc ptr [si]).setup_Q
call get_cmos_item ;; al = value
mov bl,al ;; save in bl
movzx cx,cgroup:(reg_struc ptr [si]).mask_value
mov ah,cgroup:(reg_struc ptr [si]).reg_index
mov bh,cgroup:(reg_struc ptr [si]).mask_value
mov dx,cgroup:(reg_struc ptr [si]).sis_dev_func_number
call read_chip_byte_x ;; al = current chip reg value
bsf cx,cx ;;get how many bit to shl
not bh
and al,bh ;; mask corresponding bit
shl bl,cl ;;get the cmos and adjust to or
or al,bl ;;set corresponding bit
mov dx,cgroup:(reg_struc ptr [si]).sis_dev_func_number
call write_chip_byte_x
skip_load_value:
add si, TYPE (reg_struc) ;; next
cmp si, offset cgroup:program_ws_table_end
jb pcow_00
mov ah,81h ; A2's setting
call read_pci_byte
and al,not 0c0h
or al,80h
call write_pci_byte
mov ah,82h
call read_pci_byte
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