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📄 runtime.asm

📁 <BIOS研发技术剖析>书的源代码,包括完整的BIOS汇编语言源程序.
💻 ASM
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        shr     cl,4                    ;; bit-2,1
	mov	esi,256*512
        shl     esi,cl                  ;; Get twice size of cache.
	mov	ecx,100000h		;; 1MB
        xchg    ecx,esi
        cld
	db	66h
        db	67h
        rep     lodsd

        call    comeback_from_flat_mode_stack

flush_external_cache_end:
        popad
        pop     es
        pop     ds
        popf
        ret
flush_sis596_L2         endp


;-----------------------------------------------------------------------;
;                               HIGH_SPEED                              ;
;-----------------------------------------------------------------------;
;  this routine changes to high speed using chipset programming.        ;
;  input :                                                              ;
;       none                                                            ;
;       stack   available                                               ;
;  output:                                                              ;
;       CX      0000..speed switching not done                          ;
;               FFFF..speed switching done                              ;
;  register usage : do not destroy any register except AX CX DX         ;
;                   remember to save 32-bit registers if used           ;
;-----------------------------------------------------------------------;
        public  high_speed
high_speed:
        xor     cx,cx                   ; speed switching not done
        ret


;-----------------------------------------------------------------------;
;                               LOW_SPEED                               ;
;-----------------------------------------------------------------------;
;  this routine changes to low speed using chipset programming.         ;
;  input :                                                              ;
;       none                                                            ;
;       stack   available                                               ;
;  output:                                                              ;
;       CX      0000..speed switching not done                          ;
;               FFFF..speed switching done                              ;
;  register usage : do not destroy any register except AX CX DX         ;
;                   remember to save 32-bit registers if used           ;
;-----------------------------------------------------------------------;
        public  low_speed
low_speed:
        xor     cx,cx                   ; speed switching not done
        ret


;-----------------------------------------------------------------------;
;                       ENABLE_FAST_GA20                                ;
;-----------------------------------------------------------------------;
;  this enables GateA20 line using fast Gate20 method. this routine is  ;
;  called only if Fast Gate A20 is enabled through BCP.                 ;
;  input :                                                              ;
;       none                                                            ;
;       stack   available                                               ;
;  output:                                                              ;
;       ZR      Gate20 enabled by this routine                          ;
;       NZ      Gate20 not enabled by this routine                      ;
; register usage : DO NOT destroy any register except AX, CX            ;
; NOTE: 1. if gateA20 is enabled by this routine, Core BIOS will        ;
;       not touch gateA20 anymore.                                      ;
;       2. if gateA20 is not enabled by this routine, Core BIOS         ;
;       will enable gateA20 thru' KBC.                                  ;
;-----------------------------------------------------------------------;
        public  enable_fast_ga20
enable_fast_ga20:
      or      sp,sp                   ; NZ = not done
      ret
;-------------------------------JD End-------------------------------
;        mov     al, 02h
;        out     92h, al
;        cmp     sp, sp                  ; (ZF) = 1
;        ret


;-----------------------------------------------------------------------;
;                       DISABLE_FAST_GA20                               ;
;-----------------------------------------------------------------------;
;  this disables GateA20 line using fast Gate20 method. this routine is ;
;  called only if Fast Gate A20 is enabled through BCP.                 ;
;  input :                                                              ;
;       none                                                            ;
;       stack   available                                               ;
;  output:                                                              ;
;       ZR      gate20 disabled by this routine                         ;
;       NZ      gate20 not disabled by this routine                     ;
; register usage : DO NOT destroy any register except AX, CX            ;
; NOTE: 1. if gateA20 is enabled by this routine, Core BIOS will        ;
;       not touch gateA20 anymore.                                      ;
;       2. if gateA20 is not enabled by this routine, Core BIOS         ;
;       will disable gateA20 thru' KBC.                                 ;
;-----------------------------------------------------------------------;
        public  disable_fast_ga20
disable_fast_ga20:
      or      sp,sp                   ; NZ = not done
      ret
;-------------------------------JD End-------------------------------
;        mov     al, 00h
;        out     92h, al
;        cmp     sp, sp                  ; (ZF) = 1
;        ret


;-----------------------------------------------------------------------;
;                       POWER_ON_INIT                                   ;
;-----------------------------------------------------------------------;
;  this routine is invoked just after bios gets control.                ;
;  NOTHING IS DEFINED (except EDX) ON ENTRY TO THIS ROUTINE.            ;
;  input :                                                              ;
;       edx     cpu id if hard reset                                    ;
;       ss      = cs                                                    ;
;       stack   not available                                           ;
;  output:                                                              ;
;       none                                                            ;
;  register usage : can destroy any register except EDX, SS             ;
;  Note: This routine can be used to implement resume from 5V suspend,  ;
;        etc.                                                           ;
;-----------------------------------------------------------------------;
        public  power_on_init
        public  oem_power_on_init_end
        extrn   power_on_init_end:near
        extrn   oem_power_on_init:near
power_on_init:
        jmp     oem_power_on_init       ; do any OEM specific stuff
oem_power_on_init_end:
        jmp     power_on_init_end
;-----------------------------------------------------------------------;
;                       DISABLE_ALL_CACHE                               ;
;-----------------------------------------------------------------------;
; check_point           : 05                                            ;
; this routine must disable cache at this time, if system has external  ;
; cache. in case of soft reset, this routine should disable all PCI     ;
; cards or generate a hard reset.                                       ;
; input :                                                               ;
;       stack   available                                               ;
; register usage : can destroy any register except  DS, ES, EBP         ;
; 1. this routine should disable both internal and external cache.      ;
; 2. in case of soft reset, this routine should generate hard reset. if ;
;    hard reset generation is NOT possible, the default code will start ;
;    BIOS fresh from ROM.                                               ;
;-----------------------------------------------------------------------;
        public  disable_all_cache
disable_all_cache:
;; if the external cache needs to be disabled first, use this code..
        call    disable_l2_cache        ; disable external cache
        call    disable_l1_cache        ; disable internal cache
        in      al,64h                  ; if sys_flag bit is set
        test    al,00000100b            ; then soft reset else power on
        jnz     dac_00                  ; soft reset, so generate hard reset
        ret
dac_00:
;  soft reset, so generate hard reset
;  following code disables all PCI cards and simulate hard reset. if
;  hard reset generation is possible (e.g. using CF9 port), generate hard
;  reset here............................................................
        jmp     generate_hard_reset_x   ; generate hard reset
;-----------------------------------------------------------------------;
;                       COPY_RUNTIME_BIOS                               ;
;-----------------------------------------------------------------------;
; check_point           : B1                                            ;
; This routine is called just before booting (issue of INT-19) after    ;
; displaying the system configurations.                                 ;
; Program system BIOS cacheability in this routine.                     ;
; input:                                                                ;
;       SS      0030H                                                   ;
;       DS      0040H                                                   ;
;       ES      0000H                                                   ;
;       stack   available                                               ;
; register usage : can destroy any register except EBP, DS, ES          ;
;-----------------------------------------------------------------------;
        public  copy_runtime_bios
copy_runtime_bios:

;; for power on by alarm
	mov	al,0feh
	call	cmos_data_in_x
	mov	ah,al
	mov	al,0ffh
	call	cmos_data_out_x

        sub     dx,dx

        ret

;-----------------------------------------------------------------------;
;                       GENERATE_HARD_RESET                             ;
;-----------------------------------------------------------------------;
; this routine is called from setup if system needs to reboot on exit   ;
; from setup. this routine is also called from INT-16 func FFh after    ;
; Flash programming to generate hard reset.                             ;
; so control will go back to caller only if hard reset generation is    ;
; not possible.                                                         ;
; input :                                                               ;
;       stack   available                                               ;
;       all other registers are undefined                               ;
; output:                                                               ;
;       none                                                            ;
; register usage : can destroy any register                             ;
; NOTE:                                                                 ;
; 1. this routine is invoked by CALL instruction.                       ;
; 2. CS should not be assumed as F000.                                  ;
; 3. this routine should disable internal cache                         ;
; (CALL DISABLE_L1_CACHE is already there).                             ;
; 4. if chipset also controls internal cache, chipset registers should  ;
; also be programmed to disable internal cache.                         ;
; 5. generate CPU hard reset.                                           ;
; 6. if CPU reset generation is NOT possible, just disable internal     ;
; cache and return.                                                     ;
;-----------------------------------------------------------------------;
        extrn   oem_disable_all_cache:near
	extrn	fixed_delay:near
	extrn	open_extend_cmos:near
	extrn	close_extend_cmos:near

memory_setup_qeustion	label byte
	db	q_cas_latency
	db	0

        public  generate_hard_reset
generate_hard_reset:

					; (CORE0210+)>
ifdef MKF_CNVRAM
if MKF_CNVRAM
	call	check_cmos_8e		; cmos good ?
	jnz	no_update		; no..
	call	cmos_to_cnvram
no_update:
endif;	if MKF_CNVRAM
endif;	ifdef MKF_CNVRAM
					; <(CORE0210+)

        call    disable_l1_cache        ; disable internal cache
generate_hard_reset_x:
        call    oem_disable_all_cache   ; OEM specific stuff

	mov	si,offset cgroup:memory_setup_qeustion
	sub	ax,ax
getmemorycmositem:
	db	2eh			; CS:
	lodsb
	or	al,al
	jz	memorysetupmirrordone
	call	get_cmos_item			
	shl	ah,1
	or	ah,al
	jmp	short getmemorycmositem

memorysetupmirrordone:
	mov	al,ah
	not	al
	shl	al,04h
	or	ah,al
	call	open_extend_cmos		;
	mov	al,80h				;
	call	cmos_data_out_x			;
	call	close_extend_cmos		;

;;=====================================================================;;
	mov	dx,3c4h
	mov	al,1
	out	dx,al
	jmp	short $+2
	inc	dx
	in	al,dx
	jmp	short $+2
	or	al,20h
	out	dx,al

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