pmsm3_4_4.c

电机矢量控制的程序。自己调试成功的。包括svpwm

/* ==============================================================================
System Name:  PMSM34

File Name:	PMSM3_4_4.C

Description:	Primary system file for the Real Implementation of Position Control
                Based Sensored Field Orientation Control for a Three Phase Permanent-
                Magnet Synchronous Motor (PMSM) using QEP sensor

Originator:		Digital control systems Group - Texas Instruments

Note: In this software, the default inverter is supposed to be DMC550 board. 
=====================================================================================
 History:
-------------------------------------------------------------------------------------
 04-15-2005	Version 3.20: Support both F280x and F281x targets 
 04-25-2005 Version 3.21: Move EINT and ERTM down to ensure that all initialization
 						  is completed before interrupts are allowed.

&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
该程序主要用于调试 SVPWM 频率和死区大小
&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&

=================================================================================  */
// 2008.12.10 调试 SVPWM 频率和死区大小
// 2008.12.11 ~ 2009.1.3 调试ADCCalibration及相应修改！
// 2009.01.03  gxuphh
// 增加PdpIntAISR中断功能，测试成功！
// 方法：进入中断后，使COMCONA[9] =0; PWM1/2/3/4/5/6, are in Hi-Z state.
//       PWM输出变为高阻态。
// 但还没有测试PDPINTA中断的优先级别

//2009.1.10 阶段I调试，并将伺服电机与系统连接，PDPINTA起作用，电机能正常运转！
//          要点：功率板上的RShunt电阻值要和功率模块的保护电路及电机额定工作电流匹配！

//2009.1.22 阶段II调试，将ADC校准和ADC整合！ADC校准作为单一函数在每次系统启动自检通过，
//    上电稳定后，在系统初始化阶段进行；线电流ADC启动和PWM同步，由T1UF启动。


// Include header files used in the main function

#include "target.h"
#include "DSP281x_Device.h"
#include "IQmathLib.h"
#include "pmsm3_4.h"
#include "parameter.h"
#include "build.h"
#include "sdf2812_user.h"
#include "math.h"
#include "stdio.h"
#include "DSP281x_Examples.h"
#include "ADCcalibrationDriver.h"


//****

//#include "example_nonBIOS.h"

// Allocate calibration driver variables:
ADC_CALIBRATION_DRIVER_VARS AdcCalibration;

// Prototype statements for functions found within this file.
interrupt void MainISR(void);    	// 主中断，周期10KHz。为电流环周期
interrupt void QepISR(void);		// 正交编码盘中断模块
interrupt void PdpIntAISR(void);  	// 逆变功率模块电源驱动保护中断
void ADCcalibration(ADC_CALIBRATION_DRIVER_VARS *AdcCalibration);			// 参考ADC通道（Hi-->A6; Lo-->A7）校正程序



//
Uint16 PdpIntAISR_CNT =0;
Uint16 QepISR_CNT =0;

// Global variables used in this system
float32 VdTesting = 0;            // Vd testing (pu) 

//float32 VqTesting = 0.25;         // Vq testing (pu)
float32 VqTesting = 0.30;         // Vq testing (pu)
 
float32 IdRef = 0;                // Id reference (pu) 
float32 IqRef = 0.2;              // Iq reference (pu) 
//float32 IqRef = 1;              // Iq reference (pu) 

//float32 SpeedRef = 0.15;          // Speed reference (pu) 
float32 SpeedRef = 0.30;          // Speed reference (pu)

float32 PositionRef = 0.5;      // Position reference (Mechanical rotor Anglele  (pu) 
float32 Ts = 0.001/ISR_FREQUENCY;  // Samping period (sec), see parameter.h 

Uint16 IsrTicker  = 0;
Uint16 BackTicker = 0;

int16 PwmDacCh1 = 0;
int16 PwmDacCh2 = 0;
int16 PwmDacCh3 = 0;

int16 DlogCh1 = 0;
int16 DlogCh2 = 0;
int16 DlogCh3 = 0;
int16 DlogCh4 = 0;


//volatile Uint16 EnableFlag = TRUE;
volatile Uint16 EnableFlag = FALSE;

Uint16 LockRotorFlag = FALSE;

Uint16 SpeedLoopPrescaler = 10;      // Speed loop prescaler
Uint16 SpeedLoopCount = 1;           // Speed loop counter

Uint16 PositionLoopPrescaler = 30;      // Position loop prescaler;  added in 2009.1.26
Uint16 PositionLoopCount = 1;           // Position loop counter;  added in 2009.1.26

// Instance a few transform objects
CLARKE clarke1 = CLARKE_DEFAULTS;
PARK park1 = PARK_DEFAULTS;
IPARK ipark1 = IPARK_DEFAULTS;

// Instance PID regulators to regulate the d and q synchronous axis currents,
// speed and position
PIDREG3 pid1_id = PIDREG3_DEFAULTS;
PIDREG3 pid1_iq = PIDREG3_DEFAULTS;
PIDREG3 pid1_pos = PIDREG3_DEFAULTS;
PIDREG3 pid1_spd = PIDREG3_DEFAULTS;

// Instance a PWM driver instance
PWMGEN pwm1 = PWMGEN_DEFAULTS;

// Instance a PWM DAC driver instance
PWMDAC pwmdac1 = PWMDAC_DEFAULTS;

// Instance a Space Vector PWM modulator. This modulator generates a, b and c
// phases based on the d and q stationery reference frame inputs
SVGENDQ svgen_dq1 = SVGENDQ_DEFAULTS;

// Instance a QEP interface driver 
QEP qep1 = QEP_DEFAULTS;

// Instance a speed calculator based on QEP
SPEED_MEAS_QEP speed1 = SPEED_MEAS_QEP_DEFAULTS;

// Instance a enable PWM drive driver (only for DMC1500) 
DRIVE drv1 = DRIVE_DEFAULTS;

// Instance a ramp controller to smoothly ramp the frequency
RMPCNTL ramp_ctl1 = RMPCNTL_DEFAULTS;

// Instance a ramp generator to simulate an Anglele
RAMPGEN ramp_gen1 = RAMPGEN_DEFAULTS;

// Create an instance of the current/dc-bus voltage measurement driver
//ILEG2DCBUSMEAS ilg2_vdc1 = ILEG2DCBUSMEAS_DEFAULTS;

// Create an instance of the current measurement driver
ILEG2MEAS ilg2_meas1 = ILEG2MEAS_DEFAULTS;


// Create an instance of DATALOG Module
DLOG_4CH dlog = DLOG_4CH_DEFAULTS;


      


void main(void)
{

// ******************************************
// Initialization code for DSP_TARGET = F2812
// ******************************************
#if (DSP_TARGET==F2812)
	// Initialize System Control registers, PLL, WatchDog, Clocks to default state:
        // This function is found in the DSP281x_SysCtrl.c file.
	InitSysCtrl();	 // The Function Results are: SYSCLKOUT = 100MHz; HSPCLK = 50MHz; LSPCLK = 25MHz;

	// HISPCP prescale register settings, normally it will be set to default values
	/****  High-Speed Peripheral Clock Prescaler (HISPCP) Register  ****/
	// 15......3 2 ... 0
	// Reserved  HSPCLK
	// R-0       R/W-001
	//
	// 2-0
	// 000 High speed clock = SYSCLKOUT/1
	// 001 High speed clock = SYSCLKOUT/2 ( reset default)
	// 010 High speed clock = SYSCLKOUT/4
	// 011 High speed clock = SYSCLKOUT/6
	// 100 High speed clock = SYSCLKOUT/8
	// 101 High speed clock = SYSCLKOUT/10
	// 110 High speed clock = SYSCLKOUT/12
	// 111 High speed clock = SYSCLKOUT/14
	/******   'HISPCP' END  *******/
	//
	/****  Low-Speed Peripheral Clock Prescaler (LOSPCP) Register  ****/
	// 15......3 2 ... 0
	// Reserved  LSPCLK
	// R-0       R/W-001
	//
	// 2-0
	// 000 Low speed clock = SYSCLKOUT/1
	// 001 Low speed clock = SYSCLKOUT/2
	// 010 Low speed clock = SYSCLKOUT/4 ( reset default)
	// 011 Low speed clock = SYSCLKOUT/6
	// 100 Low speed clock = SYSCLKOUT/8
	// 101 Low speed clock = SYSCLKOUT/10
	// 110 Low speed clock = SYSCLKOUT/12
	// 111 Low speed clock = SYSCLKOUT/14
	/******   'LOSPCP' END  *******/

    EALLOW;   // This is needed to write to EALLOW protected registers
    //  重新设置HSPCLK频率
    //SysCtrlRegs.HISPCP.all = 0x0000;     // HISPCP=SYSCLKOUT/1; HSPCLK = 100MHz
    SysCtrlRegs.HISPCP.all = 0x0001;     // HISPCP=SYSCLKOUT/2; HSPCLK = 50MHz（default）
    //SysCtrlRegs.HISPCP.all = 0x0002;     // HISPCP=SYSCLKOUT/4; HSPCLK = 25MHz
	//SysCtrlRegs.HISPCP.all = 0x0003;     // HISPCP=SYSCLKOUT/6; HSPCLK = 16.67MHz
	//SysCtrlRegs.HISPCP.all = 0x0004;     // HISPCP=SYSCLKOUT/8; HSPCLK = 12.5MHz
	//SysCtrlRegs.HISPCP.all = 0x0005;     // HISPCP=SYSCLKOUT/10; HSPCLK = 10MHz
	//SysCtrlRegs.HISPCP.all = 0x0006;     // HISPCP=SYSCLKOUT/12; HSPCLK = 8.33MHz
	//SysCtrlRegs.HISPCP.all = 0x0007;     // HISPCP=SYSCLKOUT/14; HSPCLK = 7.14MHz
    //  重新设置LSPCLK频率
    //SysCtrlRegs.LOSPCP.all = 0x0000;     // LOSPCP=SYSCLKOUT/1; LSPCLK = 100MHz
    //SysCtrlRegs.LOSPCP.all = 0x0001;     // LOSPCP=SYSCLKOUT/2; LSPCLK = 50MHz
    SysCtrlRegs.LOSPCP.all = 0x0002;     // LOSPCP=SYSCLKOUT/4; LSPCLK = 25MHz（default）
	//SysCtrlRegs.LOSPCP.all = 0x0003;     // LOSPCP=SYSCLKOUT/6; LSPCLK = 16.67MHz
	//SysCtrlRegs.LOSPCP.all = 0x0004;     // LOSPCP=SYSCLKOUT/8; LSPCLK = 12.5MHz
	//SysCtrlRegs.LOSPCP.all = 0x0005;     // LOSPCP=SYSCLKOUT/10; LSPCLK = 10MHz
	//SysCtrlRegs.LOSPCP.all = 0x0006;     // LOSPCP=SYSCLKOUT/12; LSPCLK = 8.33MHz
	//SysCtrlRegs.LOSPCP.all = 0x0007;     // LOSPCP=SYSCLKOUT/14; LSPCLK = 7.14MHz
    EDIS;   // This is needed to disable write to EALLOW protected registers 

	// Disable and clear all CPU interrupts:
	DINT;
	IER = 0x0000;
	IFR = 0x0000;

    // Initialize the External Interface to the default reset state.
		//This function is found in the DSP281x_Xintf.c file.
	InitXintf();

	// Initialize Pie Control Registers To Default State:
        // This function is found in the DSP281x_PieCtrl.c file.
	InitPieCtrl();

	// Initialize the PIE Vector Table To a Known State:
        // This function is found in DSP281x_PieVect.c.
	// This function populates the PIE vector table with pointers
        // to the shell ISR functions found in DSP281x_DefaultIsr.c.
	InitPieVectTable();	
	
	// User specific functions, Reassign vectors (optional), Enable Interrupts:
	
	// All F2812 core system self-testing
   // step1 memory test (internal and external memory)

   // step2 

   // step3

   //step4






/************* 以下程序在把程序烧写到FLASH时启用 ****************/

/*** Copy all FLASH sections that need to run from RAM (use memcpy() from RTS library) ***/

// Section secureRamFuncs contains user defined code that runs from CSM secured RAM
//	memcpy(	&secureRamFuncs_runstart,
//			&secureRamFuncs_loadstart,
//			&secureRamFuncs_loadend - &secureRamFuncs_loadstart);

/*** Initialize the FLASH ***/
//	InitFlash();



	

// Initialize EVA Timer 1:
    // Setup Timer 1 Registers (EV A)
	/******  GP Timer Control Register A (GPTCONA) — Address 7400h  *******/
    //  15      14     13     12       11       10    9 8
    // Reserved T2STAT T1STAT T2CTRIPE T1CTRIPE T2TOADC T1TOADC
    //  R-0     R-1    R-1    R/W-1    R/W-1    R/W-0   R/W-0
    //  7       6      5       4       3    2 1   0
    //  T1TOADC TCMPOE T2CMPOE T1CMPOE T2PIN  T1PIN
    //  R/W-0   R/W-0  R/W-0   R/W-0   R/W-0  R/W-0
	//
    // 			Bit(s) Name Description
//	15 Reserved Reads return zero; writes have no effect.
//	14 T2STAT GP timer 2 Status. Read only
//		0 Counting downward
//		1 Counting upward
//	13 T1STAT GP timer 1 Status. Read only
//		0 Counting downward
//		1 Counting upward
//	12 T2CTRIPE T2CTRIP Enable. This bit, when active, enables and disables Timer 2 Compare Trip
//			(T2CTRIP). This bit is active only when EXTCON(0) = 1. This bit is reserved when
//			EXTCON(0) = 0.
//		0 T2CTRIP is disabled. T2CTRIP does not affect Timer 2 compare output,
//			GPTCON(5), or PDPINT flag (EVIFRA(0)).
//		1 T2CTRIP is enabled. When T2CTRIP is low, Timer 2 compare output goes into
//			HI-Z state, GPTCON(5) is reset to zero, and PDPINT flag [EVIFRA(0)] is set to
//			one.
//	11 T1CTRIPE T1CTRIP Enable. This bit, when active, enables and disables Timer 1 Compare Trip
//			(T1CTRIP) input. This bit is active only when EXTCON(0) = 1. This bit is reserved
//			when EXTCON(0) = 0.
//		0 T1CTRIP is disabled. T1CTRIP does not affect Timer 1 compare output,
//			GPTCON(4), or PDPINT flag (EVIFRA(0)).
//		1 T1CTRIP is enabled. When T1CTRIP is low, Timer 1 compare output goes into
//			HI-Z state, GPTCON(4) is reset to zero, and PDPINT flag (EVIFRA(0)) is set to
//			one.
//	10-9 T2TOADC Start ADC with timer 2 event
//		00 No event starts ADC
//		01 Setting of underflow interrupt flag starts ADC
//		10 Setting of period interrupt flag starts ADC
//		11 Setting of compare interrupt flag starts ADC
//	8-7 T1TOADC Start ADC with timer 1 event
//		00 No event starts ADC
//		01 Setting of underflow interrupt flag starts ADC
//		10 Setting of period interrupt flag starts ADC
//		11 Setting of compare interrupt flag starts ADC
//	6 TCMPOE Timer compare output enable. This bit, when active, enables and disables timer
//			compare outputs. This bit is active only if EXTCON(0) = 0. This bit is reserved when
//			EXTCON(0) = 1. This bit, when active, is reset to zero when both PDPINT/T1CTRIP
//			are low and EVIMRA(0) = 1.
//		0 Timer compare outputs, T1/2PWM_T1/2CMP, are in high-impedance state.
//		1 Timer compare outputs, T1/2PWM_T1/2CMP, are driven by individual timer
//			compare logic.
//	5 T2CMPOE Timer 2 compare output enable. This bit, when active, enables and disables EV
//			Timer 2 compare output, T2PWM_T1CMP. This bit is active only if EXTCON(0) = 1.
//			This bit is reserved when EXTCON(0) = 0. This bit, when active, is reset to zero
//			when T2CTRIP is low and is also enabled.
//		0 Timer 2 compare output, T2PWM_T2CMP, is in high-impedance state.
//		1 Timer 2 compare outputs T2PWM_T2CMP, is driven by individual timer 2
//			compare logic.
//	4 T1CMPOE Timer 1 Compare Output Enable. This bit, when active, enables or disables EV Timer
//			1 compare output T1PWM_T1CMP. This bit is active only when EXTCON(0) = 1.
//			This bit is reserved when EXTCON(0) = 0. This bit, when active is reset to zero when
//			T1CTRIP is low and is also enabled.
//		0 Timer 1 compare output, T1PWM_T1CMP, is in HI.z state.
//		1 Timer 1 compare output, T1PWM_T1CMP, is driven by Timer 1 compare logic.
//	3-2 T2PIN Polarity of GP timer 2 compare output
//		00 Forced low
//		01 Active low
//		10 Active high
//		11 Forced high
//	1-0 T1PIN Polarity of GP timer 1 compare output
//		00 Forced low
//		01 Active low
//		10 Active high