📄 sdhcslot.cpp
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Validate();
WORD wIntStatus = ReadWord(SDHC_NORMAL_INT_STATUS);
if (m_fFakeCardRemoval && m_fCardPresent) {
m_fFakeCardRemoval = FALSE;
HandleRemoval(TRUE);
}
if (wIntStatus != 0) {
DEBUGMSG(SDHC_INTERRUPT_ZONE,
(TEXT("HandleInterrupt (%u) - Normal Interrupt_Status=0x%02x\n"),
m_dwSlot, wIntStatus));
RETAILMSG(0, (TEXT("HandleInterrupt (%u) - Normal Interrupt_Status=0x%02x\n"),
m_dwSlot, wIntStatus));
// Error handling. Make sure to handle errors first.
if ( wIntStatus & NORMAL_INT_STATUS_ERROR_INT ) {
HandleErrors();
}
// Command Complete handling.
if ( wIntStatus & NORMAL_INT_STATUS_CMD_COMPLETE ) {
// Clear status
m_fCommandCompleteOccurred = TRUE;
WriteWord(SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_CMD_COMPLETE);
if ( HandleCommandComplete() ) {
wIntStatus &= ~NORMAL_INT_STATUS_TRX_COMPLETE; // this is command-only request.
}
}
// Sometimes at the lowest clock rate, the Read/WriteBufferReady
// interrupt actually occurs before the CommandComplete interrupt.
// This confuses our debug validation code and could potentially
// cause problems. This is why we will verify that the CommandComplete
// occurred before processing any data transfer interrupts.
if (m_fCommandCompleteOccurred) {
if (wIntStatus & NORMAL_INT_STATUS_DMA) {
WriteWord(SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_DMA);
HandleDma();
// do not break here. Continue to check TransferComplete.
}
// Buffer Read Ready handling
if (wIntStatus & NORMAL_INT_STATUS_BUF_READ_RDY ) {
// Clear status
WriteWord(SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_BUF_READ_RDY);
HandleReadReady();
// do not break here. Continue to check TransferComplete.
}
// Buffer Write Ready handling
if (wIntStatus & NORMAL_INT_STATUS_BUF_WRITE_RDY ) {
// Clear status
WriteWord(SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_BUF_WRITE_RDY);
HandleWriteReady();
// do not break here. Continue to check TransferComplete.
}
}
else {
// We received data transfer interrupt before command
// complete interrupt. Wait for the command complete before
// processing the data interrupt.
}
// Transfer Complete handling
if ( wIntStatus & NORMAL_INT_STATUS_TRX_COMPLETE ) {
// Clear status
WriteWord(SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_TRX_COMPLETE | NORMAL_INT_STATUS_DMA);
HandleTransferDone();
}
// SDIO Interrupt Handling
if ( wIntStatus & NORMAL_INT_STATUS_CARD_INT ) {
DEBUGCHK(m_fSDIOInterruptsEnabled);
DEBUGMSG(SDHC_INTERRUPT_ZONE, (_T("SDHCControllerIst: Card interrupt!\n")));
// Because SDIO Interrupt is level triggered, we are not able to clear
// the status. The status should be cleared by the card
// we just disable the interrupt from Interrupt Signal Register
// and Interrupt Status Enable register, and indicate that
// the card is interrupting
EnableSDIOInterrupts(FALSE);
IndicateSlotStateChange(DeviceInterrupting);
}
// Card Detect Interrupt Handling
if (wIntStatus & (NORMAL_INT_STATUS_CARD_INSERTION | NORMAL_INT_STATUS_CARD_REMOVAL)) {
WriteWord(SDHC_NORMAL_INT_STATUS,
NORMAL_INT_STATUS_CARD_INSERTION | NORMAL_INT_STATUS_CARD_REMOVAL);
m_fCheckSlot = TRUE;
}
}
if (m_fCheckSlot) {
m_fCheckSlot = FALSE;
// check card inserted or removed
DWORD dwPresentState = ReadDword(SDHC_PRESENT_STATE);
if (dwPresentState & STATE_CARD_INSERTED) {
DEBUGMSG(SDHC_INTERRUPT_ZONE, (TEXT("SDHCControllerIst - Card is Inserted! \n")));
RETAILMSG(1, (TEXT("[HSMMC1] Card is Inserted! \n")));
m_fFakeCardRemoval = FALSE; // KYS
if (m_fCardPresent == FALSE ) {
Start();
HandleInsertion();
}
}
else {
DEBUGMSG(SDHC_INTERRUPT_ZONE, (TEXT("SDHCControllerIst - Card is Removed! \n")));
RETAILMSG(1, (TEXT("[HSMMC1] Card is Removed! \n")));
m_fFakeCardRemoval = FALSE; // KYS
if (m_fCardPresent) {
HandleRemoval(TRUE);
}
}
}
}
#endif // !(BSP_TYPE == BSP_SMDK2443)
VOID
CSDHCSlotBase::HandleRemoval(
BOOL fCancelRequest
)
{
m_fCardPresent = FALSE;
m_fIsPowerManaged = FALSE;
m_fSleepsWithPower = FALSE;
m_fPowerUpDisabledInts = FALSE;
m_f4BitMode = FALSE;
m_cpsCurrent = D0;
// Wake on SDIO interrupt must be set by the client
m_bWakeupControl &= ~WAKEUP_INTERRUPT;
#if (BSP_TYPE == BSP_SMDK2443)
#elif (BSP_TYPE == BSP_SMDK2450)
// To control the Data CRC error
WORD wErrIntSignalEn = ReadWord(SDHC_ERROR_INT_SIGNAL_ENABLE);
WORD wErrIntStatusEn = ReadWord(SDHC_ERROR_INT_STATUS_ENABLE);
WORD wErrIntStatus = ReadWord(SDHC_ERROR_INT_STATUS);
WriteWord(SDHC_ERROR_INT_SIGNAL_ENABLE, (wErrIntSignalEn & ~(0x20))); //Command and Data CRC error disable
WriteWord(SDHC_ERROR_INT_STATUS_ENABLE, (wErrIntStatusEn & ~(0x20))); //Command and Data CRC error disable
#endif
if (m_fSDIOInterruptsEnabled) {
EnableSDIOInterrupts(FALSE);
}
IndicateSlotStateChange(DeviceEjected);
// turn off clock and remove power from the slot
SDClockOff();
WriteByte(SDHC_POWER_CONTROL, 0);
if (fCancelRequest) {
// get the current request
PSD_BUS_REQUEST pRequest = GetAndLockCurrentRequest();
if (pRequest != NULL) {
DEBUGMSG(SDCARD_ZONE_WARN,
(TEXT("Card Removal Detected - Canceling current request: 0x%08X, command: %d\n"),
pRequest, pRequest->CommandCode));
DumpRequest(pRequest, SDHC_SEND_ZONE || SDHC_RECEIVE_ZONE);
IndicateBusRequestComplete(pRequest, SD_API_STATUS_DEVICE_REMOVED);
}
}
if (m_pbDmaBuffer) {
DEBUGCHK(m_paDmaBuffer);
FreePhysBuffer(m_pbDmaBuffer);
m_pbDmaBuffer = NULL;
m_paDmaBuffer = 0;
// The Pegasus requires the following so that the next
// insertion will work correctly.
SoftwareReset(SOFT_RESET_CMD | SOFT_RESET_DAT);
WriteDword(SDHC_SYSTEMADDRESS_LO, 0);
WriteWord(SDHC_BLOCKSIZE, 0);
WriteWord(SDHC_BLOCKCOUNT, 0);
#if (BSP_TYPE == BSP_SMDK2443)
WriteWord(SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_DMA);
#elif (BSP_TYPE == BSP_SMDK2450)
WriteWord(SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_DMA);
// To diable the Data CRC error interrupt
WriteWord(SDHC_ERROR_INT_SIGNAL_ENABLE,0);
do
{
WriteWord(SDHC_ERROR_INT_STATUS,wErrIntStatus);
}while(ReadWord(SDHC_ERROR_INT_STATUS));
WriteWord(SDHC_ERROR_INT_SIGNAL_ENABLE,wErrIntSignalEn);
#endif
}
// 08.04.03 by KYS
// Below code lines are needed for working as a mass storage device
v_gBspArgs->g_SDCardState = CARD_REMOVED;
SetEvent( v_gBspArgs->g_SDCardDetectEvent );
}
VOID
CSDHCSlotBase::HandleInsertion(
)
{
DWORD dwClockRate = SD_DEFAULT_CARD_ID_CLOCK_RATE;
#if (BSP_TYPE == BSP_SMDK2443)
#elif (BSP_TYPE == BSP_SMDK2450)
WORD wErrIntSignalEn = ReadWord(SDHC_ERROR_INT_SIGNAL_ENABLE);
WORD wErrIntStatusEn = ReadWord(SDHC_ERROR_INT_STATUS_ENABLE);
g_initialInsertion = 0;
#endif
m_fCardPresent = TRUE;
// Apply the initial voltage to the card.
SetVoltage(GetMaxVddWindow());
// Send at least 74 clocks to the card over the course of at least 1 ms
// with allowance for power supply ramp-up time. (SD Phys Layer 6.4)
// Note that power supply ramp-up time occurs in SetVoltage().
RETAILMSG(0,(TEXT("++SetClockRate(&dwClockRate)\n")));
SetClockRate(&dwClockRate);
SDClockOn();
DWORD dwSleepMs = (74 / (dwClockRate / 1000)) + 1;
Sleep(dwSleepMs);
SDClockOff();
if (GetCapabilities().bits.DMA) {
RETAILMSG(0,(TEXT("Use DMA\n")));
PHYSICAL_ADDRESS SystemAddr = { 0 };
PVOID pvBuffer = AllocPhysBuffer(CB_DMA_BUFFER, &SystemAddr.LowPart);
if (pvBuffer) {
PHYSICAL_ADDRESS BusAddr;
// Translate physical address to logical (bus-relative) address.
BOOL fSuccess = TranslateSystemAddr(m_hBusAccess, m_interfaceType,
m_dwBusNumber, SystemAddr, &BusAddr);
if (fSuccess) {
RETAILMSG(0,(TEXT("Use DMA Success.\n")));
m_pbDmaBuffer= (PBYTE) pvBuffer;
m_paDmaBuffer = BusAddr.LowPart;
}
else {
// If we fail, we will simply fall back to PIO mode
FreePhysBuffer(pvBuffer);
}
}
}
// Interrupts are not enabled on a newly inserted card.
EnableSDIOInterrupts(FALSE);
// Indicate device arrival
IndicateSlotStateChange(DeviceInserted);
#if (BSP_TYPE == BSP_SMDK2443)
#elif (BSP_TYPE == BSP_SMDK2450)
WriteWord(SDHC_ERROR_INT_SIGNAL_ENABLE, (wErrIntSignalEn | (0x20))); //Command and Data CRC error disable
WriteWord(SDHC_ERROR_INT_STATUS_ENABLE, (wErrIntStatusEn | (0x20))); //Command and Data CRC error disable
#endif
// 08.04.03 by KYS
// Below code lines are needed for working as a mass storage device
v_gBspArgs->g_SDCardState = CARD_INSERTED;
SetEvent( v_gBspArgs->g_SDCardDetectEvent );
}
BOOL
CSDHCSlotBase::HandleCommandComplete(
)
{
SETFNAME();
PSD_BUS_REQUEST pRequest;
BOOL fRet = FALSE;
int count = 0 ;
RETAILMSG(0,(TEXT("CSDHCSlotBase::HandleCommandComplete\n")));
// get the current request
pRequest = GetAndLockCurrentRequest();
DEBUGCHK(m_dwReadyInts == 0);
if (pRequest) {
RETAILMSG(0,(TEXT("CSDHCSlotBase::HandleCommandComplete pRequest\n")));
DEBUGCHK(pRequest->HCParam == 0);
#if (BSP_TYPE == BSP_SMDK2443)
SD_API_STATUS transferStatus = SD_API_STATUS_SUCCESS;
#elif (BSP_TYPE == BSP_SMDK2450)
// 08.02.03 by KYS
// INT_TRX_COMPLETE is not suitable for s3c2450, so I comment out below code.
// therefore, in order to keep fastpath status, those code like just below is needed.
//SD_API_STATUS transferStatus = SD_API_STATUS_SUCCESS;
SD_API_STATUS transferStatus = m_FastPathStatus>=0 ? SD_API_STATUS_SUCCESS : m_FastPathStatus;
#endif
if (NoResponse != pRequest->CommandResponse.ResponseType) {
// Copy response over to request structure. Note that this is a
// bus driver buffer, so we do not need to SetProcPermissions
// or __try/__except.
UNALIGNED DWORD *pdwResponseBuffer =
(PDWORD) (pRequest->CommandResponse.ResponseBuffer + 1); // Skip CRC
WORD wCommand = ReadWord(SDHC_COMMAND);
if ((wCommand & CMD_RESPONSE_R1B_R5B) == CMD_RESPONSE_R1B_R5B) {
// wait for Transfer Complete status, which indicate the busy wait is over.
// we should not handle this TXN_COMPLETE interrupt in IST in this case
/*
RETAILMSG(0,(TEXT("HandleCommandComplete Status: 0x%X\n"),ReadWord(SDHC_NORMAL_INT_STATUS_ENABLE)));
RETAILMSG(0,(TEXT("HandleCommandComplete Signal: 0x%X\n"),ReadWord(SDHC_NORMAL_INT_SIGNAL_ENABLE)));
BOOL fSuccess = WaitForReg<WORD>(ReadWord, SDHC_NORMAL_INT_STATUS,
NORMAL_INT_STATUS_TRX_COMPLETE, NORMAL_INT_STATUS_TRX_COMPLETE, 5000);
RETAILMSG(0, (_T("%s Go waiting for NORMAL_INT_STATUS_TRX_COMPLETE\r\n"),
pszFname));
if (!fSuccess) {
RETAILMSG(0, (_T("%s Timeout waiting for NORMAL_INT_STATUS_TRX_COMPLETE\r\n"),
pszFname));
DEBUGMSG(SDCARD_ZONE_ERROR, (_T("%s Timeout waiting for NORMAL_INT_STATUS_TRX_COMPLETE\r\n"),
pszFname));
transferStatus = SD_API_STATUS_RESPONSE_TIMEOUT;
}*/
RETAILMSG(0,(TEXT("CSDHCSlotBase::HandleCommandComplete SoftwareReset\n")));
// Reset cmd and dat circuits
SoftwareReset(SOFT_RESET_CMD | SOFT_RESET_DAT);
}
pdwResponseBuffer[0] = ReadDword(SDHC_R0);
RETAILMSG(0,(TEXT("pdwResponseBuffer[0]= 0x%X\n"),pdwResponseBuffer[0]));
if (pRequest->CommandResponse.ResponseType == ResponseR2) {
pdwResponseBuffer[1] = ReadDword(SDHC_R2);
pdwResponseBuffer[2] = ReadDword(SDHC_R4);
pdwResponseBuffer[3] = ReadDword(SDHC_R6);
RETAILMSG(0,(TEXT("pdwResponseBuffer[1]= 0x%X\n"),pdwResponseBuffer[1]));
RETAILMSG(0,(TEXT("pdwResponseBuffer[2]= 0x%X\n"),pdwResponseBuffer[2]));
RETAILMSG(0,(TEXT("pdwResponseBuffer[3]= 0x%X\n"),pdwResponseBuffer[3]));
}
}
// check for command/response only
if (TRANSFER_IS_COMMAND_ONLY(pRequest)) {
IndicateBusRequestComplete(pRequest, transferStatus);
fRet = TRUE;
} else {
// handle data phase transfer
//pIOPreg->GPFDAT = (0x1<<7);
//WaitForReg<WORD>(ReadWord, SDHC_NORMAL_INT_STATUS, NORMAL_INT_STATUS_TRX_COMPLETE, NORMAL_INT_STATUS_TRX_COMPLETE);
/*
do{
}while ((ReadWord(SDHC_NORMAL_INT_STATUS)&NORMAL_INT_STATUS_TRX_COMPLETE) != NORMAL_INT_STATUS_TRX_COMPLETE); */
pRequest->HCParam = 0;
fRet = FALSE;
}
}
// else request must have been canceled due to an error
return fRet;
}
VOID
CSDHCSlotBase::HandleErrors(
)
{
SD_API_STATUS status = SD_API_STATUS_SUCCESS;
#if (BSP_TYPE == BSP_SMDK2443)
// get the current request
PSD_BUS_REQUEST pRequest = GetAndLockCurrentRequest();
#elif (BSP_TYPE == BSP_SMDK2450)
// 2007.06.10
// S/W workaround for the following problem
// Problem : When the interrupt is occurred, it is late to update the interrupt status register related to the interrupt source
while((ReadWord(SDHC_ERROR_INT_STATUS) == 0));
// get the current request
PSD_BUS_REQUEST pRequest = NULL;
pRequest = GetAndLockCurrentRequest();
#endif
WORD wErrorStatus = ReadWord(SDHC_ERROR_INT_STATUS);
DEBUGMSG(SDCARD_ZONE_ERROR,
(TEXT("HandleErrors - ERROR INT STATUS=0x%02X\n"), wErrorStatus));
if (pRequest) {
DumpRequest(pRequest, SDCARD_ZONE_ERROR);
// 08.04.27 by KYS
// For simple debugging, we have to confir
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