core_adpt.c

来自「6440linuxDriver的源代码」· C语言 代码 · 共 138 行

/*
 * H/W Access Routines - 64xx hba
 */

#include "core_header.h"
#include "core_exp.h"

MV_VOID mv_disable_hba(MV_LPVOID mmio)
{
	MV_U32 tmp;

        /* disable CMD/CMPL_Q/RESP mode */
	tmp = MV_REG_READ_DWORD(mmio, COMMON_CONTROL);
	tmp &= ~EN_CMD_ISSUE;
	tmp &= ~RSPNS_RCV_EN;
	tmp &= ~EN_SATA_REG_0;
        /* tmp &= ~CMD_CMPL_IRQ_MODE; */
	MV_REG_WRITE_DWORD(mmio, COMMON_CONTROL, tmp);

	/* disable interrupt */
	tmp = MV_REG_READ_DWORD(mmio, HBA_CONTROL);
	tmp &= ~MV_HBA_INT_ENABLE;
	MV_REG_WRITE_DWORD(mmio, HBA_CONTROL, tmp);

        /* disable completion queue interrupt */
	tmp = MV_REG_READ_DWORD(mmio, COMMON_IRQ_MASK);
	tmp &= ~INT_CMD_CMPL;
	tmp &= ~INT_PORT_MASK;
	MV_REG_WRITE_DWORD(mmio, COMMON_IRQ_MASK, tmp);
}

MV_VOID mv_reset_phy(MV_PVOID This,
		       MV_U8 PhyMap, 
		       MV_BOOLEAN bHardReset)
{
	PCore_Driver_Extension pCore = (PCore_Driver_Extension)This;
	MV_LPVOID mmio=pCore->Mmio_Base;
	MV_U32 reg;
	MV_U32 i;

	for (i=0; i < MAX_PORT_NUMBER; i++)
	{
		if (PhyMap & MV_BIT(i))
		{
			reg = READ_PORT_IRQ_MASK(mmio,i);
			reg &=~ PHY_RDY_CHNG_MASK;
			WRITE_PORT_IRQ_MASK(mmio,i,reg);
			HBA_SleepMillisecond(pCore, 10);
			reg = READ_PORT_PHY_CONTROL(mmio, i);
			if (bHardReset)
				reg |= MV_PHY_HARD_RESET_SEQ;
			else
				reg |= MV_PHY_RESET;

			WRITE_PORT_PHY_CONTROL(mmio, i, reg);
			HBA_SleepMillisecond(pCore, 100);
/* clear phy change status */
			WRITE_PORT_IRQ_STAT(mmio,i,PHY_RDY_CHNG_MASK);

			reg = READ_PORT_IRQ_MASK(mmio,i);
			reg |= PHY_RDY_CHNG_MASK;
			WRITE_PORT_IRQ_MASK(mmio,i,reg);
		}
	}
}

MV_VOID mv_enable_xmt(MV_PVOID This, MV_U8 PhyId)
{
	PCore_Driver_Extension pCore = (PCore_Driver_Extension)This;
	MV_U32 tmp;

	tmp=MV_REG_READ_DWORD(pCore->Mmio_Base, COMMON_CONTROL);
	if(pCore->Device_Id!=DEVICE_ID_6480)
	{
		if(PhyId<4)
			tmp |= 1<<(PhyId + EN_PORT_XMT_START);
	}
	else
	{
		tmp |= 1<<(PhyId + EN_PORT_XMT_START2); 
	}
	MV_REG_WRITE_DWORD(pCore->Mmio_Base, COMMON_CONTROL, tmp);
}

MV_VOID mv_disable_xmt(MV_PVOID This, MV_U8 PhyId)
{
	PCore_Driver_Extension pCore = (PCore_Driver_Extension)This;
	MV_U32 tmp;

	tmp=MV_REG_READ_DWORD(pCore->Mmio_Base, COMMON_CONTROL);
	if(pCore->Device_Id!=DEVICE_ID_6480)
	{
		if(PhyId<4)
			tmp &= ~(1<<(PhyId + EN_PORT_XMT_START));
	}
	else
	{
		tmp &= ~(1<<(PhyId + EN_PORT_XMT_START2)); 
	}
	MV_REG_WRITE_DWORD(pCore->Mmio_Base, COMMON_CONTROL, tmp);
}

MV_VOID mv_disable_register_set(MV_LPVOID mmio, MV_U8 Register_Set)
{
	MV_U32 tmp; 
	
	if(Register_Set<16)
	{
		tmp = ( MV_REG_READ_DWORD(mmio, COMMON_CONTROL) );
		tmp &= ~(MV_BIT((Register_Set+16)));
		MV_REG_WRITE_DWORD( mmio, COMMON_CONTROL, tmp ); 
	}
	else
	{
		tmp = ( MV_REG_READ_DWORD(mmio, COMMON_CONFIG) );
		tmp &= ~(MV_BIT(((Register_Set&0x0f)+16)));
		MV_REG_WRITE_DWORD( mmio, COMMON_CONFIG, tmp );
	}
}

MV_VOID mv_set_SASAddr(MV_PVOID This, MV_U8 PhyId, MV_PU8 pSasAddr)
{
	PCore_Driver_Extension pCore = (PCore_Driver_Extension)This;
	MV_LPVOID mmio = pCore->Mmio_Base;
	MV_U64 Val64;

	MV_CopyMemory(&Val64.value,pSasAddr,8);

	Val64.value = MV_CPU_TO_BE64(Val64);

	WRITE_PORT_CONFIG_ADDR(mmio,PhyId,CONFIG_DEV_ADDR_LO);
	WRITE_PORT_CONFIG_DATA(mmio,PhyId,Val64.parts.low);

	WRITE_PORT_CONFIG_ADDR(mmio,PhyId,CONFIG_DEV_ADDR_HI);
	WRITE_PORT_CONFIG_DATA(mmio,PhyId,Val64.parts.high);

}