test_trafficlights.v

来自「交通灯及其测试程序」· Verilog 代码 · 共 11 行

`timescale 1ns/1ns
module Test_Trafficlights;
reg clock,reset;
wire red,amber,green;
Trafficlights(clock,reset,red,amber,green);
initial begin clock=0;reset=1;
                  #150 reset=0;end
always #50 clock=~clock;
endmodule