ax2005.h

LC75823E_TEST[字符测试程序],主要是用来测试芯片是否工作正常.

/*******************************************************************************************
 File Name: 
 Version:
 Discription:
 Author:
 Date:
*******************************************************************************************/
#ifndef __AX2005_H__
#define __AX2005_H__
/********************BANK0***********************/
sfr P0		 = 0x80;
sfr SP		 = 0x81;
sfr DPL		 = 0x82;
sfr DPH		 = 0x83;
sfr DPL1	 = 0x84;
sfr DPH1	 = 0x85;
sfr DPCON	 = 0x86;
sfr DPS	     = 0x86;
sfr PCON	 = 0x87;

sfr TCON	 = 0x88;
sfr TMOD	 = 0x89;
sfr TL0		 = 0x8A;
sfr TL1		 = 0x8B;
sfr TH0		 = 0x8C;
sfr TH1		 = 0x8D;
sfr SPL		 = 0x8E;
sfr SPH		 = 0x8F;


sfr P1		 = 0x90;
sfr SSTA	 = 0x91;
sfr EDMASTARTL	  = 0x92;
sfr EDMASTARTH	  = 0x93;
sfr CKDIV	 = 0x94;
sfr CKCON0	 = 0x95;
sfr CKCON1	 = 0x96;
sfr CKCON2	 = 0x97;

sfr SCON	 = 0x98;
sfr SBUF	 = 0x99;
sfr WKPEND	 = 0x9A;
sfr WKEN	 = 0x9B;
sfr WKEDGE	 = 0x9C;
sfr IDMASTART	  = 0x9D;
sfr ECCBUF	 = 0x9E;
sfr UTSTA	 = 0x9F;

sfr P2		 = 0xA0;
sfr UTCON	 = 0xA1;
sfr UTBAUD	 = 0xA2;
sfr UTBUF	 = 0xA3;
sfr PLLNF	 = 0xA4;
sfr PLLNR	 = 0xA5;
sfr CRCFIFO	 = 0xA6;
sfr CRCREG	 = 0xA7;

sfr IEN0	 = 0xA8;
sfr IEN1	 = 0xA9;
sfr IEN2	 = 0xAA;
sfr IEN3	 = 0xAB;
sfr HFMPTRL	 = 0xAC;
sfr HFMPTRH	 = 0xAD;
sfr BFENDPTR = 0xAE;
sfr BFCON	 = 0xAF;


sfr P3		 = 0xB0;
sfr DACCON0	 = 0xB1; 
sfr DACCON1	 = 0xB2;
sfr DACVLM	 = 0xB3;
sfr DACBUFL  = 0xB4;
sfr DACBUFR  = 0xB5;
sfr DACPTR	 = 0xB6;
sfr DACCNT	 = 0xB7;

sfr IP0		 = 0xB8;
sfr IP1		 = 0xB9;
sfr IP2		 = 0xBA;
sfr WDTCON	 = 0xBB;
sfr T4CON	 = 0xBC;
sfr T4CNT	 = 0xBD;
sfr T4PR	 = 0xBE;
sfr T2CON1	 = 0xBF;

sfr P4		 = 0xC0;
sfr T2CON0	 = 0xC1;
sfr16 T2CNT  = 0xC2;
sfr T2CNTL	 = 0xC2;
sfr T2CNTH	 = 0xC3;
sfr16 T2PR   = 0xC4;
sfr T2PRL	 = 0xC4;
sfr T2PRH	 = 0xC5;
sfr T2PWML	 = 0xC6;
sfr T2PWMH	 = 0xC7;

sfr CPUCFG	 = 0xC8;
sfr USBBUF	 = 0xC9;
sfr USBADR	 = 0xCA;
sfr USBDMADONE	 = 0xCB;
sfr USBCON1	 = 0xCC;
sfr USBCON2	 = 0xCD;
sfr USBDMAIMSK	 = 0xCE;
sfr EMICON0	 	  = 0xCF;

sfr PSW		 = 0xD0;
sfr INTFG0	 = 0xD1;
sfr EMICON1	 	  = 0xD2;
sfr SPI0DMACNT	 = 0xD3;
sfr SPI0DMASP	 = 0xD4;
sfr SPI0CON	 = 0xD5;
sfr SPI0BAUD	 = 0xD6;
sfr SPI0BUF	 = 0xD7;

sfr P5		 = 0xD8;
sfr MAC1X	 = 0xD9;
sfr MAC1Y	 = 0xDA;
sfr MAC1Z	 = 0xDB;
sfr MAC1CON0 = 0xDC;
sfr MAC1CON1 = 0xDD;
sfr MAC1CON2 = 0xDE;
sfr MAC1REF	 = 0xDF;

sfr ACC		 = 0xE0;
sfr ACC1	 = 0xE1;
sfr ACC2	 = 0xE2;
sfr REVER	 = 0xE3;
sfr EDMACNT	 = 0xE4;
sfr USBCON0	 = 0xE5;
sfr USBDMASADR	 = 0xE6;
sfr USBDMAREQ	 = 0xE7;


sfr BFDATAL  	= 0xE8;
sfr BFDATAH 	= 0xE9;
sfr BFBYPTRL 	= 0xEA;
sfr BFBYPTRH 	= 0xEB;
sfr BFBIPTR	 	= 0xEC;


sfr IIS0DMAPTER	 = 0xED;
sfr IIS0DMACNT	 = 0xEE;
sfr PSYNC	 = 0xEF;

sfr B		 = 0xF0;
sfr IIS0CON0	 = 0xF1;
sfr IIS0CON1	 = 0xF2;
sfr IIS0BAUD	 = 0xF3;
sfr IIS0BUF0	 = 0xF4;
sfr IIS0BUF1	 = 0xF5;
sfr P1IE    	 = 0xF6;
sfr P2IE         = 0xF7;

sfr P6		 = 0xF8;
sfr P0DIR	 = 0xF9;
sfr P1DIR	 = 0xFA;
sfr P2DIR	 = 0xFB;
sfr P3DIR	 = 0xFC;
sfr P4DIR	 = 0xFD;
sfr P5DIR	 = 0xFE;
sfr P6DIR	 = 0xFF;


/****************** 16 bits sfr ******************/
sfr16 DPTR0    = 0x82;
sfr16 DPTR1    = 0x84;
sfr16 SP16	   = 0x8E;
sfr16 BFDATA  	= 0xE8;
sfr16 ACC16    = 0xE0;
sfr16 EDMASTART  = 0x92;
sfr16 HFMPTR	 = 0xAC;
sfr16 BFBYPTR    = 0xEA;

/********************BANK1***********************/
sfr LR0POLY   = 0x9A;
sfr LR0FB0    = 0x9B;
sfr LR0FB1    = 0x9C;

sfr GPIDMACNTL	  = 0xA4;
sfr GPIDMACNTH	  = 0xA5;

sfr GPODMACNTL	  = 0xAC;
sfr GPODMACNTH	  = 0xAD;
sfr GPODMAPTER	  = 0xAE;

sfr BORCON	 = 0xAF;

sfr LR0BUF    = 0xB1;
sfr LR0RES0   = 0xB2;
sfr LR0RES1   = 0xB3;
sfr LR0RES2   = 0xB4;
sfr LR0RES3   = 0xB5;
sfr LR0CON0   = 0xB6;

sfr LR0CON1   = 0xB7;

sfr T5CON         = 0xBC;
sfr T5CNT         = 0xBD;
sfr T5PR          = 0xBE;
sfr T3CON1        = 0xBF;

sfr T3CON0        = 0xC1;
sfr T3CNTL        = 0xC2;
sfr T3CNTH        = 0xC3;
sfr T3PRL         = 0xC4;
sfr T3PRH         = 0xC5;
sfr T3PWML        = 0xC6;
sfr T3PWMH        = 0xC7;
sfr16 T3CNT       = 0xC2;
sfr16 T3PR        = 0xC4;

sfr SPI1DMACNT	 = 0xD3;
sfr SPI1DMASP	 = 0xD4;
sfr SPI1CON	 = 0xD5;
sfr SPI1BAUD	 = 0xD6;
sfr SPI1BUF	 = 0xD7;

sfr GPSTA	 = 0xE8;
sfr GPCON0	 = 0xE9;
sfr GPCON1	 = 0xEA;
sfr GPCON2	 = 0xEB;
sfr GPBAUD	 = 0xEC;
sfr IIS1DMAPTER	 = 0xED;
sfr IIS1DMACNT	 = 0xEE;
sfr GPI1DMAPTER	 = 0xEF;

sfr IIS1CON0	 = 0xF1;
sfr IIS1CON1	 = 0xF2;
sfr IIS1BAUD	 = 0xF3;
sfr IIS1BUF0	 = 0xF4;
sfr IIS1BUF1	 = 0xF5;

sfr GPHEAD	 = 0xF6;
sfr GPBUF	 = 0xF7;

sfr P0UP          = 0xF9;
sfr P1UP          = 0xFA;
sfr P2UP          = 0xFB;
sfr P3UP          = 0xFC;
sfr P4UP          = 0xFD;
sfr P5UP          = 0xFE;
sfr P6UP          = 0xFF;

sfr LCDCON        = 0xAF;       //bank 1

/****************** 16 bits sfr ******************/
sfr16 GPODMACNT	  = 0xAC;
sfr16 GPIDMACNT	  = 0xA4;

sfr SIMEND = 0xAF;


/*  BIT Registers  */
/*  TCON  */
sbit TF1   = TCON^7;
sbit TR1   = TCON^6;
sbit TF0   = TCON^5;
sbit TR0   = TCON^4;
sbit IE1   = TCON^3;
sbit IT1   = TCON^2;
sbit IE0   = TCON^1;
sbit IT0   = TCON^0;

/*  SCON0  */
sbit SM0   = SCON^7;
sbit SM1   = SCON^6;
sbit SM2   = SCON^5;
sbit REN   = SCON^4;
sbit TB8   = SCON^3;
sbit RB8   = SCON^2;
sbit TI    = SCON^1;
sbit RI    = SCON^0;

/*  IEN0  */
sbit EA    = IEN0^7;
sbit ET6   = IEN0^5;
sbit ES    = IEN0^4;
sbit ET1   = IEN0^3;
sbit EX1   = IEN0^2;
sbit ET0   = IEN0^1;
sbit EX0   = IEN0^0;

/*  PSW  */
sbit CY    = PSW^7;
sbit AC    = PSW^6;
sbit F0    = PSW^5;
sbit RS1   = PSW^4;
sbit RS0   = PSW^3;
sbit OV    = PSW^2;
sbit BANKSEL = PSW^1;
sbit P     = PSW^0;

/* INTFG0 */
/*
sbit F_U1TX		= INTFG0^7;
sbit F_U1RX		= INTFG0^6;
sbit F_USBD		= INTFG0^5;
sbit F_USBSOF 	= INTFG0^4;
sbit F_T5  		= INTFG0^3; 
sbit F_T4  		= INTFG0^2;
sbit F_T3  		= INTFG0^1;
sbit F_T2  		= INTFG0^0;
*/
#define     F_EMI       7
#define     F_CRCM      6
#define     F_USBD      5
#define     F_USBSOF    4
#define     F_T5        3 
#define     F_T4        2
#define     F_T3        1
#define     F_T2        0

/*P0*/
sbit P07  = P0^7;
sbit P06  = P0^6;
sbit P05  = P0^5;
sbit P04  = P0^4;
sbit P03  = P0^3;
sbit P02  = P0^2;
sbit P01  = P0^1;
sbit P00  = P0^0;

/*P1*/
sbit P17  = P1^7;
sbit P16  = P1^6;
sbit P15  = P1^5;
sbit P14  = P1^4;
sbit P13  = P1^3;
sbit P12  = P1^2;
sbit P11  = P1^1;
sbit P10  = P1^0;

/*P2*/
sbit P27  = P2^7;
sbit P26  = P2^6;
sbit P25  = P2^5;
sbit P24  = P2^4;
sbit P23  = P2^3;
sbit P22  = P2^2;
sbit P21  = P2^1;
sbit P20  = P2^0;

/*P3*/
sbit P37  = P3^7;
sbit P36  = P3^6;
sbit P35  = P3^5;
sbit P34  = P3^4;
sbit P33  = P3^3;
sbit P32  = P3^2;
sbit P31  = P3^1;
sbit P30  = P3^0;          

/*P4*/                   
sbit P47  = P4^7;        
sbit P46  = P4^6;        
sbit P45  = P4^5;       
sbit P44  = P4^4;        
sbit P43  = P4^3;        
sbit P42  = P4^2;        
sbit P41  = P4^1;        
sbit P40  = P4^0;    

/*P5*/                       
sbit P57  = P5^7;        
sbit P56  = P5^6;        
sbit P55  = P5^5;        
sbit P54  = P5^4;        
sbit P53  = P5^3;        
sbit P52  = P5^2;        
sbit P51  = P5^1;        
sbit P50  = P5^0;   

/*P6*/                        
sbit P67  = P6^7;        
sbit P66  = P6^6;        
sbit P65  = P6^5;        
sbit P64  = P6^4;        
sbit P63  = P6^3;        
sbit P62  = P6^2;        
sbit P61  = P6^1;        
sbit P60  = P6^0; 


/*interrupt Vector*/
#define     INT_INTP0               interrupt 0
#define     INT_TMR0                interrupt 1
#define     INT_INTP1               interrupt 2
#define     INT_TMR1                interrupt 3
#define     INT_UART0               interrupt 4
#define     INT_UART1               interrupt 5
#define     INT_USB_SOF             interrupt 6
#define     INT_BIT_STREAM          interrupt 7
#define     INT_TMR2                interrupt 8
#define     INT_TMR3                interrupt 9
#define     INT_TMR4                interrupt 10
#define     INT_TMR5                interrupt 11
#define     INT_DAC                 interrupt 12
#define     INT_GPSI_RX             interrupt 13
#define     INT_GPSI_TX             interrupt 14
#define     INT_IIS_DMA             interrupt 15
#define     INT_SPI0                interrupt 16
#define     INT_SPI1                interrupt 17
#define     INT_WAKEUP              interrupt 18
#define     INT_USB_CTL             interrupt 19
#define     INT_USB_DMA             interrupt 20
#define     INT_IIS                 interrupt 21
#define     INT_MAC                 interrupt 22
#define     INT_EMI                 interrupt 23
#define     INT_BOR                 interrupt 24
#define     INT_WDT                 interrupt 25

#endif