proj.hif

基于QuartusII的LCD1602-Verilog 源代码

Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version
11
920
OFF
OFF
OFF
OFF
ON
ON
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
f:|i2c_altera|
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
lcd
# storage
db|Proj.(1).cnf
db|Proj.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
lcd.vhd
dab0506942ba7c13c7cb8ebb68ba3a8
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
lcd:inst
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
char_ram
# storage
db|Proj.(2).cnf
db|Proj.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
char_ram.vhd
efe667cd7616791a982fe580b15e2ebe
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
 constraint(address)
5 downto 0
PARAMETER_STRING
USR
 constraint(data)
7 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
lcd:inst|char_ram:aa
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
div16
# storage
db|Proj.(3).cnf
db|Proj.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
DIV16.v
24a63283a9a68f9615f22eb70ab16c3
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
div16:inst1
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lcd_test
# storage
db|Proj.(0).cnf
db|Proj.(0).cnf
# case_insensitive
# source_file
lcd_test.bdf
475296e9e2173325f1f6bd81399bfd6
25
# internal_option {
BLOCK_DESIGN_NAMING
AUTO
}
# hierarchies {
|
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# complete