l1d_custom_rf.h

mtk_rf MT6139_CUSTOM 驱动..

/*******************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2001
*
*******************************************************************************/

/*******************************************************************************
 *
 * Filename:
 * ---------
 *	l1d_custom_rf.h
 *
 *
 *******************************************************************************/

#ifndef  _L1D_CUSTOM_RF_H_
#define  _L1D_CUSTOM_RF_H_
/* ------------------------------------------------------------------------- */
#if !defined(MT6139E_RF)
   #error "rf files mismatch with compile option!"
#endif

/*MT6139E*/
/*MT6139E*/ /*--------------------------------------------------------*/
/*MT6139E*/ /*   Event Timing Define                                  */
/*MT6139E*/ /*--------------------------------------------------------*/
/*MT6139E*/
/*MT6139E*/ #if IS_CHIP_MT6225_AND_LATTER_VERSION || IS_EDGE_CHIP_MT6229_AND_LATTER_VERSION
/*MT6139E*/ /*MT6225~*/ #define  QB_RX_FENA_2_FSYNC          48   /* this value shall be 4N+0 */
/*MT6139E*/ /*MT6225~*/ #define  QB_RX_FSYNC_2_FENA          0
/*MT6139E*/ /*MT6225~*/ #define  QB_TX_FENA_2_FSYNC          152  /* this value shall be 4N+0 */
/*MT6139E*/ /*MT6225~*/ #define  QB_TX_FSYNC_2_FENA          30
/*MT6139E*/ /*MT6225~*/ /* #define  QB_TX_FSYNC_2_FENA          20  /* SKY77518
/*MT6139E*/ #elif  IS_CHIP_MT6218_AND_LATTER_VERSION
/*MT6139E*/ /*MT6218~*/ #define  QB_RX_FENA_2_FSYNC          40   /* this value shall be 4N+0 */
/*MT6139E*/ /*MT6218~*/ #define  QB_RX_FSYNC_2_FENA          0
/*MT6139E*/ /*MT6218~*/ #define  QB_TX_FENA_2_FSYNC          152  /* this value shall be 4N+0 */
/*MT6139E*/ /*MT6218~*/ #define  QB_TX_FSYNC_2_FENA          30
/*MT6139E*/ /*MT6218~*/ /* #define  QB_TX_FSYNC_2_FENA          20  /* SKY77518
/*MT6139E*/ #else
/*MT6139E*/ /*OTHERS*/ #define  QB_RX_FENA_2_FSYNC           35   /* this value shall be 4N+3 */
/*MT6139E*/ /*OTHERS*/ #define  QB_RX_FSYNC_2_FENA           0
/*MT6139E*/ /*OTHERS*/ #define  QB_TX_FENA_2_FSYNC           149  /* this value shall be 4N+1 */
/*MT6139E*/ /*OTHERS*/ #define  QB_TX_FSYNC_2_FENA           30
/*MT6139E*/ /*OTHERS*/ /* #define  QB_TX_FSYNC_2_FENA          20  /* SKY77518
/*MT6139E*/ #endif
/*MT6139E*/                                           /*           |--(N:SR3 data number)                     */
/*MT6139E*/ #define  QB_SR1                      217  /* Let the 6*N + 4(QB) distance exist between SR1 & SR3 */
/*MT6139E*/ #define  QB_SR2                      70
/*MT6139E*/ #define  QB_SR2M                     44
/*MT6139E*/ #define  QB_SR3                      0
/*MT6139E*/ #define  QB_PR1                      248
/*MT6139E*/ #define  QB_PR2                      30
/*MT6139E*/ #define  QB_PR3                      6
/*MT6139E*/ #define  QB_ST1                      304
/*MT6139E*/ #define  QB_ST2                      140
/*MT6139E*/ #define  QB_ST3                      23
/*MT6139E*/ /* #define  QB_ST3                   35 /* SKY77518
/*MT6139E*/ #define  QB_PT2B                     335 
/*MT6139E*/ #define  QB_PT1                      10   //kino  18 
/*MT6139E*/ /* #define  QB_PT1                   6 /* SKY77518
/*MT6139E*/ #define  QB_PT2                      2    //kino  6
/*MT6139E*/ #define  QB_PT3                      25
/*MT6139E*/ #if IS_CHIP_MT6225_AND_LATTER_VERSION || IS_EDGE_CHIP_MT6229_AND_LATTER_VERSION
/*MT6139E*/ #define  QB_APCON                    17
/*MT6139E*/ #define  QB_APCMID                   22
/*MT6139E*/ #define  QB_APCOFF                   9
/*MT6139E*/ #else
/*MT6139E*/ #define  QB_APCON                    21
/*MT6139E*/ #define  QB_APCMID                   26
/*MT6139E*/ #define  QB_APCOFF                   5
/*MT6139E*/ #endif
/*MT6139E*/ #define  QB_APCDACON                 99
/*MT6139E*/
/*MT6139E*/ #if IS_SAIC_CHIP_MT6223_AND_LATTER_VERSION
/*MT6139E*//*MT6223~*/ #define  TX_PROPAGATION_DELAY         43
/*MT6139E*/ #elif IS_CHIP_MT6225_AND_LATTER_VERSION||IS_CHIP_MT6229||IS_CHIP_MT6268T
/*MT6139E*//*MT6225~*/ #define  TX_PROPAGATION_DELAY         45
/*MT6139E*/ #elif  IS_CHIP_MT6218_AND_LATTER_VERSION
/*MT6139E*//*MT6218~*/ #define  TX_PROPAGATION_DELAY         37
/*MT6139E*/ #else
/*MT6139E*//*OTHERS*/  #define  TX_PROPAGATION_DELAY         36
/*MT6139E*/ #endif
/*MT6139E*/
/*MT6139E*/ #if  IS_CHIP_MT6208
/*MT6139E*/ /*MT6208*/ /*--------------------------------------------------------*/
/*MT6139E*/ /*MT6208*/ /*   define  BPI data (shall be modified by real case)    */
/*MT6139E*/ /*MT6208*/ /*--------------------------------------------------------*/
/*MT6139E*/ /*MT6208*/ /*    PRCB : bit   pin                                    */
/*MT6139E*/ /*MT6208*/ /*            0    HB_TX                                  */
/*MT6139E*/ /*MT6208*/ /*            1   *PCS_CTRL                               */
/*MT6139E*/ /*MT6208*/ /*            2    TX_EN                                  */
/*MT6139E*/ /*MT6208*/ /*            3   *GSM_BANDSW*                            */
/*MT6139E*/ /*MT6208*/ /*            4    LB_TX                                  */
/*MT6139E*/ /*MT6208*/ /*            5    DCS_BANDSW*                            */
/*MT6139E*/ /*MT6208*/ /*            6    PCS_RCTRL                              */
/*MT6139E*/ /*MT6208*/ /*            7    not used                               */
/*MT6139E*/ /*MT6208*/ /*--------------------------------------------------------*/
/*MT6139E*/ /*MT6208*/
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM850_PR1  0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM850_PR2  0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM850_PR3  0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM850_PT1  0x08
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM850_PT2  0x1C
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM850_PT3  0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM_PR1     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM_PR2     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM_PR3     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM_PT1     0x08
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM_PT2     0x1C
/*MT6139E*/ /*MT6208*/ #define  PDATA_GSM_PT3     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_DCS_PR1     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_DCS_PR2     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_DCS_PR3     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_DCS_PT1     0x20
/*MT6139E*/ /*MT6208*/ #define  PDATA_DCS_PT2     0x25
/*MT6139E*/ /*MT6208*/ #define  PDATA_DCS_PT3     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_PCS_PR1     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_PCS_PR2     0x40
/*MT6139E*/ /*MT6208*/ #define  PDATA_PCS_PR3     0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_PCS_PT1     0x60
/*MT6139E*/ /*MT6208*/ #define  PDATA_PCS_PT2     0x25
/*MT6139E*/ /*MT6208*/ #define  PDATA_PCS_PT3     0x00
/*MT6139E*/ /*MT6208*/
/*MT6139E*/ /*MT6208*/ #define  PDATA_INIT        0x00
/*MT6139E*/ /*MT6208*/ #define  PDATA_IDLE        0x00
/*MT6139E*/ #endif
/*MT6139E*/
/*MT6139E*/ #if  IS_CHIP_MT6205
/*MT6139E*/ /*MT6205*/ /*--------------------------------------------------------*/
/*MT6139E*/ /*MT6205*/ /*   define  BPI data                                     */
/*MT6139E*/ /*MT6205*/ /*--------------------------------------------------------*/
/*MT6139E*/ /*MT6205*/ /*    PRCB : bit   pin                                    */
/*MT6139E*/ /*MT6205*/ /*            0    HBTX                                   */
/*MT6139E*/ /*MT6205*/ /*            1    LBTX                                   */
/*MT6139E*/ /*MT6205*/ /*            2    PCSRX                                  */
/*MT6139E*/ /*MT6205*/ /*            3    850RX                                  */
/*MT6139E*/ /*MT6205*/ /*            4    PAEN                                   */
/*MT6139E*/ /*MT6205*/ /*            5    DCS_BANDSW                             */