board_cstartup_iar.lst

来自「ATmel的AT91sam7SE芯片 USB固件开发源代码」· LST 代码 · 共 280 行 · 第 1/2 页

                                                    Undefined instructions
   88    00000008 14F09FE5             LDR     pc, SWI_Addr             ;
                                                    Software interrupt
                                                    (SWI/SVC)
   89    0000000C 14F09FE5             LDR     pc, Prefetch_Addr        ;
                                                    Prefetch abort
   90    00000010 14F09FE5             LDR     pc, Abort_Addr           ; Data
                                                    abort
   91    00000014 FEFFFFEA             B       .                        ;
                                                RESERVED
   92    00000018 60F09FE5             LDR     pc, =irqHandler          ;
                                                    IRQ
   93    0000001C 0CF09FE5             LDR     pc, FIQ_Addr             ;
                                                    FIQ
   94                          
   95    00000020 ........     Undefined_Addr: DCD   Undefined_Handler
   96    00000024 ........     SWI_Addr:       DCD   SWI_Handler
   97    00000028 ........     Prefetch_Addr:  DCD   Prefetch_Handler
   98    0000002C ........     Abort_Addr:     DCD   Abort_Handler
   99    00000030 ........     FIQ_Addr:       DCD   FIQ_Handler
  100                                  
  101                          /*
  102                             Handles incoming interrupt requests by
                                branching to the corresponding
  103                             handler, as defined in the AIC. Supports
                                interrupt nesting.
  104                           */
  105                          irqHandler:
  106                                  /* Save interrupt context on the stack
                                to allow nesting */
  107    00000034 04E04EE2             SUB     lr, lr, #4
  108    00000038 00402DE9             STMFD   sp!, {lr}
  109    0000003C 00E04FE1             MRS     lr, SPSR
  110    00000040 01402DE9             STMFD   sp!, {r0, lr}
  111                          
  112                                  /* Write in the IVR to support Protect
                                Mode */
  113    00000044 38E09FE5             LDR     lr, =AT91C_BASE_AIC
  114    00000048 00019EE5             LDR     r0, [r14, #AIC_IVR]
  115    0000004C 00E18EE5             STR     lr, [r14, #AIC_IVR]
  116                          
  117                                  /* Branch to interrupt handler in
                                Supervisor mode */
  118    00000050 13F021E3             MSR     CPSR_c, #ARM_MODE_SVC
  119    00000054 0E502DE9             STMFD   sp!, {r1-r3, r12, lr}
  120    00000058 0FE0A0E1             MOV     lr, pc
  121    0000005C 10FF2FE1             BX      r0
  122    00000060 0E50BDE8             LDMIA   sp!, {r1-r3, r12, lr}
  123    00000064 92F021E3             MSR     CPSR_c, #ARM_MODE_IRQ |
                                                        I_BIT
  124                          
  125                                  /* Acknowledge interrupt */
  126    00000068 14E09FE5             LDR     lr, =AT91C_BASE_AIC
  127    0000006C 30E18EE5             STR     lr, [r14, #AIC_EOICR]
  128                          
  129                                  /* Restore interrupt context and branch
                                back to calling code */
  130    00000070 0140BDE8             LDMIA   sp!, {r0, lr}
  131    00000074 0EF06FE1             MSR     SPSR_cxsf, lr
  132    00000078 0080FDE8             LDMIA   sp!, {pc}^
  133                          
  134                          
  135                          /*
  136                             After a reset, execution starts here, the
                                mode is ARM, supervisor
  137                             with interrupts disabled.
  138                             Initializes the chip and branches to the
                                main() function.
  139                           */
  140                                  SECTION .cstartup:CODE:NOROOT(2)
  140.1                                 TABLE
  140.2  0000007C ........             Reference on line 86 
  140.3  00000080 ........             Reference on line 92 
  140.4  00000084 00F0FFFF             Reference on line 113,126 
  140.5                                RSEG (including table)
  140                                  SECTION .cstartup:CODE:NOROOT(2)
  141                          
  142                                  PUBLIC  resetHandler
  143                                  EXTERN  LowLevelInit
  144                                  EXTERN  ?main
  145                                  REQUIRE resetVector
  146                                  ARM
  147                          
  148                          resetHandler:
  149                          
  150                                  /* Set pc to actual code location (i.e.
                                not in remap zone) */
  151    00000000 30F09FE5                 LDR     pc, =label
  152                          
  153                                  /* Perform low-level initialization of
                                the chip using LowLevelInit() */
  154                          label:
  155    00000004 30009FE5                 LDR     r0, =LowLevelInit
  156    00000008 30409FE5             LDR     r4, =SFE(CSTACK)
  157    0000000C 04D0A0E1             MOV     sp, r4
  158    00000010 0FE0A0E1             MOV     lr, pc
  159    00000014 10FF2FE1             BX      r0
  160                          
  161                                  /* Set up the interrupt stack pointer.
                                */
  162    00000018 D2F021E3             MSR     cpsr_c, #ARM_MODE_IRQ | I_BIT |
                                                        F_BIT      ; Change the
                                                        mode
  163    0000001C 20D09FE5             LDR     sp, =SFE(IRQ_STACK)
  164                          
  165                                  /* Set up the SVC stack pointer.
                                */
  166    00000020 53F021E3             MSR     cpsr_c, #ARM_MODE_SVC | F_BIT   
                                                                  ; Change the
                                                        mode
  167    00000024 14D09FE5             LDR     sp, =SFE(CSTACK)
  168                          
  169                                  /* Branch to main() */
  170    00000028 18009FE5             LDR     r0, =?main
  171    0000002C 0FE0A0E1             MOV     lr, pc
  172    00000030 10FF2FE1             BX      r0
  173                          
  174                                  /* Loop indefinitely when program is
                                finished */
  175                          loop4:
  176    00000034 FEFFFFEA             B       loop4
  177                          
  178                                  END
  178.1                                 TABLE
  178.2  00000038 ........             Reference on line 151 
  178.3  0000003C ........             Reference on line 155 
  178.4  00000040 ........             Reference on line 156,167 
  178.5  00000044 ........             Reference on line 163 
  178.6  00000048 ........             Reference on line 170 
  178.7                                END (including table)
##############################
#           CRC:0            #
#        Errors:   0         #
#        Warnings: 0         #
#         Bytes: 212         #
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