📄 board_lowlevel.lst
字号:
\ 00000010 0110A0E3 MOV R1,#+1
\ 00000014 401C81E3 ORR R1,R1,#0x4000
\ 00000018 001080E5 STR R1,[R0, #+0]
106 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
\ ??LowLevelInit_0:
\ 0000001C 9700E0E3 MVN R0,#+151
\ 00000020 C00FC0E3 BIC R0,R0,#0x300
\ 00000024 000090E5 LDR R0,[R0, #+0]
\ 00000028 010010E3 TST R0,#0x1
\ 0000002C FAFFFF0A BEQ ??LowLevelInit_0
107
108 /* Initialize PLL at 96MHz (96.109) and USB clock to 48MHz */
109 AT91C_BASE_PMC->PMC_PLLR = BOARD_USBDIV | BOARD_CKGR_PLL | BOARD_PLLCOUNT
110 | BOARD_MUL | BOARD_DIV;
\ 00000030 D300E0E3 MVN R0,#+211
\ 00000034 C00FC0E3 BIC R0,R0,#0x300
\ 00000038 38119FE5 LDR R1,??LowLevelInit_1 ;; 0x1048100e
\ 0000003C 001080E5 STR R1,[R0, #+0]
111 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK));
\ ??LowLevelInit_2:
\ 00000040 9700E0E3 MVN R0,#+151
\ 00000044 C00FC0E3 BIC R0,R0,#0x300
\ 00000048 000090E5 LDR R0,[R0, #+0]
\ 0000004C 040010E3 TST R0,#0x4
\ 00000050 FAFFFF0A BEQ ??LowLevelInit_2
112
113 /* Wait for the master clock if it was already initialized */
114 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_3:
\ 00000054 9700E0E3 MVN R0,#+151
\ 00000058 C00FC0E3 BIC R0,R0,#0x300
\ 0000005C 000090E5 LDR R0,[R0, #+0]
\ 00000060 080010E3 TST R0,#0x8
\ 00000064 FAFFFF0A BEQ ??LowLevelInit_3
115
116 /* Switch to fast clock
117 **********************/
118 /* Switch to slow clock + prescaler */
119 AT91C_BASE_PMC->PMC_MCKR = BOARD_PRESCALER;
\ 00000068 CF00E0E3 MVN R0,#+207
\ 0000006C C00FC0E3 BIC R0,R0,#0x300
\ 00000070 0410A0E3 MOV R1,#+4
\ 00000074 001080E5 STR R1,[R0, #+0]
120 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_4:
\ 00000078 9700E0E3 MVN R0,#+151
\ 0000007C C00FC0E3 BIC R0,R0,#0x300
\ 00000080 000090E5 LDR R0,[R0, #+0]
\ 00000084 080010E3 TST R0,#0x8
\ 00000088 FAFFFF0A BEQ ??LowLevelInit_4
121
122 /* Switch to fast clock + prescaler */
123 AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
\ 0000008C CF00E0E3 MVN R0,#+207
\ 00000090 C00FC0E3 BIC R0,R0,#0x300
\ 00000094 000090E5 LDR R0,[R0, #+0]
\ 00000098 030090E3 ORRS R0,R0,#0x3
\ 0000009C CF10E0E3 MVN R1,#+207
\ 000000A0 C01FC1E3 BIC R1,R1,#0x300
\ 000000A4 000081E5 STR R0,[R1, #+0]
124 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_5:
\ 000000A8 9700E0E3 MVN R0,#+151
\ 000000AC C00FC0E3 BIC R0,R0,#0x300
\ 000000B0 000090E5 LDR R0,[R0, #+0]
\ 000000B4 080010E3 TST R0,#0x8
\ 000000B8 FAFFFF0A BEQ ??LowLevelInit_5
125
126 /* Initialize AIC
127 ****************/
128 AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
\ 000000BC DB00E0E3 MVN R0,#+219
\ 000000C0 E00EC0E3 BIC R0,R0,#0xE00
\ 000000C4 0010E0E3 MVN R1,#+0
\ 000000C8 001080E5 STR R1,[R0, #+0]
129 AT91C_BASE_AIC->AIC_SVR[0] = (unsigned int) defaultFiqHandler;
\ 000000CC 7F00E0E3 MVN R0,#+127
\ 000000D0 F00EC0E3 BIC R0,R0,#0xF00
\ 000000D4 A0109FE5 LDR R1,??LowLevelInit_1+0x4 ;; defaultFiqHandler
\ 000000D8 001080E5 STR R1,[R0, #+0]
130 for (i = 1; i < 31; i++) {
\ 000000DC 0100A0E3 MOV R0,#+1
\ 000000E0 0040B0E1 MOVS R4,R0
\ ??LowLevelInit_6:
\ 000000E4 FF4014E2 ANDS R4,R4,#0xFF ;; Zero extend
\ 000000E8 1F0054E3 CMP R4,#+31
\ 000000EC 0700002A BCS ??LowLevelInit_7
131
132 AT91C_BASE_AIC->AIC_SVR[i] = (unsigned int) defaultIrqHandler;
\ 000000F0 0400B0E1 MOVS R0,R4
\ 000000F4 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 000000F8 0410A0E3 MOV R1,#+4
\ 000000FC 910010E0 MULS R0,R1,R0
\ 00000100 78109FE5 LDR R1,??LowLevelInit_1+0x8 ;; defaultIrqHandler
\ 00000104 801F00E5 STR R1,[R0, #-3968]
133 }
\ 00000108 014094E2 ADDS R4,R4,#+1
\ 0000010C F4FFFFEA B ??LowLevelInit_6
134 AT91C_BASE_AIC->AIC_SPU = (unsigned int) defaultSpuriousHandler;
\ ??LowLevelInit_7:
\ 00000110 CB00E0E3 MVN R0,#+203
\ 00000114 E00EC0E3 BIC R0,R0,#0xE00
\ 00000118 64109FE5 LDR R1,??LowLevelInit_1+0xC ;; defaultSpuriousHandler
\ 0000011C 001080E5 STR R1,[R0, #+0]
135
136 // Unstack nested interrupts
137 for (i = 0; i < 8 ; i++) {
\ 00000120 0000A0E3 MOV R0,#+0
\ 00000124 0040B0E1 MOVS R4,R0
\ ??LowLevelInit_8:
\ 00000128 FF4014E2 ANDS R4,R4,#0xFF ;; Zero extend
\ 0000012C 080054E3 CMP R4,#+8
\ 00000130 0500002A BCS ??LowLevelInit_9
138
139 AT91C_BASE_AIC->AIC_EOICR = 0;
\ 00000134 CF00E0E3 MVN R0,#+207
\ 00000138 E00EC0E3 BIC R0,R0,#0xE00
\ 0000013C 0010A0E3 MOV R1,#+0
\ 00000140 001080E5 STR R1,[R0, #+0]
140 }
\ 00000144 014094E2 ADDS R4,R4,#+1
\ 00000148 F6FFFFEA B ??LowLevelInit_8
141
142 // Enable Debug mode
143 AT91C_BASE_AIC->AIC_DCR = AT91C_AIC_DCR_PROT;
\ ??LowLevelInit_9:
\ 0000014C C700E0E3 MVN R0,#+199
\ 00000150 E00EC0E3 BIC R0,R0,#0xE00
\ 00000154 0110A0E3 MOV R1,#+1
\ 00000158 001080E5 STR R1,[R0, #+0]
144
145 /* Watchdog initialization
146 *************************/
147 AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
\ 0000015C BB00E0E3 MVN R0,#+187
\ 00000160 800FC0E3 BIC R0,R0,#0x200
\ 00000164 801CA0E3 MOV R1,#+32768
\ 00000168 001080E5 STR R1,[R0, #+0]
148
149 /* Remap
150 *******/
151 BOARD_RemapRam();
\ 0000016C ........ BL BOARD_RemapRam
152 }
\ 00000170 1040BDE8 POP {R4,LR}
\ 00000174 1EFF2FE1 BX LR ;; return
\ ??LowLevelInit_1:
\ 00000178 0E104810 DC32 0x1048100e
\ 0000017C ........ DC32 defaultFiqHandler
\ 00000180 ........ DC32 defaultIrqHandler
\ 00000184 ........ DC32 defaultSpuriousHandler
153
Maximum stack usage in bytes:
Function .cstack
-------- -------
LowLevelInit 8
defaultFiqHandler 0
defaultIrqHandler 0
defaultSpuriousHandler 0
Section sizes:
Function/Label Bytes
-------------- -----
??defaultSpuriousHandler_0 4
??defaultFiqHandler_0 4
??defaultIrqHandler_0 4
LowLevelInit 392
404 bytes in section .text
404 bytes of CODE memory
Errors: none
Warnings: none
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