pe82930.rd1

mcs51,2051,x86系列MCU

#Clock 82930 1001#
Xtal frequency supplied is 6.0 Mhz.
At this Xtal frequency, PLLSEL2, PLLSEL1, and PLLSEL0 must be 0,0,1.
The USB Data Rate will be 1.5 Mbps and the PLL is Off.
#Clock 82930 1002#
At this Xtal frequency, PLLSEL2 must be set, and PLLSEL0 must be clear.
Core operating frequency and USB Data Rate are determined by PLLSEL1.
If PLLSEL1 is set, the USB Data Rate is 12 Mbps and the Core operating
frequency is 12 Mhz.  If PLLSEL1 is clear, the USB Data Rate is 1.5 Mbps
and the Core operating frequency is 6 Mhz.
#Clock 82930 1000#
This is used to select one of 3 valid configurations for PLLSEL2, PLLSEL1, and PLLSEL0.
This setting is used in conjunction with the Input Xtal frequency to determine the Internal
operating frequency and the USB Data Rate.
#USB 82930 2001#
Enables Generation of an Interrupt when a transmission is complete.
#USB 82930 2002#
Enables Generation of an Interrupt when a reception is complete.
#USB 82930 2003#
Receive Single packet mode.  This bit is used to configure the receive endpoint for single data packet operation.
When enabled, only one data packet is allowed to reside in the Rx FIFO.
#USB 82930 2005#
Rx FIFO wait-state read.  For applications which use arithmetic instructions,
setting this will read the Rx FIFO with 1-wait-state to eliminate critical path problems at 12Mhz.
#USB 82930 2007#
This is used to set the Transmit and Receive FIFO buffer sizes for Endpoint 1.
SETTING  TX FIFO (bytes)  RXFIFO (bytes)
---------------------------------------
0              256                 256
1              512                 512
2              1024                0
3              0                   1024
#USB 82930 2041#
Total Length of data returned for this configuration.  Includes the combined length
of all descriptors (configuration, interface, endpoint) returned for this configuration.
#USB 82930 2042#
Number of interfaces supported by this configuration.
#USB 82930 2043#
Value to use as an argument to Set Configuration to select this configuration.
#USB 82930 2044#
Index of string descriptor describing this configuration.
#USB 82930 2045#
Configuration characteristics.  A device configuration that uses power from the bus
and a local source sets both D7 and D6.  The actual power source at runtime may be
determined using the Get Status device request.  If a device configuration supports
remote wakeup, D5 is set.
#USB 82930 2046#
Maximum power consumption of the USB device from the bus in this specific configuration
when the device is fully operational.  Expressed in 2mA units (ie.  50=100mA).
#USB 82930 2047#
Number of interface.  Zero-based value identifying the index in the array of
concurrent interfaces supported by this configuration.
#USB 82930 2048#
Value used to select alternate setting for the interface identified in the prior field.
#USB 82930 2049#
Number of endpoints used by this interface (excluding endpoint zero). If
this value is 0, this interface uses only endpoint zero.
#USB 82930 2050#
Class code (assigned by USB).
If this field is reset to 0, the interface does not belong to any USB specified device class.
If this field is set to 0xFF, the interface class is vendor specific.
All other values are reserved for assignment by USB.
#USB 82930 2051#
Subclass code (assigned by USB).
These codes are qualified by the value of the bInterfaceClass (Class Code) field.
If the bInterfaceClass field is reset to 0, this field must also be reset to 0.
If the bInterfaceClass field is not set to 0xFF, all values are reserved for assignment by USB.
#USB 82930 2052#
Protocol code (assigned by USB).  These codes are qualified by the value of the
bInterfaceClass (Class Code) and bInterfaceSubClass (SubClass code) fields.
If an interface supports class-specific requests, this code identifies the protocols
that the device uses as defined by the specification of the device class.
If this field is reset to 0, the device does not use a class specific protocol on this interface.
If this field is set to 0xFF, the device uses a vendor specific protocol for this interface.
#USB 82930 2053#
Index of string descriptor describing this interface.
#USB 82930 2054#
EndPoint Number being configured.
#USB 82930 2058#
EndPoint direction.  0 = OUT, 1 = IN.  Ignored for control endpoints.
#USB 82930 2055#
This field describes the endpoint's attributes when it is configured using the bConfigurationValue.
Bits 0..1 determine the transfer type.
00      Control
01      Isochronous
10      Bulk
11      Interrupt
All other bits are reserved.
#USB 82930 2056#
Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected.
For isochronous endpoints, this value is used to reserve the bus time in the schedule, required
for the per frame data payloads.  The pipe may, on an ongoing basis, actually use less
bandwidth than that reserved.  The device reports, if necessary, the actual bandwidth used
via its normal, non-USB defined mechanisms.
For interrupt, bulk, and control endpoints smaller data payloads may be sent, but will
terminate the transfer and may or may not require intervention to restart.
#USB 82930 2057#
Interval for polling endpoint for data transfers.  Expressed in milliseconds. 
This field is ignored for bulk and control endpoints.  For isochronous endpoints
this field must be set to 1.  For interrupt endpoints, this field may range from 1..255
#USB 82930 2030#
USB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 0210H).
This field identifies the release of the USB Specification that the device and
its descriptors are compliant with.
#USB 82930 2031#
Class code (assigned by USB).
If this field is reset to 0, each interface within a configuration specifies its own
class information and the various interfaces operate independently.
If this field is set to a value between 1 and 0xFE, the device supports different class
specifications on different interfaces and the interfaces may not operate independently.
This value identifies the class definition used for the aggregate interfaces.  If this
field is set to 0xFF, the device class is vendor specific.
#USB 82930 2032#
Subclass Code (assigned by USB).
These codes are qualified by the value of the bDeviceClass field.
If the bDeviceClass field is reset to 0, this field must also be reset to 0.
If the bDeviceClass field is not set to 0xFF, all values are reserved for assignment by USB.
#USB 82930 2033#
Protocol code (assigned by USB).
These codes are qualified by the value of the bDeviceClass and the bDeviceSubClass fields.
If a device supports class-specific protocolos on a device basis as opposed to an interface
basis, this code identifies the protocols that the device uses as defined by the specification of the device class.
If this field is reset to 0, the device does not use class specific protocolos on a
device basis.  However, it may use class specific protocols on an interface basis.
If this field is set to 0xFF, the device uses a vendor specific protocol on a device basis.
#USB 82930 2034#
Maximum packet size for endpoint zero.
#USB 82930 2035#
Vendor ID (assigned by USB).
#USB 82930 2036#
Product ID (assigned by the manufacturer).
#USB 82930 2037#
Device release number in binary-coded decimal.
#USB 82930 2038#
Index of string descriptor describing manufacturer.
#USB 82930 2039#
Index of string descriptor describing product.
#USB 82930 2040#
Index of string descriptor describing the device's serial number.
#USB 82930 2008#
Setting this option causes the read pointer and read marker to be adjusted automatically.
When this bit is set, setting REV_RP or ADV_RM has no effect.  Software
can read and write this bit; hardware neither clears nor sets this bit.
#USB 82930 2010#
Setting this option causes the write pointer and write marker to be adjusted automatically.
When this bit is set, setting REV_WP or ADV_WM has no effect.  Software
can read and write this bit; hardware neither clears nor sets this bit.
#USB 82930 2009#
Software sets this bit to indicate that TXFIFOx contains isochronous data.
This bit must be cleared by software.  The SIU uses this bit to set up the 
handshake protocol at the end of a transmission.
#USB 82930 2011#
Software sets this bit to indicate that RXFIFOx is programmed to receive
isochronous data and to set up the USB interface to handle an isochronous
data transfer.  This bit must be cleared by software.
#USB 82930 2004#
This setting adjusts the Interrupt priority for the associated interrupt.
#USB 82930 2000#
Endpoint Selection.
#USB 82930 2015#
Setting this enables the Transmit output (TX_OE), and the Transmit endpoint (TXEP_E).
#USB 82930 2016#
Setting this enables the Receive input (RX_IE), and the Receive endpoint (RXEP_E).
#USB 82930 2017#
Set this to configure the endpoint as a control endpoint.
Endpoint 0 must be configured as a Control Endpoint.
Selecting this sets BOTH the CTP_EP and the RXSPM bits.
#USB 82930 2018#
Setting this bit flushes TXFIFOx, sets the EMPTY bit in TXFLGx, and clears
all other bits in TXFLGx.  After the flush, hardware clears this bit.  Setting
this bit does not affect the ATM and ISO bits.
#USB 82930 2019#
Software sets this bit to flush the entire FIFO.  All flags in RXFLGx revert to
their reset states (EMPTY is set; all other flags clear).  The ARM and ISO bits
are not affected by this operation.  Hardware clears this bit when the flush
operation is completed.
#Serial 82930 600#
Serial Port Mode 0.

Serial data enters and exits through RXD. TXD outputs the shift clock.
8 bits are transmited/received: 8 data bits (LSB first).
The baud rate is fixed at 1/12 the oscillator frequency.
The mode is set in SCON.6 - SCON.7
#Serial 82930 601#
Serial Port Mode 1.

10 bits are transmited (through TXD) or received (through RXD); a
start bit (0), 8 data bits(LSB first), and a stop bit (1).
On receive, the stop bit goes into RB8 in SFR SCON.
The baud rate is variable
The mode is set in SCON.6 - SCON.7
#Serial 82930 602#
Serial Port Mode 2.

11 bits are transmited (through TXD) or received (through RXD); a
start bit (0), 8 data bits(LSB first),a programmable 9th data bit,
and a stop bit (1).
On Transmit, the 9th data bit(TB8 IN SCON) can be assigned the value of 0
or 1. On receive, the 9th data bit goes into RB8 in SCON, while the stop bit
is ignored. (The validity of the stop bit can be checked with Framing
Error Detection.)  Similar to Mode 3 except baud rate.
The baud rate is programmable to either 1/32 or 1/64 the oscillator frequency.
The mode is set in SCON.6 - SCON.7
#Serial 82930 603#
Serial Port Mode 3.

11 bits are transmited (through TXD) or received (through RXD); a
start bit (0), 8 data bits(LSB first),a programmable 9th data bit,
and a stop bit (1).
On Transmit, the 9th data bit(TB8 IN SCON) can be assigned the value of 0
or 1. On receive, the 9th data bit goes into RB8 in SCON, while the stop bit
is ignored. (The validity of the stop bit can be checked with Framing
Error Detection.)  Similar to Mode 2 except baud rate.
The baud rate is variable.
The mode is set in SCON.6 - SCON.7
#Serial 82930 703#
Serial Port Interrupt.

The serial port interrupt is generated by the logical OR of bits
RI and TI in register SCON. Neither of these flags are cleared
by hardware when the service rountine is vectored to. The service
rountine will normally have to determine whether it was RI or TI that
generated the interrupt, and the bit will have to be cleared in software.
The Serial Port Interrupt enables ES in the IE register.
#Serial 82930 700#
Framing Error Dtection.

Allows the serial port to check for valid stop bits in modes 1, 2, or 3.
A missing stop bit can be caused, for example, by noise on the serial lines,
or transmission by two CPUs simultaneously. Once set the FE bit miust be cleared by software.
A valid stop bit will not clear FE. The FE is located in SCON and shares the same bit
as SMO. Control bit (SMOD) in the PCON register determines whether SMO or FE is accessed.
#Serial 82930 701#
Automatic Address Recognition.

Reduces the CPU time required to service the serial port. With
this feature enabled in one of the 9-bit modes, the Receive
Interrupt flag will only get set when the received byte corresponds to
either a Given or Broadcast address.
#Serial 82930 202#
#Serial 82930 203#
The 9th data bit allows the controller to distinguish between address and data bytes.
The 9th data byte is set to 1 for address bytes and set to 0 for
data bytes. When receiving, the 9th data bit goes into RB8 in SCON.
When transmitting, TB8 is set or cleared in software.
#Serial 82930 502#
Enable Transmitt by clearing REN bit in SCON.4.
#Serial 82930 503#
Enable Reception by setting the REN bit in SCON.4.
#Serial 82930 300#
Internal Clock Source.

This option selects an internal clock source for the baud-rate generator.
When an internal clock source is selected, the XTAL1 input signal (Fosc)
becomes the clock input to the baud-rate generator.
#Serial 82930 301#
External Clock.

This option selects an external clock source for the baud-rate generator.
When an external clock source is selected, the external signal on the T1CLK pin
or T2CLK pin becomes the clock input into the baud-rate generator.
#Serial 82930 104#
#Serial 82930 110#
Serial Port Baud Rate

When Timer 1 is used as the baud rate generator, the baud rates in Modes 1 and 3
are determined by the Timer 1 overflow rate and the value of SMOD1 in Special
Function Register PCON. as follows:

Baud Rate = 2^SMOD1