80c186ea.h

mcs51,2051,x86系列MCU

/*
 *  Copyright (c) 1995, Intel Corporation
 *
 *  $Workfile:   80c186ea.h  $
 *  $Revision:   1.1  $
 *  $Modtime:   Mar 22 1995 16:55:14  $
 *
 *  Purpose:
 *
 *
 *
 *
 *
 *  Compiler:       
 *
 *  Ext Packages:   
 *
 * 
 *
 */
/*  80C186EA REGISTER DEFINITIONS */
#ifndef _80C186EA_
/*
  Modify the PCB_BASE symbol to represent
  the contents of the Relocation register (RELREG).

   Set Default condtion for placement of the Peripheral
   Control Block.
*/
#ifndef  _MEM_SPACE
#define  _IO_SPACE_
#endif

/*  Note: when placing the Peripheral Control Block(PCB) into
    the memory space define the PCB_BASE in terms of segment:offset.
    ie.  a PCB base address of 0x1f000 should define PCB_BASE as
    #define PCB_BASE  0x1000f000L.
*/
    /* Set Default condition for PCB address */
#ifndef PCB_BASE
#ifndef _MEM_SPACE_
#define PCB_BASE    0xff00
#else
#define PCB_BASE    0xff00000L
#endif
#endif

/* This typedef assumes that an unsigned int is a 16-bit value, if your
   compiler's "unsigned int" is not a 16-bit value modify the typedef to
   a data type that is a 16-bit value.
*/
typedef unsigned int _WORD16_;

  /* Note: The "far" keyword is used to create a far pointer to the
           registers.  Some compilers may not support the "far" keyword,
           you will need to modify "_WORD16_ far *" to match what your  
           compiler supports.
  */
#ifdef _MEM_SPACE_
#define _MAKE_ADDRESS_(offset) (*((_WORD16_ far *) (PCB_BASE +(offset))))
#define _Set186Register(reg,val) ((reg) = (val))
#define _Set186RegisterByte(reg,val) _Set186Register(reg,val)
#define _Get186Register(reg) (reg)
#else
#define _MAKE_ADDRESS_(offset) (PCB_BASE + (offset))
#define _Set186Register(reg,val) (outpw(reg,val))
#define _Set186RegisterByte(reg,val) (outp(reg,val))
#define _Get186Register(reg) (inpw(reg))
#endif

    /*  INTERRUPT CONTROL REGISTERS  */
#define INTVEC  _MAKE_ADDRESS_(0x20)
#define EOI     _MAKE_ADDRESS_(0x22)
#define POLL    _MAKE_ADDRESS_(0x24)
#define POLLSTS _MAKE_ADDRESS_(0x26)
#define IMASK   _MAKE_ADDRESS_(0x28)
#define PRIMSK  _MAKE_ADDRESS_(0x2A)
#define INSERV  _MAKE_ADDRESS_(0x2C)
#define REQST   _MAKE_ADDRESS_(0x2E)
#define INTSTS  _MAKE_ADDRESS_(0x30)
#define TCUCON  _MAKE_ADDRESS_(0x32)
#define DMA0CON _MAKE_ADDRESS_(0x34)
#define DMA1CON _MAKE_ADDRESS_(0x36)
#define I0CON   _MAKE_ADDRESS_(0x38)
#define I1CON   _MAKE_ADDRESS_(0x3A)
#define I2CON   _MAKE_ADDRESS_(0x3C)
#define I3CON   _MAKE_ADDRESS_(0x3E)

    /*  TIMER CONTROL REGISTERS  */
#define T0CNT   _MAKE_ADDRESS_(0x50)
#define T0CMPA  _MAKE_ADDRESS_(0x52)
#define T0CMPB  _MAKE_ADDRESS_(0x54)
#define T0CON   _MAKE_ADDRESS_(0x56)
#define T1CNT   _MAKE_ADDRESS_(0x58)
#define T1CMPA  _MAKE_ADDRESS_(0x5A)
#define T1CMPB  _MAKE_ADDRESS_(0x5C)
#define T1CON   _MAKE_ADDRESS_(0x5E)
#define T2CNT   _MAKE_ADDRESS_(0x60)
#define T2CMPA  _MAKE_ADDRESS_(0x62)
#define T2CON   _MAKE_ADDRESS_(0x66)

    /* CHIP SELECT CONTROL REGISTERS  */
#define UMCS    _MAKE_ADDRESS_(0xA0)
#define LMCS    _MAKE_ADDRESS_(0xA2)
#define MMCS    _MAKE_ADDRESS_(0xA6)
#define MPCS    _MAKE_ADDRESS_(0xA8)
#define PACS    _MAKE_ADDRESS_(0xA4)

    /*  DMA CONTROL REGISTERS  */
#define D0SRCL  _MAKE_ADDRESS_(0xC0)
#define D0SRCH  _MAKE_ADDRESS_(0xC2)
#define D0DSTL  _MAKE_ADDRESS_(0xC4)
#define D0DSTH  _MAKE_ADDRESS_(0xC6)
#define D0TC    _MAKE_ADDRESS_(0xC8)
#define D0CON   _MAKE_ADDRESS_(0xCA)
#define D1SRCL  _MAKE_ADDRESS_(0xD0)
#define D1SRCH  _MAKE_ADDRESS_(0xD2)
#define D1DSTL  _MAKE_ADDRESS_(0xD4)
#define D1DSTH  _MAKE_ADDRESS_(0xD6)
#define D1TC    _MAKE_ADDRESS_(0xD8)
#define D1CON   _MAKE_ADDRESS_(0xDA)

    /*  REFRESH CONTROL REGISTERS  */
#define RFBASE  _MAKE_ADDRESS_(0xE0)
#define RFTIME  _MAKE_ADDRESS_(0xE2)
#define RFCON   _MAKE_ADDRESS_(0xE4)

    /*  POWER MANAGEMENT REGISTERS  */
#define PWRSAV  _MAKE_ADDRESS_(0xF0)
#define PWRCON  _MAKE_ADDRESS_(0xF2)

    /*  STEPPING ID REGISTER  */
#define STEPID  _MAKE_ADDRESS_(0xF6)

    /*  RELOCATION REGISTER  */
#define RELREG  _MAKE_ADDRESS_(0xFE)
#define RELREG_OFFSET	0xFE

#endif