📄 186c.cod
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/* DMA Priority Register
* DMA Module B Priority = $%tDMAPRI.2$High$Low$
* Internal DMA Request for Module B = $%tDMAPRI.10$Serial Chan1$Timer 2$
*/
_Set186Register(DMAPRI , 0x$$DMAPRI$);
}
##80C186EC Timer2#
##80C186EB Timer2#
##80C186XL Timer2#
##80C186EA Timer2#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
$$IFP$ 80C186EC
#include "80c186ec.h"
$$END$
$$IFP$ 80C186EB
#include "80c186eb.h"
$$END$
$$IFP$ 80C186EA || 80C186XL
#include "80c186ea.h"
$$END$
void Init_Timer2(void)
{
/* Load Timer Compare Register A */
_Set186Register(T2CMPA , 0x$$T2CMPA$);
/* Clear Timer 2 Count Register */
_Set186Register(T2CNT , 0);
/* Timer 2 Control Register
* Enable =($$T2CON.15$) $%eT2CON.15$
* Inhibit = ($$T2CON.14$) $%tT2CON.14$Enable Change Allowed$Enable Change NOT Allowed$
* Interrupt = ($$T2CON.13$) $%tT2CON.13$Interrupt at MC$No Interrupt$
* Continuous Mode = ($$T2CON.0$) $%eT2CON.0$
*/
_Set186Register(T2CON , 0x$$T2CON$);
}
##80C186EC Timer1#
##80C186EB Timer1#
##80C186XL Timer1#
##80C186EA Timer1#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
$$IFP$ 80C186EC
#include "80c186ec.h"
$$END$
$$IFP$ 80C186EB
#include "80c186eb.h"
$$END$
$$IFP$ 80C186EA || 80C186XL
#include "80c186ea.h"
$$END$
void Init_Timer1(void)
{
/* Load Timer Compare Register A */
_Set186Register(T1CMPA , 0x$$T1CMPA$);
/* Load Timer Compare Register B */
_Set186Register(T1CMPB , 0x$$T1CMPB$);
/* Clear Timer 1 Counter Register */
_Set186Register(T1CNT , 0);
/* Timer 1 Control Register
* Enable = ($$T1CON.15$) $%eT1CON.15$
* Inhibit = ($$T1CON.14$) $%tT1CON.14$Enable Change Allowed$Enable Change NOT Allowed$
* Interrupt = ($$T1CON.13$) $%tT1CON.13$Interrupt at MC$No Interrupt$
* Retrigger = ($$T1CON.4$) $%eT1CON.4$
* Prescaler = ($$T1CON.3$) $%eT1CON.3$
* External Clock = ($$T1CON.2$) $%tT1CON.2$External Clock$Internal Clock$
* Alternate Compare Register = ($$T1CON.1$) $%eT1CON.1$
* Continuous Mode = ($$T1CON.0$) $%eT1CON.0$
*/
_Set186Register(T1CON , 0x$$T1CON$);
}
##80C186EC Timer0#
##80C186EB Timer0#
##80C186XL Timer0#
##80C186EA Timer0#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
$$IFP$ 80C186EC
#include "80c186ec.h"
$$END$
$$IFP$ 80C186EB
#include "80c186eb.h"
$$END$
$$IFP$ 80C186EA || 80C186XL
#include "80c186ea.h"
$$END$
void Init_Timer0(void)
{
/* Timer Compare Register A */
_Set186Register(T0CMPA , 0x$$T0CMPA$);
/* Timer Compare Register B */
_Set186Register(T0CMPB , 0x$$T0CMPB$);
/* Clear Timer 0 Count Register */
_Set186Register(T0CNT , 0);
/* Timer 0 control register
* Enable = ($$T0CON.15$) $%eT0CON.15$
* Inhibit = ($$T0CON.14$) $%tT0CON.14$Enable Change Allowed$Enable Change NOT Allowed$
* Interrupt = ($$T0CON.13$) $%tT0CON.13$Interrupt at MC$No Interrupt$
* Retrigger = ($$T0CON.4$) $%eT0CON.4$
* Prescaler = ($$T0CON.3$) $%eT0CON.3$
* External Clock = ($$T0CON.2$) $%tT0CON.2$External Clock$Internal Clock$
* Alternate Compare Register = ($$T0CON.1$) $%eT0CON.1$
* Continuous Mode = ($$T0CON.0$) $%eT0CON.0$
*/
_Set186Register(T0CON , 0x$$T0CON$);
}
##80C186EC PCB#
##80C186EB PCB#
##80C186XL PCB#
##80C186EA PCB#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
$$IFP$ 80C186EC
#include "80c186ec.h"
$$END$
$$IFP$ 80C186EB
#include "80c186eb.h"
$$END$
$$IFP$ 80C186EA || 80C186XL
#include "80c186ea.h"
$$END$
void Init_PCB(void)
{
/* Escape Trap = $%eRELREG.15$
* Memory I/O = $%tRELREG.12$Memory$I/O$ Space
*
* Old PCB Start Address = 0FF00H (in I/O space)
$$IF$ RELREG.12
* New PCB Start Address = 0$$RELREG.0-11$00H (in memory space)
*
* Move PCB from the I/O space to memory space
$$END$
$$IFN$ RELREG.12
* New PCB Start Address = 0$$RELREG.0-7$0000H (in I/O space)
*
* Move PCB within the I/O space
$$END$
*/
outp(0xFF00 + RELREG_OFFSET, 0x$$RELREG$);
}
##80C186XL CSU#
##80C186EA CSU#
##80C186XL BIU#
##80C186EA BIU#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ea.h"
void Init_ChipSelects(void)
{
/* UCS Chip Select
* Bus Ready Disable = ($$UMCS.2$) $%tUMCS.2$Bus Ready Disabled$Bus Ready Enabled$
* Start Address = @@UMCSSTART@
* Wait States = @@UMCSWS@
*/
_Set186Register(UMCS , 0x$$UMCS$);
/* LCS Chip Select
* Bus Ready Disable = ($$LMCS.2$) $%tLMCS.2$Bus Ready Disabled$Bus Ready Enabled$
* End Address = @@LMCSEND@
* Wait States = @@LMCSWS@
*/
_Set186Register(LMCS , 0x$$LMCS$);
/* MPCS and PCS Chip Selects
* MCS Block Size = @@MCSBLK@
* PCS5 and PCS6 Pin Selector = ($$MPCS.7$) $%tMPCS.7$Chip Selects$Latched Address Bits A1 & A2$
* PCS Bus Cycle Selector = ($$MPCS.6$) $%tMPCS.6$Memory Bus Cycle$I/O Bus Cycle$
* PCS4-PCS6 Bus Ready Disable = ($$MPCS.2$) $%tMPCS.2$Bus Ready Disabled$Bus Ready Enabled$
* PCS4-PCS6 Wait States = @@PCS4WS@
*/
_Set186Register(MPCS , 0x$$MPCS$);
/* MCS Chip Select
* Bus Ready Disable = ($$MMCS.2$) $%tMMCS.2$Bus Ready Disabled$Bus Ready Enabled$
* Start Address = @@MCSSTART@
* Wait States = @@MCSWS@
*/
_Set186Register(MMCS , 0x$$MMCS$);
/* PCS Control Register
* Bus Ready Disable = ($$PACS.2$) $%tPACS.2$Bus Ready Disabled$Bus Ready Enabled$
* PCS Wait States = @@PCSWS@
* Start Address = @@PCSSTART@
*/
_Set186Register(PACS , 0x$$PACS$);
}
##80C186EB CSU#
##80C186EC CSU#
##80C186EB BIU#
##80C186EC BIU#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
$$IFP$ 80C186EC
#include "80c186ec.h"
$$END$
$$IFP$ 80C186EB
#include "80c186eb.h"
$$END$
void Init_ChipSelects(void)
{
/* Upper Chip Select
* Initialize Start Register
* Start Address = @@UCSSTART@
* Wait States = @@UCSWS@
*/
_Set186Register(UCSST , 0x$$UCSST$);
/* Stop Register
* Stop Address = @@UCSSTOP@
* Chip Select Enable = ($$UCSSP.3$) $%eUCSSP.3$
* Ignore Stop Address = ($$UCSSP.2$) Stop Address $%tUCSSP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$UCSSP.1$) $%tUCSSP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$UCSSP.0$) Bus Ready $%eUCSSP.0$
*/
_Set186Register(UCSSP , 0x$$UCSSP$);
/* Lower Chip Select
* Initialize Start Register
* Start Address = @@LCSSTART@
* Wait States = @@LCSWS@
*/
_Set186Register(LCSST , 0x$$LCSST$);
/* Stop Register
* Stop Address = @@LCSSTOP@
* Chip Select Enable = ($$LCSSP.3$) $%eLCSSP.3$
* Ignore Stop Address = ($$LCSSP.2$) Stop Adderss $%tLCSSP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$LCSSP.1$) $%tLCSSP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$LCSSP.0$) Bus Ready $%eLCSSP.0$
*/
_Set186Register(LCSSP , 0x$$LCSSP$);
/* GCS0
* Start Register
* Start Address = @@GCS0START@
* Wait States = @@GCS0WS@
*/
_Set186Register(GCS0ST , 0x$$GCS0ST$);
/* Stop Register
* Stop Address = @@GCS0STOP@
* Chip Select Enable = ($$GCS0SP.3$) $%eGCS0SP.3$
* Ignore Stop Address = ($$GCS0SP.2$) Stop Address $%tGCS0SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS0SP.1$) $%tGCS0SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS0SP.0$) Bus Ready $%eGCS0SP.0$
*/
_Set186Register(GCS0SP , 0x$$GCS0SP$);
/* GCS1
* Start Register
* Start Address = @@GCS1START@
* Wait States = @@GCS1WS@
*/
_Set186Register(GCS1ST , 0x$$GCS1ST$);
/* Stop Register
* Stop Address = @@GCS1STOP@
* Chip Select Enable = ($$GCS1SP.3$) $%eGCS1SP.3$
* Ignore Stop Address = ($$GCS1SP.2$) Stop Address $%tGCS1SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS1SP.1$) $%tGCS1SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS1SP.0$) Bus Ready $%eGCS1SP.0$
*/
_Set186Register(GCS1SP , 0x$$GCS1SP$);
/* GCS2
* Start Register
* Start Address = @@GCS2START@
* Wait States = @@GCS2WS@
*/
_Set186Register(GCS2ST , 0x$$GCS2ST$);
/* Stop Register
* Stop Address = @@GCS2STOP@
* Chip Select Enable = ($$GCS2SP.3$) $%eGCS2SP.3$
* Ignore Stop Address = ($$GCS2SP.2$) Stop Address $%tGCS2SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS2SP.1$) $%tGCS2SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS2SP.0$) Bus Ready $%eGCS2SP.0$
*/
_Set186Register(GCS2SP , 0x$$GCS2SP$);
/* GCS3
* Start Register
* Start Address = @@GCS3START@
* Wait States = @@GCS3WS@
*/
_Set186Register(GCS3ST , 0x$$GCS3ST$);
/* Stop Register
* Stop Address = @@GCS3STOP@
* Chip Select Enable = ($$GCS3SP.3$) $%eGCS3SP.3$
* Ignore Stop Address = ($$GCS3SP.2$) Stop Address $%tGCS3SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS3SP.1$) $%tGCS3SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS3SP.0$) Bus Ready $%eGCS3SP.0$
*/
_Set186Register(GCS3SP , 0x$$GCS3SP$);
/* GCS4
* Start Register
* Start Address = @@GCS4START@
* Wait States = @@GCS4WS@
*/
_Set186Register(GCS4ST , 0x$$GCS4ST$);
/* Stop Register
* Stop Address = @@GCS4STOP@
* Chip Select Enable = ($$GCS4SP.3$) $%eGCS4SP.3$
* Ignore Stop Address = ($$GCS4SP.2$) Stop Address $%tGCS4SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS4SP.1$) $%tGCS4SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS4SP.0$) Bus Ready $%eGCS4SP.0$
*/
_Set186Register(GCS4SP , 0x$$GCS4SP$);
/* GCS5
* Start Register
* Start Address = @@GCS5START@
* Wait States = @@GCS5WS@
*/
_Set186Register(GCS5ST , 0x$$GCS5ST$);
/* Stop Register
* Stop Address = @@GCS5STOP@
* Chip Select Enable = ($$GCS5SP.3$) $%eGCS5SP.3$
* Ignore Stop Address = ($$GCS5SP.2$) Stop Address $%tGCS5SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS5SP.1$) $%tGCS5SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS5SP.0$) Bus Ready $%eGCS5SP.0$
*/
_Set186Register(GCS5SP , 0x$$GCS5SP$);
/* GCS6
* Start Register
* Start Address = @@GCS6START@
* Wait States = @@GCS6WS@
*/
_Set186Register(GCS6ST , 0x$$GCS6ST$);
/* Stop Register
* Stop Address = @@GCS6STOP@
* Chip Select Enable = ($$GCS6SP.3$) $%eGCS6SP.3$
* Ignore Stop Address = ($$GCS6SP.2$) Stop Address $%tGCS6SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS6SP.1$) $%tGCS6SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS6SP.0$) Bus Ready $%eGCS6SP.0$
*/
_Set186Register(GCS6SP , 0x$$GCS6SP$);
/* GCS7
* Start Register
* Start Address = @@GCS7START@
* Wait States = @@GCS7WS@
*/
_Set186Register(GCS7ST , 0x$$GCS7ST$);
/* Stop Register
* Stop Address = @@GCS7STOP@
* Chip Select Enable = ($$GCS7SP.3$) $%eGCS7SP.3$
* Ignore Stop Address = ($$GCS7SP.2$) Stop Address $%tGCS7SP.2$Disabled$Enabled$
* Bus Cycle Selector = ($$GCS7SP.1$) $%tGCS7SP.1$Memory Bus Cycle$I/O Bus Cycle$
* Bus Ready Enable = ($$GCS7SP.0$) Bus Ready $%eGCS7SP.0$
*/
_Set186Register(GCS7SP , 0x$$GCS7SP$);
}
##80C186EC IO1#
##80C186EB IO1#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
$$IFP$ 80C186EC
#include "80c186ec.h"
$$END$
$$IFP$ 80C186EB
#include "80c186eb.h"
$$END$
void Init_IO_Port1(void)
{
/*
* P1.7/GCS7 = ($$P1CON.7$) $%tP1CON.7$Chip Select Pin$I/O Pin$
* P1.6/GCS6 = ($$P1CON.6$) $%tP1CON.6$Chip Select Pin$I/O Pin$
* P1.5/GCS5 = ($$P1CON.5$) $%tP1CON.5$Chip Select Pin$I/O Pin$
* P1.4/GCS4 = ($$P1CON.4$) $%tP1CON.4$Chip Select Pin$I/O Pin$
* P1.3/GCS3 = ($$P1CON.3$) $%tP1CON.3$Chip Select Pin$I/O Pin$
* P1.2/GCS2 = ($$P1CON.2$) $%tP1CON.2$Chip Select Pin$I/O Pin$
* P1.1/GCS1 = ($$P1CON.1$) $%tP1CON.1$Chip Select Pin$I/O Pin$
* P1.0/GCS0 = ($$P1CON.0$) $%tP1CON.0$Chip Select Pin$I/O Pin$
*/
_Set186Register(P1CON , 0x$$P1CON$);
}
##80C186EC IO2#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ec.h"
void Init_IO_Port2(void)
{
/*
* P2.7/CTS1 = ($$P2CON.7$) $%tP2CON.7$CTS1 Pin$I/O Pin$
* P2.6/BCLK1 = ($$P2CON.6$) $%tP2CON.6$BCLK1 Pin$I/O Pin$
* P2.5/BCLK0 = ($$P2CON.5$) $%tP2CON.5$TxD1 Pin$I/O Pin$
* P2.4/CTS1 = ($$P2CON.4$) $%tP2CON.4$RxD1 Pin$I/O Pin$
* P2.3/SINT1 = ($$P2CON.3$) $%tP2CON.3$CTS0 Pin$I/O Pin$
* P2.2/BLK1 = ($$P2CON.2$) $%tP2CON.2$BCLK0 Pin$I/O Pin$
* P2.1/TXD1 = ($$P2CON.1$) $%tP2CON.1$TxD0 Pin$I/O Pin$
* P2.0/RXD1 = ($$P2CON.0$) $%tP2CON.0$RxD0 Pin$I/O Pin$
*/
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