186a.cod

mcs51,2051,x86系列MCU

; P2.6 = ($$P2DIR.6$) $%tP2DIR.6$Input$Output$
; P2.5 = ($$P2DIR.5$) $%tP2DIR.5$Input$Output$
; P2.4 = ($$P2DIR.4$) $%tP2DIR.4$Input$Output$
; P2.3 = ($$P2DIR.3$) $%tP2DIR.3$Input$Output$
; P2.2 = ($$P2DIR.2$) $%tP2DIR.2$Input$Output$
; P2.1 = ($$P2DIR.1$) $%tP2DIR.1$Input$Output$
; P2.0 = ($$P2DIR.0$) $%tP2DIR.0$Input$Output$
    Set186Register P2DIR, 0$$P2DIR$H
    ret
Init_IO_Port2   ENDP
_TEXT   ENDS
END
##80C186EC IO3#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
INCLUDE 186ecmem.inc
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
INCLUDE 186ecio.inc
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_IO_Port3   Proc
; P3.3/DMAI1 = ($$P3CON.3$) $%tP3CON.3$DMAI1 Pin$I/O Pin$
; P3.2/DMAI0 = ($$P3CON.2$) $%tP3CON.2$DMAI0 Pin$I/O Pin$
; P3.1/TXI1  = ($$P3CON.1$) $%tP3CON.1$TxI1 Pin$I/O Pin$
; P3.0/RXI1  = ($$P3CON.0$) $%tP3CON.0$RxI1 Pin$I/O Pin$
    Set186Register P3CON, 0$$P3CON$H
;
; Initialize Port 3
; P3.4 = ($$P3DIR.3$) $%tP3DIR.3$Input$Output$
; P3.5 = ($$P3DIR.2$) $%tP3DIR.2$Input$Output$
    Set186Register P3DIR, 0$$P3DIR$H
    ret
Init_IO_Port3   ENDP
_TEXT   ENDS
END
##80C186?? RCU#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
  $$IFP$ 80C186EC
INCLUDE 186ecmem.inc
  $$END$
  $$IFP$ 80C186EB
INCLUDE 186ebmem.inc
  $$END$
  $$IFNP$ 80C186EB &! 80C186EC
INCLUDE 186eamem.inc
  $$END$
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
  $$IFP$ 80C186EC
INCLUDE 186ecio.inc
  $$END$
  $$IFP$ 80C186EB
INCLUDE 186ebio.inc
  $$END$
  $$IFNP$ 80C186EB &! 80C186EC
INCLUDE 186eaio.inc
  $$END$
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_RefreshCntrlUnit   Proc
;
; Initialize Refresh Address
; Refresh Address = @@REFADDR@
    Set186Register RFBASE, 0$$RFBASE$H
;
; Initialize Refresh Time
; Refresh Time = @@RFTIME@ usec at @@FREQ@ MHz
    Set186Register RFTIME, 0$$RFTIME$H
;
; Intialize Refresh Control Register
; Refresh Enable = $$RFCON.15$
    Set186Register RFCON, 0$$RFCON$H
    ret
Init_RefreshCntrlUnit   ENDP
_TEXT   ENDS
END
##80C186EC Serial0#
##80C186EB Serial0#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
  $$IFP$ 80C186EC
INCLUDE 186ecmem.inc
  $$END$
  $$IFP$ 80C186EB
INCLUDE 186ebmem.inc
  $$END$
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
  $$IFP$ 80C186EC
INCLUDE 186ecio.inc
  $$END$
  $$IFP$ 80C186EB
INCLUDE 186ebio.inc
  $$END$
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_SerialPort0    Proc
; Clocking = ($$B0CMP.15$) $%tB0CMP.15$Internal$External$
; Initialize Baud Rate Compare Register
; Baud Rate = @@BAUDRATE0@ at @@FREQ@ MHz
    Set186Register B0CMP, 0$$B0CMP$H

; Initialize Serial Port Control Register
; Serial Port Mode = @@SERMODE0@
; Clear to Send Enable = ($$S0CON.6$) $%eS0CON.6$
; Receive Enable = ($$S0CON.5$) $%eS0CON.5$
; Parity = ($$S0CON.4$) $%tS0CON.4$Even$Odd$
; Parity Enable = ($$S0CON.3$) $%eS0CON.3$
    Set186Register S0CON, 0$$S0CON$H
    ret
Init_SerialPort0    ENDP
_TEXT   ENDS
END
##80C186EC Serial1#
##80C186EB Serial1#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
  $$IFP$ 80C186EC
INCLUDE 186ecmem.inc
  $$END$
  $$IFP$ 80C186EB
INCLUDE 186ebmem.inc
  $$END$
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
  $$IFP$ 80C186EC
INCLUDE 186ecio.inc
  $$END$
  $$IFP$ 80C186EB
INCLUDE 186ebio.inc
  $$END$
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_SerialPort1    Proc

;
; Internal Clocking = $$B1CMP.15$
; Initialize Baud Rate Compare Register
; Baud Rate = @@BAUDRATE1@ at @@FREQ@ MHz
    Set186Register B1CMP, 0$$B1CMP$H
;
; Initialize Serial Port Control Register
; Serial Port Mode = @@SERMODE1@
; Clear to Send Enable = $$S1CON.6$
; Receive Enable = $$S1CON.5$
; Parity = $$S1CON.4$
; Parity Enable = $$S1CON.3$
    Set186Register S1CON, 0$$S1CON$H
    ret
Init_SerialPort1    ENDP
_TEXT   ENDS
END
##80C186XL ICU#
##80C186EA ICU#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
INCLUDE 186eamem.inc
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
INCLUDE 186eaio.inc
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_InterruptControlUnit   Proc
;
; Initialize Interrupt 0
; Special Fully Nested Mode = ($$I0CON.6$) $%eI0CON.6$
; Cascade Mode = ($$I0CON.5$) $%eI0CON.5$
; Level Trigger = ($$I0CON.4$) $%tI0CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I0CON.3$) Interrupts $%tI0CON.3$Masked$Enabled$
; Priority Level = @@INT0L@
    Set186Register I0CON, 0$$I0CON$H
;
; Initialize Interrupt 1
; Special Fully Nested Mode = ($$I1CON.6$) $%eI1CON.6$
; Cascade Mode = ($$I1CON.5$) $%eI1CON.5$
; Level Trigger = ($$I1CON.4$) $%tI1CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I1CON.3$) Interrupts $%tI1CON.3$Masked$Enabled$
; Priority Level = @@INT1L@
    Set186Register I1CON, 0$$I1CON$H
;
; Initialize Interrupt 2
; Level Trigger = ($$I2CON.4$) $%tI2CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I2CON.3$) Interrupts $%tI2CON.3$Masked$Enabled$
; Priority Level = @@INT2L@
    Set186Register I2CON, 0$$I2CON$H
;
; Initialize Interrupt 3
; Level Trigger = ($$I3CON.4$) $%tI3CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I3CON.3$) Interrupts $%tI3CON.3$Masked$Enabled$
; Priority Level = @@INT3L@
    Set186Register I3CON, 0$$I3CON$H
;
; Initialize DMA 0 Interrupt
; Interrupt Mask = ($$DMA0CON.3$) Interrupts $%tDMA0CON.3$Masked$Enabled$
; Priority Level = @@DMA0L@
    Set186Register DMA0CON, 0$$DMA0CON$H
;
; Initialize DMA 1 Interrupt
; Interrupt Mask = ($$DMA1CON.3$) Interrupts $%tDMA1CON.3$Masked$Enabled$
; Priority Level = @@DMA1L@
    Set186Register DMA1CON, 0$$DMA1CON$H
;
; Initialize Timers Interrupt
; Interrupt Mask = ($$TCUCON.3$) Interrupts $%tTCUCON.3$Masked$Enabled$
; Priority Level = @@TCUL@
    Set186Register TCUCON, 0$$TCUCON$H
    ret
Init_InterruptControlUnit   ENDP
_TEXT   ENDS
END
##80C186EB ICU#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
INCLUDE 186ebmem.inc
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
INCLUDE 186ebio.inc
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_InterruptControlUnit   Proc
; Initialize Interrupt 0
; Special Fully Nested Mode = ($$I0CON.6$) $%eI0CON.6$
; Cascade Mode = ($$I0CON.5$) $%eI0CON.5$
; Level Trigger = ($$I0CON.4$) $%tI0CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I0CON.3$) Interrupts $%tI0CON.3$Masked$Enabled$
; Priority Level = @@INT0L@
    Set186Register I0CON, 0$$I0CON$H
;
; Initialize Interrupt 1
; Special Fully Nested Mode = ($$I1CON.6$) $%eI1CON.6$
; Cascade Mode = ($$I1CON.5$) $%eI1CON.5$
; Level Trigger = ($$I1CON.4$) $%tI1CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I1CON.3$) Interrupts $%tI1CON.3$Masked$Enabled$
; Priority Level = @@INT1L@
    Set186Register I1CON, 0$$I1CON$H
;
; Initialize Interrupt 2
; Level Trigger = ($$I2CON.4$) $%tI2CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I2CON.3$) Interrupts $%tI2CON.3$Masked$Enabled$
; Priority Level = @@INT2L@
    Set186Register I2CON, 0$$I2CON$H
;
; Initialize Interrupt 3
; Level Trigger = ($$I3CON.4$) $%tI3CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I3CON.3$) Interrupts $%tI3CON.3$Masked$Enabled$
; Priority Level = @@INT3L@
    Set186Register I3CON, 0$$I3CON$H
;
; Initialize Interrupt 4
; Level Trigger = ($$I4CON.4$) $%tI4CON.4$Level$Edge$-trigger Mode
; Interrupt Mask = ($$I4CON.3$) Interrupts $%tI4CON.3$Masked$Enabled$
; Priority Level = @@INT4L@
    Set186Register I4CON, 0$$I4CON$H
;
; Initialize Serial Interrupt
; Interrupt Mask = ($$SCUCON.3$) Serial Port Interrupts $%tSCUCON.3$Masked$Enabled$
; Priority Level = @@SCUL@
    Set186Register SCUCON, 0$$SCUCON$H
;
; Initialize Timers Interrupt
; Interrupt Mask = ($$TCUCON.3$) Timer Interrupts $%tTCUCON.3$Masked$Enabled$
; Priority Level = @@TCUL@
    Set186Register TCUCON, 0$$TCUCON$H
    ret
Init_InterruptControlUnit   ENDP
_TEXT   ENDS     
END
##80C186EC ICU#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
INCLUDE 186ecmem.inc
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
INCLUDE 186ecio.inc
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_InterruptControlUnit   Proc
; Initialize Slave 8259A
;
; Level Trigger Mode = ($$ICW1S.3$) $%tICW1S.3$Level$Edge$-trigger Mode
; Single 8259A = ($$ICW1S.1$) $%tICW1S.1$Single 8259A$Cascade Mode$
; ICW4 = ($$ICW1S.0$)
;     Initialize ICW1S through SPICP0, AX
    Set186Register SPICP0, 0$$ICW1S$H
;
; Base Interrupt Type
;     Initialize ICW2S through SPICP1, AX
    Set186Register SPICP1, 0$$ICW2S$H
;
; Initialize Slave ID
;     Initialize ICW3S through SPICP1, AX
;     Slave ID must be seven
    Set186Register SPICP1, 07   
;
; Initialize ICW4S
; Initialize Slave 8259A
;  Special Fully Nested Mode = ($$ICW4S.4$) $%eICW4S.4$
;  Automatic EOI Mode = ($$ICW4S.1$) $%eICW4S.1$
;     Initialize ICW4 through SPICP1, AX
    Set186Register SPICP1, 0$$ICW4S$H
;
; Initialize Master 8259A
;  Level Trigger Mode = ($$ICW1M.3$) $%tICW1M.3$Level$Edge$-trigger Mode
;  Single 8259A = ($$ICW1M.1$) $%tICW1M.1$Single 8259A$Cascade Mode$
;  ICW4 = ($$ICW1M.0$) ICW4M $%tICW1M.0$$NOT$Required
;     Initialize ICW1M through MPICP0, AX
    Set186Register MPICP0, 0$$ICW1M$H
;
; Base Interrupt Type
;     Initialize ICW2M through MPICP1, AX
    Set186Register MPICP1, 0$$ICW2M$H
;
; Initialize Slave ID
;     Initialize ICW3M through MPICP1, AX
    Set186Register MPICP1, 0$$ICW3M$H
;
; Initialize ICW4M 
; Initialize Slave 8259A
;  Special Fully Nested Mode = ($$ICW4M.4$) $%eICW4M.4$
;  Automatic EOI Mode = ($$ICW4M.1$) $%eICW4M.1$
;     Initialize ICW4 through MPICP1, AX
    Set186Register MPICP1, 0$$ICW4M$H
    ret
Init_InterruptControlUnit   ENDP
_TEXT   ENDS
END
##80C186EB PM#
##80C186EB Clock#
##80C186EB CPU#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
INCLUDE 186ebmem.inc
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
INCLUDE 186ebio.inc
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_PowerManagement    Proc
; Initialize Power Management
;
;  Idle Mode = ($$PWRCON.1$) $%ePWRCON.1$
;  PowerDown Mode = ($$PWRCON.0$) $%ePWRCON.0$
    Set186Register PWRCON, 0$$PWRCON$H
    ret
Init_PowerManagement    ENDP
_TEXT   ENDS
END
##80C186XL Clock#
##80C186XL CPU#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
INCLUDE 186eamem.inc
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
INCLUDE 186eaio.inc
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_PowerSave  Proc
;  Power Save Enable = ($$PWRSAV.15$) $%ePWRSAV.15$
    Set186Register PWRSAV, 0$$PWRSAV$H
    ret
Init_PowerSave  ENDP
_TEXT   ENDS
END
##80C186EA PM#
##80C186EC PM#
##80C186EC Clock#
##80C186EA Clock#
##80C186EA CPU#
##80C186EC CPU#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
  $$IFP$ 80C186EC
INCLUDE 186ecmem.inc
  $$END$
  $$IFP$ 80C186EA
INCLUDE 186eamem.inc
  $$END$
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
  $$IFP$ 80C186EC
INCLUDE 186ecio.inc
  $$END$
  $$IFP$ 80C186EA
INCLUDE 186eaio.inc
  $$END$
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
Init_PowerManagement    Proc
;  Idle Mode = ($$PWRCON.1$) $%ePWRCON.1$
;  PowerDown Mode = ($$PWRCON.0$) $%ePWRCON.0$
    Set186Register PWRCON, 0$$PWRCON$H
;
;  Initialize Power Save Features
;  Power Save Enable = ($$PWRSAV.15$) $%ePWRSAV.15$
    Set186Register PWRSAV, 0$$PWRSAV$H
    ret
Init_PowerManagement    ENDP
_TEXT   ENDS
END
##80C186EC WDT#
$$IF$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-11$00H
INCLUDE 186ecmem.inc
$$END$
$$IFN$ RELREG.12
PCB_BASE EQU 0$$RELREG.0-7$00H
INCLUDE 186ecio.inc
$$END$
_TEXT    SEGMENT PUBLIC 'CODE'
    ASSUME CS:_TEXT
$$IF$ WDTENAB
SetWDT_Reload   Proc
    push    bp
    mov     bp,sp
    pushf        ; Save state of interrupts
    cli          ; Disable interrupts
  ; Reload Low
    Set186Register WDTRLDH,0$$WDTRLDH$H
  ; Reload High
    Set186Register WDTRLDL,0$$WDTRLDL$H
    popf         ; Restore state of interrupts
    pop     bp
    ret
SetWDT_Reload   ENDP


;This procedure assumes there is a near variable
;defined with the reload key, such as:
;         WDT_KEY  DB  0AAH,055H

Reset_WatchdogTimer Proc
     pushf        ;Save state of interrupts
     push  cx     ;and the registers used
     push  dx
     push  si
     cli          ;Disable interrupts
    
;Use the locked instruction to load the special
;reload key (0AA55H) into WDTCLR to reset the WDT
     mov   dx, WDTCLR
     mov   si,offset WDT_KEY
     cld
     mov   cx,2
$$IF$RELREG.12
lock rep  movsb
$$END$
$$IFN$RELREG.12
lock rep  outsb
$$END$ 

     pop   si     ;Restore the register values
     pop   dx     ;and the interrupt state
     pop   cx
     popf
     ret
Reset_WatchdogTimer  ENDP
$$END$
$$IFN$ WDTENAB
;This procedure assumes that there is a near variable
;defined with the DISABLE key (055AAH), such as:
;            WDT_DISABLE  DB  055H,0AAH
             
Disable_WatchdogTimer Proc
     pushf            ;Save state of interrupts
     push  cx         ;and the registers used
     push  dx
     push  si
     cli              ;Disable interrupts
    
;Use the locked instruction to load the special
;WDT DISABLE key into WDTDIS to disable the WDT
     mov   dx, WDTCLR
     mov   si, offset WDT_DISABLE
     cld
     mov   cx,2
$$IF$RELREG.12
lock rep movsb
$$END$
$$IFN$RELREG.12
lock rep outsb
$$END$

     pop  si         ;Restore the register values
     pop  dx         ;and the interrupt state
     pop  cx
     popf
     ret
Disable_WatchdogTimer   ENDP
$$END$

END