📄 51fxc.cod
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/*
* Copyright (c) 1995, Intel Corporation
*
* $Workfile: 51fxc.cod $
* $Revision: 1.3 $
* $Modtime: May 29 1995 12:48:50 $
*
* Purpose:
*
*
*
*
*
* Compiler:
*
* Ext Packages:
*
*
*
*/
##80C5? WRITE#
##80C51F? WRITE#
@@REG_MNEM@ = $%cREG_VALUE$;
##80C5? READ#
##80C51F? READ#
UserVar = @@REG_MNEM@;
##80C5? OR#
##80C51F? OR#
@@REG_MNEM@ = @@REG_MNEM@ | $%cREG_VALUE$;
##80C5? AND#
##80C51F? AND#
@@REG_MNEM@ = @@REG_MNEM@ & $%cREG_VALUE$;
##80C5? XOR#
##80C51F? XOR#
@@REG_MNEM@ = @@REG_MNEM@ ^ $%cREG_VALUE$;
##80C5? TESTZ#
##80C51F? TESTZ#
if (@@REG_MNEM@ == 0)
{
/* user code */
}
##80C5? TESTNZ#
##80C51F? TESTNZ#
if (@@REG_MNEM@ != 0)
{
/*user code*/
}
##80C52 IU#
##80C54 IU#
##80C58 IU#
##80C51FA IU#
##80C51FB IU#
##80C51FC IU#
#include <51fx.h>
/* Interrupt Control Unit */
$$ifn$IE
/* NO INTERRUPTS*/
$$end$
$$if$IE
/* **** Enabled interrupts in Interrupt Enable Register ****
**** GLOBAL INTERRUPT MUST BE ENABLED FOR ANY OTHER
**** INTERRUPT TO WORK!
*/
$$if$IE.7
/* GLOBAL INTERRUPT ENABLED */
$$end$
$$ifN$IE.7
/* GLOBAL INTERRUPT DISABLED ALL INTERRUPTS
ARE DISABLED */
$$end$
$$if$IE.0
/* External interrupt 0 */
$$ifn$IPH.0 &! IP.0
/* Priority Level = 0 */
$$end$
$$ifn$IPH.0 && IP.0
/* Priority Level = 1 */
$$end$
$$if$IPH.0 &! IP.0
/* Priority Level = 2 */
$$end$
$$if$IPH.0 && IP.0
/* Priority Level = 3 */
$$end$
$$end$
$$if$IE.1
/* Timer 0 interrupt */
$$ifn$IPH.1 &! IP.1
/* Priority Level = 0 */
$$end$
$$ifn$IPH.1 && IP.1
/* Priority Level = 1 */
$$end$
$$if$IPH.1 &! IP.1
/* Priority Level = 2 */
$$end$
$$if$IPH.1 && IP.1
/* Priority Level = 3 */
$$end$
$$end$
$$if$IE.2
/* External interrupt 1 */
$$ifn$IPH.2 &! IP.2
/* Priority Level = 0 */
$$end$
$$ifn$IPH.2 && IP.2
/* Priority Level = 1 */
$$end$
$$if$IPH.2 &! IP.2
/* Priority Level = 2 */
$$end$
$$if$IPH.2 && IP.2
/* Priority Level = 3 */
$$end$
$$end$
$$if$IE.3
/* Timer 1 interrupt */
$$ifn$IPH.3 &! IP.3
/* Priority Level = 0 */
$$end$
$$ifn$IPH.3 && IP.3
/* Priority Level = 1 */
$$end$
$$if$IPH.3 &! IP.3
/* Priority Level = 2 */
$$end$
$$if$IPH.3 && IP.3
/* Priority Level = 3 */
$$end$
$$end$
$$if$IE.4
/* Serial Port interrupt */
$$ifn$IPH.4 &! IP.4
/* Priority Level = 0 */
$$end$
$$ifn$IPH.4 && IP.4
/* Priority Level = 1 */
$$end$
$$if$IPH.4 &! IP.4
/* Priority Level = 2 */
$$end$
$$if$IPH.4 && IP.4
/* Priority Level = 3 */
$$end$
$$end$
$$if$IE.5
/* Timer 2 interrupt*/
$$ifn$IPH.5 &! IP.5
/* Priority Level = 0*/
$$end$
$$ifn$IPH.5 && IP.5
/* Priority Level = 1*/
$$end$
$$if$IPH.5 &! IP.5
/* Priority Level = 2*/
$$end$
$$if$IPH.5 && IP.5
/* Priority Level = 3*/
$$end$
$$end$
$$if$IE.6
/* PCA interrupt */
$$ifn$IPH.6 &! IP.6
/* Priority Level = 0 */
$$end$
$$ifn$IPH.6 && IP.6
/* Priority Level = 1 */
$$end$
$$if$IPH.6 &! IP.6
/* Priority Level = 2 */
$$end$
$$if$IPH.6 && IP.6
/* Priority Level = 3 */
$$end$
$$end$
$$end$
void init_special_interrupts(void)
{
IE=0X$$IE$;
IP=0X$$IP$;
IPH=0X$$IPH$;
}
void main(void)
{
init_special_interrupts( );
}
##80C51F? PCATMR#
#include <51fx.h>
/********************************************************************
PCA Timer/Counter
Clocking Source: $%4CMOD.1-2$Fosc/12$Fosc/4$Timer 0 Overflow$External input (ECI)$
Run Control: PCA Timer is $%eCCON.6$
$$if$ CCON.6
$$if$ CMOD.7
(halts during idle mode)
$$end$
$$end$
Timer Count: $$CH$$$CL.4-7$$$CL.0-3$H
$$if$ IE.6
PCA global interrupt: enabled
$$if$ CMOD.0
--Enable PCA overflow interrupt
$$end$
$$if$ (IE.7 == 0)
NOTE: The global disable bit is clear;
all interrupts are disabled.
$$end$
$$end$
********************************************************************/
void InitPCATimer()
{
CR = 0; /*Turn off PCA timer to load count*/
CL = 0x$$CL$; /*Set PCA count (low byte)*/
CH = 0x$$CH$; /*Set PCA count (high byte)*/
$$if$ IE.6
EC = 1; /*Enable PCA global interrupt*/
$$end$
$$else$
EC = 0; /*Disable PCA global interrupt*/
$$end$
$$if$ CMOD.0
CMOD |= 0x01; /*Enable PCA overflow interrupt*/
$$end$
$$else$
CMOD &= 0xFE; /*Disable PCA overflow interrupt*/
$$end$
CMOD &= 0xF9; /*Set clocking input source*/
CMOD |= 0x$%4CMOD.1-2$00$02$04$06$;
$$if$ CMOD.7
CMOD |= 0x80; /*Set counter idle control*/
$$end$
$$else$
CMOD &= 0x7F; /*Clr counter idle control*/
$$end$
$$if$ CCON.6
CR = 1; /*Enable PCA Timer/Counter*/
$$end$
}
void main()
{
InitPCATimer();
}
##80C51FA PCAMODULE#
##80C51FB PCAMODULE#
##80C51FC PCAMODULE#
#include <51fx.h>
/********************************************************************
PCA module $$PCAMODULE$
$$if$ (PCATYPE == 0)
Disabled
$$end$
$$if$ (PCATYPE == 1)
Capture Mode: trigger on a positive transition
$$end$
$$if$ (PCATYPE == 2)
Capture Mode: trigger on a negative transition
$$end$
$$if$ (PCATYPE == 3)
Capture Mode: trigger on a positive or negative transition
$$end$
$$if$ (PCATYPE == 4)
Compare Mode: software timer
$$end$
$$if$ (PCATYPE == 5)
Compare Mode: high-speed output
$$end$
$$if$ (PCATYPE == 6)
Compare Mode: pulse width modulation
$$end$
$$if$ (PCATYPE == 7)
Compare Mode: watchdog timer
$$end$
$$if$ (PCATYPE == 1) || (PCATYPE == 2) || (PCATYPE == 3)
$$if$ CCAPMx.0
Interrupts: PCA capture enabled
$$ifn$ IE.6
NOTE: The PCA global interrupt is disabled
$$end$
$$end$
$$end$
$$if$ (PCATYPE == 4) || (PCATYPE == 5) || (PCATYPE == 7)
$$if$ CCAPMx.0
Interrupts: PCA compare is enabled
$$ifn$ IE.6
NOTE: The PCA global interrupt is disabled
$$end$
$$end$
$$end$
********************************************************************/
void InitPCAModule$$PCAMODULE$()
{
$$if$ (PCATYPE == 7)
CMOD &= 0xBF; /*Disable watchdog mode to load compare value*/
$$end$
CCAPM$$PCAMODULE$ = 0x$$CCAPMx$;
$$if$ (PCATYPE == 4) || (PCATYPE == 5) || (PCATYPE == 7)
CCAP$$PCAMODULE$L = 0x$$CCAPxL$;
CCAP$$PCAMODULE$H = 0x$$CCAPxH$;
$$end$
$$if$ (PCATYPE == 6)
/*To change the value in CCAP$$PCAMODULE$L w/o*/
/* glitches write new value into CCAP$$PCAMODULE$H*/
CCAP$$PCAMODULE$H = 0x$$CCAPxL$;
$$end$
$$if$ (PCATYPE == 7)
CMOD |= 0x40; /*Enable watchdog mode*/
$$end$
}
void main()
{
InitPCAModule$$PCAMODULE$();
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