misc.c

mcs51,2051,x86系列MCU

/*
 *  ApBUILDER CODE FILE - Intel Corporation
 *
 *
 *  Purpose:            Miscellaneous routines file distributed for "FULL^CODE" on 251SX, and 8X930AX families.
 *                      Contains Power management, I/O, interrupts etc..
 *
 *                      Contains miscellaneous routines and a few examples.
 *
 *                      The Software is provided "AS IS."
 *
 *                      LIMITATION OF LIABILITY:    NEITHER INTEL NOR ITS VENDORS OR AGENTS
 *                      SHALL BE LIABLE FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA,
 *                      INTERRUPTION OF BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR
 *                      CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER THIS AGREEMENT OR
 *                      OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
 *
 *                      While we have made every attempt to completely test this code, we highly recommend that
 *                      you personally test it completely prior to actual inclusion in your project.
 *
 *  Compiler:           Developed using Compass251 from Production Languages corporation.
 *
 *  Ext Packages:       None
 *
 *  Author:             Brad B.
 *
 *  Revisions:
 *
 *
 */

#include "global.h"
#include "main.h"
#include "misc.h"



/* -----------------7/30/96 10:45AM------------------
   Function: init_cpu()

   Sets up WCON
 * --------------------------------------------------*/

void init_cpu(char wconval)
{
   WCON = wconval;
}


/* -----------------7/30/96 10:45AM------------------
   Function: init_interrupts()

   Sets up main Interrupt enable bits in IE0, and Interrupt priority in IPL0 and IPH0.
   For 8X930AX devices, should also set IPL1 and IPH1 for high-order priority bits.
 * --------------------------------------------------*/

void init_interrupts(char ie0val, char ipl0val, char iph0val)
{
   IE0 = ie0val;
   IPL0 = ipl0val;
   IPH0 = iph0val;
}

/* -----------------7/30/96 10:46AM------------------
   Function: init_io_ports()
 * --------------------------------------------------*/

void init_io_ports(char port0, char port1, char port2, char port3)
{
  P0=port0;
  P1=port1;
  P2=port2;
  P3=port3;
}

/* -----------------7/30/96 10:47AM------------------
   Function: init_pm()

   initialize power management control register
 * --------------------------------------------------*/

void init_pm(char pconval)
{
   if (pconval & 0x02)
   {
      PCON |= 0x02;                 /* PD=1 , enter power down mode.*/
   }
   else
   {
      if (pconval & 0x01)
      {
         PCON |= 0x01;              /* IDL=1, activate idle mode */
      }
   }
}




/* -----------------7/30/96 10:47AM------------------
   Function: t0_int()

   EXAMPLE use of Timer0 to reset WDT.
   Using TIMER 0 interrupt routine to service the hardware watchdog timer.
   Reset hardware watchdog timer
 * --------------------------------------------------*/

#if 0                            /* enable if you want to use it.*/
void interrupt t0_int(void)
{
   SET_VECTOR(TIMER0, t0_int);   /* example to use when using timer0 to periodicly reset the WDT */
   init_WDT(ON);                 /* Must reset WDT to keep it from timing out */

   /* Load new value to TIMER 0 registers.  WDT will overflow at count of 4000H if not serviced/reset */
   TL0 = 0xFF;                   /* TIMER 0 to count for 3000H cycles */
   TH0 = 0xCF;                   /* for interrupt to occur */
}
#endif

/* -----------------7/30/96 10:49AM------------------
   Function: init_WDT()

   Initialize the Watch Dog Timer.
   Take care when using the WDT during idle mode.  See 8XC251SB manual pg 7-18
 * --------------------------------------------------*/

void init_WDT(char on_off)
{
   if (on_off == ON)
   {
      /*
         This specific sequence enables/resets the WDT
         It will overflow on count 0x4000, based on a count being incremented every
         peripheral cycle (12/Fosc) seconds.
         ie. at 16 Mhz operation, peripheral cycle = 750 ns.
         750ns * 0x4000 = 12.288 ms.  WDT will overflow every 12.288 ms unless serviced.
      */

      WDTRST=  0X1E; /* 1st byte sequence to WDTRST */
      WDTRST=  0XE1; /* 2nd byte sequence to WDTRST */
   }
}