📄 251a.cod
字号:
ret
main:
lcall init_io_ports
;
; User application codes
;
end
##80C251S? IO_P2#
##80C151S? IO_P2#
; Initialize the quasi-bidirectional port pins. To use these
; pins as inputs they must be written with a one.
; IO port pins:
; Alternate Functions are High Bytes of Address for External Memory
; p2.0 = $%tP2_DIR.0$IN$OUT$
; p2.1 = $%tP2_DIR.1$IN$OUT$
; p2.2 = $%tP2_DIR.2$IN$OUT$
; p2.3 = $%tP2_DIR.3$IN$OUT$
; p2.4 = $%tP2_DIR.4$IN$OUT$
; p2.5 = $%tP2_DIR.5$IN$OUT$
; p2.6 = $%tP2_DIR.6$IN$OUT$
; p2.7 = $%tP2_DIR.7$IN$OUT$
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_io_ports:
mov P2, #0$$P2$h ; Init Port 2
ret
main:
lcall init_io_ports
;
; User application codes
;
end
##80C251S? IO_P3#
##80C151S? IO_P3#
; Initialize the quasi-bidirectional port pins. To use these
; pins as inputs they must be written with a one.
; IO port pins:
; p3.0 = $%tP3_DIR.0$IN$OUT$ ;Special Function RXD
; p3.1 = $%tP3_DIR.1$IN$OUT$ ;Special Function TXD
; p3.2 = $%tP3_DIR.2$IN$OUT$ ;Special Function INT0
; p3.3 = $%tP3_DIR.3$IN$OUT$ ;Special Function INT
; p3.4 = $%tP3_DIR.4$IN$OUT$ ;Special Function T0
; p3.5 = $%tP3_DIR.5$IN$OUT$ ;Special Function T1
; p3.6 = $%tP3_DIR.6$IN$OUT$ ;Special Function WR
; p3.7 = $%tP3_DIR.7$IN$OUT$ ;Special Function RD
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_io_ports:
mov P3, #0$$P3$h ; Init Port 3
ret
main:
lcall init_io_ports
;
; User application codes
;
end
##80C251S? PM#
##80C151S? PM#
; Power Management
; - Idle Mode = $%ePCON.0$
; - Power Down Mode = $%ePCON.1$
;Power down mode takes precedence over Idle Mode if both
; bits are set.
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_pm:
$$if$ PCON.1
setb PD
$$end$
$$if$ PCON.0 &! PCON.1
setb IDL
$$end$
ret
main:
lcall init_pm
;
; User application codes
;
end
##80C251S? Serial#
##80C151S? Serial#
;Serial Port
;Mode = $%4SCON.6-7$0 /shift register$1 /8-bit UART$2 /9-bit UART$3 /9-bit UART$
;Serial Port Interrupt = $%eIE0.4$
$$if$ SCON.7
;9th Data Bit = $%eSCON.3$
$$end$
;Receive = $%eSCON.4$
;Auto Addressing = $%eSCON.5$
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_serial:
mov SCON, #0$$SCON$h
$$if$ SCON.6
$$if$ T2CON.4
;Timer 2 is being used to generate baud rates.
mov RCAP2L, #0$$RCAP2L$h ; 16-bit reload value for baud rate generation
mov RCAP2H, #0$$RCAP2H$h ;
mov T2CON, #0$$T2CON$h ; Set TIMER 2 into baud rate generator
$$end$
$$ifn$ T2CON.4
;Timer 1 is being used to generate baud rates.
$$if$ PCON.7
orl PCON, #80H ; Double the baud rate
$$end$
mov TMOD, #0$$TMOD$h ; Set TIMER 1
mov TH1, #0$$TH1$h ; Reload value for baud rate
setb TR1 ; Start TIMER 1
$$end$
$$if$ T2CON.4 &! T2CON.5
;Timer 1 is being used to generate baud rates.
$$if$ PCON.7
orl PCON, #80H ; Double the baud rate
$$end$
mov TMOD, #0$$TMOD$h; Set TIMER 1
mov TH1, #0$$TH1$h ; Reload value for baud rate
setb TR1 ; Start TIMER 1
$$end$
$$ifn$ T2CON.4 && T2CON.5
;Timer 2 is being used to generate baud rates.
mov RCAP2L, #0$$RCAP2L$h ; 16-bit reload value for baud rate generation
mov RCAP2H, #0$$RCAP2H$h ;
mov T2CON, #0$$T2CON$h ; Set TIMER 2 into baud rate generator
$$end$
$$end$
$$ifn$ SCON.6 && SCON.7
$$if$ PCON.7
orl PCON, #80H
$$end$
$$end$
$$if$ IE0.4
setb ES ; Enable Serial Port interrupt
$$end$
$$if$ SCON.4
clr RI ; Clear Receive interrupt
$$end$
$$ifn$ SCON.4
mov SBUF, #00H ; Clear Serial Port
clr TI ; Clear Transmit interrupt
$$end$
ret
main:
lcall init_serial
;
; User application codes
;
end
##80C251S? TIMER0#
##80C151S? TIMER0#
; Configure Timer $$TIMERX$
; - Mode = $%4TMOD.0-1$0$1$2$3$
; - Interrupt = $%tIE0.1$ENABLED$DISABLED$
; - Clock Source = $%tTMOD.2$EXTERNAL$INTERNAL$
; - Enable Gating Control = $%tTMOD.3$ENABLED$DISABLED$
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_timer$$TIMERX$:
anl TMOD, #0F0H ;clear Timer 0
orl TMOD, #0$$TMOD$H ;
mov TL0, #0$$TL0$H ;value set by user
mov TH0, #0$$TH0$H ;value set by user
$$if$ IE0.1
setb IE0.1
$$end$
setb TR$$TIMERX$ ;TCON.4 start timer
ret
main:
lcall init_timer$$TIMERX$
;
; User application codes
;
end
##80C251S? TIMER1#
##80C151S? TIMER1#
; Configure Timer $$TIMERX$
; - Mode = $%4TMOD.4-5$0$1$2$3$
; - Interuppt = $%tIE0.3$ENABLED$DISABLED$
; - Clock Source = $%tTMOD.6$EXTERNAL$INTERNAL$
; - Enable Gating Control = $%tTMOD.7$ENABLED$DISABLED$
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_timer$$TIMERX$:
anl TMOD, #0FH ;clear Timer 1 control
orl TMOD, #0$$TMOD$H ;
mov TL1, #0$$TL1$H ;value set by user
mov TH1, #0$$TH1$H ;value set by user
$$if$ IE0.3
setb IE0.3
$$end$
setb TR$$TIMERX$ ;TCON.6 start timer 1
ret
main:
lcall init_timer$$TIMERX$
;
; User application codes
;
end
##80C251S? TIMER2#
##80C151S? TIMER2#
;The Timer is set to $%5T2MODES$No Operation$Auto Reload$Capture$BaudRate Generator$Clock Out$
$$if$ (T2MODES == 1) || (T2MODES == 2)
;Clock Source = $%tT2CON.1$EXTERNAL$INTERNAL$
$$if$ (T2MODES == 1)
;Count Direction = $%tT2MOD.0$UP/DOWN depending on T2EX pin$UP$
$$end$
;Reload Value by $%tT2CON.3$External Transition$Overflow$
$$end$
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_timer$$TIMERX$:
mov T2CON, #0$$T2CON$h
mov T2MOD, #0$$T2MOD$h
$$if$ (T2MODES == 1) || (T2MODES == 2)
mov TL2 , #00H ;set by user
mov TH2 , #00H ;set by user
mov RCAP2L, #00H ;reload value low
mov RCAP2H, #00H ;reload value high
$$if$ T2CON.3
; Will allow capture or reload on negative transition on T2EX pin
setb EXEN2
$$end$
$$end$
$$if$ (T2MODES == 4)
mov RCAP2L, #0$$RCAP2L$h ;Clk Out Value
mov RCAP2H, #0$$RCAP2H$h ;Clk Out Value
$$end
setb TR2 ;T2CON.2 start timer
ret
main:
lcall init_timer$$TIMERX$
;
; User application codes
;
end
##80C251S? WDT#
##80C151S? WDT#
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
org FF:000BH ; Use FF:400BH when compiling for Intel sb target board
; Using TIMER 0 interrupt routine to service the hardware watchdog timer.
; Reset hardware watchdog timer
mov WDTRST, #1EH ; 1st byte sequence to WDTRST
mov WDTRST, #0E1H ; 2nd byte sequence to WDTRST
; Load new value to TIMER 0 registers
mov TL0, #0FFH ; TIMER 0 to count for 3000H cycles
mov TH0, #0CFH ; for interrupt to occur
reti
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
; Set TIMER 0 to service the hardware watchdog timer
init_TIMER0:
anl TMOD, #0F1H ; Set TIMER 0 to a 16-bit timer
mov TL0, #0FFH ; TIMER 0 to count for 3000H cycles
mov TH0, #0CFH ; for interrupt to occur
setb TR0 ; Start TIMER 0
ret
; Enable the hardware watchdog timer
init_WDT:
mov WDTRST, #1EH ; 1st byte sequence to WDTRST
mov WDTRST, #0E1H ; 2nd byte sequence to WDTRST
ret
main:
lcall init_TIMER0
lcall init_WDT
;
; User application codes
;
end
##80C151S? CPU#
##80C151S? CODE#
cseg at FFF8H
; This full address will be placed on the address
; bus when Configuration bytes are retrieved from
; external memory (if it is present) during reset.
; Generally, you would place the Configuration bytes
; at offset F8 and F9 within the ending page of your
; physical memory/ROM. ie. if you have 32K eprom,
; the address used above should be set to 7FF8H
; so that the configuration bytes are placed at the
; proper position in your external memory/ROM.
; NOTE: Positioning of Configuration bytes in memory
; space ONLY applies to devices utilizing external memory.
; Devices with internal ROM (OTP's) are programmed with
; Configuration bytes as outlined in the device manual.
; Take care when utilizing full memory decoding without
; utilizing page FFH in memory/ROM space. Configuration
; bytes 0 and 1 are fetched by placing the fixed
; addresses FFF8H and FFF9H on the address bus.
UConfig0: dcb #0$$CONFIG0$h
UConfig1: dcb #0$$CONFIG1$h
##80C251S? CPU#
##80C251S? CODE#
$include (251SB.INC)
cseg at FF:FFF8H
; This full address will be placed on the address
; bus when Configuration bytes are retrieved from
; external memory (if it is present) during reset.
; Generally, you would place the Configuration bytes
; at offset F8 and F9 within the ending page of your
; physical memory/ROM. ie. if you have 32K eprom,
; the address used above should be set to FF:7FF8H
; so that the configuration bytes are placed at the
; proper position in your external memory/ROM.
; NOTE: Positioning of Configuration bytes in memory
; space ONLY applies to devices utilizing external memory.
; Devices with internal ROM (OTP's) are programmed with
; Configuration bytes as outlined in the device manual.
; Take care when utilizing full memory decoding without
; utilizing page FFH in memory/ROM space. Configuration
; bytes 0 and 1 are fetched by placing the fixed
; addresses FF:FFF8H and FF:FFF9H on the address bus.
UConfig0: dcb #0$$CONFIG0$h
UConfig1: dcb #0$$CONFIG1$h
init_cpu:
mov WCON, #0$$WCON$H
ret
main:
lcall init_cpu
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